Lines Matching refs:col
7 define dso_local void @test_api(i32 %cond, i16 signext %row, i16 signext %col) local_unnamed_addr {
19 ; CHECK-NEXT: %{{[0-9]+}} = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, ptr…
20 ; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 %col, ptr %{{[0-9]+}}, i64 64,…
21 ; CHECK-NEXT: %{{[0-9]+}} = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, …
22 ; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, ptr %{{[0-9]+}}, i64 …
27 ; CHECK-NEXT: %{{[0-9]+}} = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, ptr…
28 ; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 %col, ptr %{{[0-9]+}}, i64 64,…
29 ; CHECK-NEXT: %{{[0-9]+}} = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, …
30 ; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, ptr %{{[0-9]+}}, i64 …
34 ; CHECK-NEXT: %{{[0-9]+}} = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, ptr %{{[…
35 ; CHECK-NEXT: %{{[0-9]+}} = call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, ptr %…
36 ; CHECK-NEXT: %{{[0-9]+}} = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %row, i16 %col, i16 …
37 ; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, ptr %{{[0-9]+}}, i64 …
38 ; CHECK-NEXT: %{{[0-9]+}} = call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, ptr %…
39 ; CHECK-NEXT: tail call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, ptr @buf, i64 32…
48 %1 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, ptr @buf, i64 32)
49 %2 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, ptr @buf, i64 32)
54 %4 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, ptr @buf2, i64 32)
55 %5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, ptr @buf2, i64 32)
62 …%6 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %row, i16 %col, i16 8, x86_amx %c.sroa.1044.…
63 tail call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, ptr @buf, i64 32, x86_amx %6)