Lines Matching refs:pvfsub
220 ; CHECK-NEXT: pvfsub %v0, %v0, %v1
222 …%3 = tail call fast <256 x double> @llvm.ve.vl.pvfsub.vvvl(<256 x double> %0, <256 x double> %1, i…
227 declare <256 x double> @llvm.ve.vl.pvfsub.vvvl(<256 x double>, <256 x double>, i32)
235 ; CHECK-NEXT: pvfsub %v2, %v0, %v1
240 …%4 = tail call fast <256 x double> @llvm.ve.vl.pvfsub.vvvvl(<256 x double> %0, <256 x double> %1, …
245 declare <256 x double> @llvm.ve.vl.pvfsub.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
253 ; CHECK-NEXT: pvfsub %v0, %s0, %v0
255 %3 = tail call fast <256 x double> @llvm.ve.vl.pvfsub.vsvl(i64 %0, <256 x double> %1, i32 256)
260 declare <256 x double> @llvm.ve.vl.pvfsub.vsvl(i64, <256 x double>, i32)
268 ; CHECK-NEXT: pvfsub %v1, %s0, %v0
273 …%4 = tail call fast <256 x double> @llvm.ve.vl.pvfsub.vsvvl(i64 %0, <256 x double> %1, <256 x doub…
278 declare <256 x double> @llvm.ve.vl.pvfsub.vsvvl(i64, <256 x double>, <256 x double>, i32)
286 ; CHECK-NEXT: pvfsub %v2, %v0, %v1, %vm2
291 …%5 = tail call fast <256 x double> @llvm.ve.vl.pvfsub.vvvMvl(<256 x double> %0, <256 x double> %1,…
296 declare <256 x double> @llvm.ve.vl.pvfsub.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x…
304 ; CHECK-NEXT: pvfsub %v1, %s0, %v0, %vm2
309 …%5 = tail call fast <256 x double> @llvm.ve.vl.pvfsub.vsvMvl(i64 %0, <256 x double> %1, <512 x i1>…
314 declare <256 x double> @llvm.ve.vl.pvfsub.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i…