Lines Matching refs:REG
8 ; RUN: -check-prefix=CHECK-REG %s
24 ; CHECK-REG-LABEL: test1:
25 ; CHECK-REG: # %bb.0: # %entry
26 ; CHECK-REG-NEXT: xsmuldp f1, f1, f2
27 ; CHECK-REG-NEXT: blr
51 ; CHECK-REG-LABEL: test2:
52 ; CHECK-REG: # %bb.0: # %entry
53 ; CHECK-REG-NEXT: xsdivdp f1, f1, f2
54 ; CHECK-REG-NEXT: blr
78 ; CHECK-REG-LABEL: test3:
79 ; CHECK-REG: # %bb.0: # %entry
80 ; CHECK-REG-NEXT: xsadddp f1, f1, f2
81 ; CHECK-REG-NEXT: blr
105 ; CHECK-REG-LABEL: test4:
106 ; CHECK-REG: # %bb.0: # %entry
107 ; CHECK-REG-NEXT: xvadddp v2, v2, v3
108 ; CHECK-REG-NEXT: blr
132 ; CHECK-REG-LABEL: test5:
133 ; CHECK-REG: # %bb.0: # %entry
134 ; CHECK-REG-NEXT: xxlxor v2, v2, v3
135 ; CHECK-REG-NEXT: blr
160 ; CHECK-REG-LABEL: test6:
161 ; CHECK-REG: # %bb.0: # %entry
162 ; CHECK-REG-NEXT: xxlxor v2, v2, v3
163 ; CHECK-REG-NEXT: blr
188 ; CHECK-REG-LABEL: test7:
189 ; CHECK-REG: # %bb.0: # %entry
190 ; CHECK-REG-NEXT: xxlxor v2, v2, v3
191 ; CHECK-REG-NEXT: blr
216 ; CHECK-REG-LABEL: test8:
217 ; CHECK-REG: # %bb.0: # %entry
218 ; CHECK-REG-NEXT: xxlor v2, v2, v3
219 ; CHECK-REG-NEXT: blr
244 ; CHECK-REG-LABEL: test9:
245 ; CHECK-REG: # %bb.0: # %entry
246 ; CHECK-REG-NEXT: xxlor v2, v2, v3
247 ; CHECK-REG-NEXT: blr
272 ; CHECK-REG-LABEL: test10:
273 ; CHECK-REG: # %bb.0: # %entry
274 ; CHECK-REG-NEXT: xxlor v2, v2, v3
275 ; CHECK-REG-NEXT: blr
300 ; CHECK-REG-LABEL: test11:
301 ; CHECK-REG: # %bb.0: # %entry
302 ; CHECK-REG-NEXT: xxland v2, v2, v3
303 ; CHECK-REG-NEXT: blr
328 ; CHECK-REG-LABEL: test12:
329 ; CHECK-REG: # %bb.0: # %entry
330 ; CHECK-REG-NEXT: xxland v2, v2, v3
331 ; CHECK-REG-NEXT: blr
356 ; CHECK-REG-LABEL: test13:
357 ; CHECK-REG: # %bb.0: # %entry
358 ; CHECK-REG-NEXT: xxland v2, v2, v3
359 ; CHECK-REG-NEXT: blr
384 ; CHECK-REG-LABEL: test14:
385 ; CHECK-REG: # %bb.0: # %entry
386 ; CHECK-REG-NEXT: xxlnor v2, v2, v3
387 ; CHECK-REG-NEXT: blr
414 ; CHECK-REG-LABEL: test15:
415 ; CHECK-REG: # %bb.0: # %entry
416 ; CHECK-REG-NEXT: xxlnor v2, v2, v3
417 ; CHECK-REG-NEXT: blr
444 ; CHECK-REG-LABEL: test16:
445 ; CHECK-REG: # %bb.0: # %entry
446 ; CHECK-REG-NEXT: xxlnor v2, v2, v3
447 ; CHECK-REG-NEXT: blr
474 ; CHECK-REG-LABEL: test17:
475 ; CHECK-REG: # %bb.0: # %entry
476 ; CHECK-REG-NEXT: xxlandc v2, v2, v3
477 ; CHECK-REG-NEXT: blr
504 ; CHECK-REG-LABEL: test18:
505 ; CHECK-REG: # %bb.0: # %entry
506 ; CHECK-REG-NEXT: xxlandc v2, v2, v3
507 ; CHECK-REG-NEXT: blr
534 ; CHECK-REG-LABEL: test19:
535 ; CHECK-REG: # %bb.0: # %entry
536 ; CHECK-REG-NEXT: xxlandc v2, v2, v3
537 ; CHECK-REG-NEXT: blr
565 ; CHECK-REG-LABEL: test20:
566 ; CHECK-REG: # %bb.0: # %entry
567 ; CHECK-REG-NEXT: vcmpequw v4, v4, v5
568 ; CHECK-REG-NEXT: xxsel v2, v3, v2, v4
569 ; CHECK-REG-NEXT: blr
598 ; CHECK-REG-LABEL: test21:
599 ; CHECK-REG: # %bb.0: # %entry
600 ; CHECK-REG-NEXT: xvcmpeqsp vs0, v4, v5
601 ; CHECK-REG-NEXT: xxsel v2, v3, v2, vs0
602 ; CHECK-REG-NEXT: blr
633 ; CHECK-REG-LABEL: test22:
634 ; CHECK-REG: # %bb.0: # %entry
635 ; CHECK-REG-NEXT: xvcmpgtsp vs0, v5, v4
636 ; CHECK-REG-NEXT: xvcmpgtsp vs1, v4, v5
637 ; CHECK-REG-NEXT: xxlor vs0, vs1, vs0
638 ; CHECK-REG-NEXT: xxsel v2, v2, v3, vs0
639 ; CHECK-REG-NEXT: blr
672 ; CHECK-REG-LABEL: test23:
673 ; CHECK-REG: # %bb.0: # %entry
674 ; CHECK-REG-NEXT: vcmpequh v4, v4, v5
675 ; CHECK-REG-NEXT: xxsel v2, v3, v2, v4
676 ; CHECK-REG-NEXT: blr
706 ; CHECK-REG-LABEL: test24:
707 ; CHECK-REG: # %bb.0: # %entry
708 ; CHECK-REG-NEXT: vcmpequb v4, v4, v5
709 ; CHECK-REG-NEXT: xxsel v2, v3, v2, v4
710 ; CHECK-REG-NEXT: blr
740 ; CHECK-REG-LABEL: test25:
741 ; CHECK-REG: # %bb.0: # %entry
742 ; CHECK-REG-NEXT: xvcmpeqdp vs0, v4, v5
743 ; CHECK-REG-NEXT: xxsel v2, v3, v2, vs0
744 ; CHECK-REG-NEXT: blr
784 ; CHECK-REG-LABEL: test26:
785 ; CHECK-REG: # %bb.0:
786 ; CHECK-REG-NEXT: addi r3, r1, -32
787 ; CHECK-REG-NEXT: addi r4, r1, -48
788 ; CHECK-REG-NEXT: stxvd2x v3, 0, r3
789 ; CHECK-REG-NEXT: stxvd2x v2, 0, r4
790 ; CHECK-REG-NEXT: ld r3, -24(r1)
791 ; CHECK-REG-NEXT: ld r4, -40(r1)
792 ; CHECK-REG-NEXT: add r3, r4, r3
793 ; CHECK-REG-NEXT: ld r4, -48(r1)
794 ; CHECK-REG-NEXT: std r3, -8(r1)
795 ; CHECK-REG-NEXT: ld r3, -32(r1)
796 ; CHECK-REG-NEXT: add r3, r4, r3
797 ; CHECK-REG-NEXT: std r3, -16(r1)
798 ; CHECK-REG-NEXT: addi r3, r1, -16
799 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
800 ; CHECK-REG-NEXT: blr
840 ; CHECK-REG-LABEL: test27:
841 ; CHECK-REG: # %bb.0:
842 ; CHECK-REG-NEXT: xxland v2, v2, v3
843 ; CHECK-REG-NEXT: blr
866 ; CHECK-REG-LABEL: test28:
867 ; CHECK-REG: # %bb.0:
868 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
869 ; CHECK-REG-NEXT: blr
893 ; CHECK-REG-LABEL: test29:
894 ; CHECK-REG: # %bb.0:
895 ; CHECK-REG-NEXT: stxvd2x v2, 0, r3
896 ; CHECK-REG-NEXT: blr
920 ; CHECK-REG-LABEL: test28u:
921 ; CHECK-REG: # %bb.0:
922 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
923 ; CHECK-REG-NEXT: blr
947 ; CHECK-REG-LABEL: test29u:
948 ; CHECK-REG: # %bb.0:
949 ; CHECK-REG-NEXT: stxvd2x v2, 0, r3
950 ; CHECK-REG-NEXT: blr
974 ; CHECK-REG-LABEL: test30:
975 ; CHECK-REG: # %bb.0:
976 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
977 ; CHECK-REG-NEXT: blr
1002 ; CHECK-REG-LABEL: test31:
1003 ; CHECK-REG: # %bb.0:
1004 ; CHECK-REG-NEXT: stxvd2x v2, 0, r3
1005 ; CHECK-REG-NEXT: blr
1029 ; CHECK-REG-LABEL: test32:
1030 ; CHECK-REG: # %bb.0:
1031 ; CHECK-REG-NEXT: lxvw4x v2, 0, r3
1032 ; CHECK-REG-NEXT: blr
1057 ; CHECK-REG-LABEL: test33:
1058 ; CHECK-REG: # %bb.0:
1059 ; CHECK-REG-NEXT: stxvw4x v2, 0, r3
1060 ; CHECK-REG-NEXT: blr
1089 ; CHECK-REG-LABEL: test32u:
1090 ; CHECK-REG: # %bb.0:
1091 ; CHECK-REG-NEXT: li r4, 15
1092 ; CHECK-REG-NEXT: lvsl v3, 0, r3
1093 ; CHECK-REG-NEXT: lvx v2, r3, r4
1094 ; CHECK-REG-NEXT: lvx v4, 0, r3
1095 ; CHECK-REG-NEXT: vperm v2, v4, v2, v3
1096 ; CHECK-REG-NEXT: blr
1124 ; CHECK-REG-LABEL: test33u:
1125 ; CHECK-REG: # %bb.0:
1126 ; CHECK-REG-NEXT: stxvw4x v2, 0, r3
1127 ; CHECK-REG-NEXT: blr
1152 ; CHECK-REG-LABEL: test34:
1153 ; CHECK-REG: # %bb.0:
1154 ; CHECK-REG-NEXT: lxvw4x v2, 0, r3
1155 ; CHECK-REG-NEXT: blr
1180 ; CHECK-REG-LABEL: test35:
1181 ; CHECK-REG: # %bb.0:
1182 ; CHECK-REG-NEXT: stxvw4x v2, 0, r3
1183 ; CHECK-REG-NEXT: blr
1208 ; CHECK-REG-LABEL: test40:
1209 ; CHECK-REG: # %bb.0:
1210 ; CHECK-REG-NEXT: xvcvuxddp v2, v2
1211 ; CHECK-REG-NEXT: blr
1234 ; CHECK-REG-LABEL: test41:
1235 ; CHECK-REG: # %bb.0:
1236 ; CHECK-REG-NEXT: xvcvsxddp v2, v2
1237 ; CHECK-REG-NEXT: blr
1260 ; CHECK-REG-LABEL: test42:
1261 ; CHECK-REG: # %bb.0:
1262 ; CHECK-REG-NEXT: xvcvdpuxds v2, v2
1263 ; CHECK-REG-NEXT: blr
1286 ; CHECK-REG-LABEL: test43:
1287 ; CHECK-REG: # %bb.0:
1288 ; CHECK-REG-NEXT: xvcvdpsxds v2, v2
1289 ; CHECK-REG-NEXT: blr
1328 ; CHECK-REG-LABEL: test44:
1329 ; CHECK-REG: # %bb.0:
1330 ; CHECK-REG-NEXT: addi r3, r1, -16
1331 ; CHECK-REG-NEXT: addi r4, r1, -64
1332 ; CHECK-REG-NEXT: stxvd2x v2, 0, r3
1333 ; CHECK-REG-NEXT: ld r3, -8(r1)
1334 ; CHECK-REG-NEXT: std r3, -24(r1)
1335 ; CHECK-REG-NEXT: ld r3, -16(r1)
1336 ; CHECK-REG-NEXT: lfd f0, -24(r1)
1337 ; CHECK-REG-NEXT: std r3, -32(r1)
1338 ; CHECK-REG-NEXT: addi r3, r1, -48
1339 ; CHECK-REG-NEXT: fcfidus f0, f0
1340 ; CHECK-REG-NEXT: stfs f0, -48(r1)
1341 ; CHECK-REG-NEXT: lfd f0, -32(r1)
1342 ; CHECK-REG-NEXT: fcfidus f0, f0
1343 ; CHECK-REG-NEXT: stfs f0, -64(r1)
1344 ; CHECK-REG-NEXT: lxvw4x vs0, 0, r3
1345 ; CHECK-REG-NEXT: lxvw4x vs1, 0, r4
1346 ; CHECK-REG-NEXT: xxmrghw v2, vs1, vs0
1347 ; CHECK-REG-NEXT: blr
1407 ; CHECK-REG-LABEL: test45:
1408 ; CHECK-REG: # %bb.0:
1409 ; CHECK-REG-NEXT: addi r3, r1, -16
1410 ; CHECK-REG-NEXT: addi r4, r1, -64
1411 ; CHECK-REG-NEXT: stxvd2x v2, 0, r3
1412 ; CHECK-REG-NEXT: ld r3, -8(r1)
1413 ; CHECK-REG-NEXT: std r3, -24(r1)
1414 ; CHECK-REG-NEXT: ld r3, -16(r1)
1415 ; CHECK-REG-NEXT: lfd f0, -24(r1)
1416 ; CHECK-REG-NEXT: std r3, -32(r1)
1417 ; CHECK-REG-NEXT: addi r3, r1, -48
1418 ; CHECK-REG-NEXT: fcfids f0, f0
1419 ; CHECK-REG-NEXT: stfs f0, -48(r1)
1420 ; CHECK-REG-NEXT: lfd f0, -32(r1)
1421 ; CHECK-REG-NEXT: fcfids f0, f0
1422 ; CHECK-REG-NEXT: stfs f0, -64(r1)
1423 ; CHECK-REG-NEXT: lxvw4x vs0, 0, r3
1424 ; CHECK-REG-NEXT: lxvw4x vs1, 0, r4
1425 ; CHECK-REG-NEXT: xxmrghw v2, vs1, vs0
1426 ; CHECK-REG-NEXT: blr
1483 ; CHECK-REG-LABEL: test46:
1484 ; CHECK-REG: # %bb.0:
1485 ; CHECK-REG-NEXT: addi r3, r1, -48
1486 ; CHECK-REG-NEXT: stxvw4x v2, 0, r3
1487 ; CHECK-REG-NEXT: lfs f0, -44(r1)
1488 ; CHECK-REG-NEXT: xscvdpuxds f0, f0
1489 ; CHECK-REG-NEXT: stfd f0, -32(r1)
1490 ; CHECK-REG-NEXT: lfs f0, -48(r1)
1491 ; CHECK-REG-NEXT: ld r3, -32(r1)
1492 ; CHECK-REG-NEXT: xscvdpuxds f0, f0
1493 ; CHECK-REG-NEXT: std r3, -8(r1)
1494 ; CHECK-REG-NEXT: stfd f0, -24(r1)
1495 ; CHECK-REG-NEXT: ld r3, -24(r1)
1496 ; CHECK-REG-NEXT: std r3, -16(r1)
1497 ; CHECK-REG-NEXT: addi r3, r1, -16
1498 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
1499 ; CHECK-REG-NEXT: blr
1550 ; CHECK-REG-LABEL: test47:
1551 ; CHECK-REG: # %bb.0:
1552 ; CHECK-REG-NEXT: addi r3, r1, -48
1553 ; CHECK-REG-NEXT: stxvw4x v2, 0, r3
1554 ; CHECK-REG-NEXT: lfs f0, -44(r1)
1555 ; CHECK-REG-NEXT: xscvdpsxds f0, f0
1556 ; CHECK-REG-NEXT: stfd f0, -32(r1)
1557 ; CHECK-REG-NEXT: lfs f0, -48(r1)
1558 ; CHECK-REG-NEXT: ld r3, -32(r1)
1559 ; CHECK-REG-NEXT: xscvdpsxds f0, f0
1560 ; CHECK-REG-NEXT: std r3, -8(r1)
1561 ; CHECK-REG-NEXT: stfd f0, -24(r1)
1562 ; CHECK-REG-NEXT: ld r3, -24(r1)
1563 ; CHECK-REG-NEXT: std r3, -16(r1)
1564 ; CHECK-REG-NEXT: addi r3, r1, -16
1565 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
1566 ; CHECK-REG-NEXT: blr
1604 ; CHECK-REG-LABEL: test50:
1605 ; CHECK-REG: # %bb.0:
1606 ; CHECK-REG-NEXT: lxvdsx v2, 0, r3
1607 ; CHECK-REG-NEXT: blr
1632 ; CHECK-REG-LABEL: test51:
1633 ; CHECK-REG: # %bb.0:
1634 ; CHECK-REG-NEXT: xxspltd v2, v2, 0
1635 ; CHECK-REG-NEXT: blr
1658 ; CHECK-REG-LABEL: test52:
1659 ; CHECK-REG: # %bb.0:
1660 ; CHECK-REG-NEXT: xxmrghd v2, v2, v3
1661 ; CHECK-REG-NEXT: blr
1684 ; CHECK-REG-LABEL: test53:
1685 ; CHECK-REG: # %bb.0:
1686 ; CHECK-REG-NEXT: xxmrghd v2, v3, v2
1687 ; CHECK-REG-NEXT: blr
1710 ; CHECK-REG-LABEL: test54:
1711 ; CHECK-REG: # %bb.0:
1712 ; CHECK-REG-NEXT: xxpermdi v2, v2, v3, 2
1713 ; CHECK-REG-NEXT: blr
1736 ; CHECK-REG-LABEL: test55:
1737 ; CHECK-REG: # %bb.0:
1738 ; CHECK-REG-NEXT: xxmrgld v2, v2, v3
1739 ; CHECK-REG-NEXT: blr
1762 ; CHECK-REG-LABEL: test56:
1763 ; CHECK-REG: # %bb.0:
1764 ; CHECK-REG-NEXT: xxmrgld v2, v2, v3
1765 ; CHECK-REG-NEXT: blr
1801 ; CHECK-REG-LABEL: test60:
1802 ; CHECK-REG: # %bb.0:
1803 ; CHECK-REG-NEXT: addi r3, r1, -32
1804 ; CHECK-REG-NEXT: addi r4, r1, -48
1805 ; CHECK-REG-NEXT: stxvd2x v3, 0, r3
1806 ; CHECK-REG-NEXT: stxvd2x v2, 0, r4
1807 ; CHECK-REG-NEXT: lwz r3, -20(r1)
1808 ; CHECK-REG-NEXT: ld r4, -40(r1)
1809 ; CHECK-REG-NEXT: sld r3, r4, r3
1810 ; CHECK-REG-NEXT: ld r4, -48(r1)
1811 ; CHECK-REG-NEXT: std r3, -8(r1)
1812 ; CHECK-REG-NEXT: lwz r3, -28(r1)
1813 ; CHECK-REG-NEXT: sld r3, r4, r3
1814 ; CHECK-REG-NEXT: std r3, -16(r1)
1815 ; CHECK-REG-NEXT: addi r3, r1, -16
1816 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
1817 ; CHECK-REG-NEXT: blr
1866 ; CHECK-REG-LABEL: test61:
1867 ; CHECK-REG: # %bb.0:
1868 ; CHECK-REG-NEXT: addi r3, r1, -32
1869 ; CHECK-REG-NEXT: addi r4, r1, -48
1870 ; CHECK-REG-NEXT: stxvd2x v3, 0, r3
1871 ; CHECK-REG-NEXT: stxvd2x v2, 0, r4
1872 ; CHECK-REG-NEXT: lwz r3, -20(r1)
1873 ; CHECK-REG-NEXT: ld r4, -40(r1)
1874 ; CHECK-REG-NEXT: srd r3, r4, r3
1875 ; CHECK-REG-NEXT: ld r4, -48(r1)
1876 ; CHECK-REG-NEXT: std r3, -8(r1)
1877 ; CHECK-REG-NEXT: lwz r3, -28(r1)
1878 ; CHECK-REG-NEXT: srd r3, r4, r3
1879 ; CHECK-REG-NEXT: std r3, -16(r1)
1880 ; CHECK-REG-NEXT: addi r3, r1, -16
1881 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
1882 ; CHECK-REG-NEXT: blr
1931 ; CHECK-REG-LABEL: test62:
1932 ; CHECK-REG: # %bb.0:
1933 ; CHECK-REG-NEXT: addi r3, r1, -32
1934 ; CHECK-REG-NEXT: addi r4, r1, -48
1935 ; CHECK-REG-NEXT: stxvd2x v3, 0, r3
1936 ; CHECK-REG-NEXT: stxvd2x v2, 0, r4
1937 ; CHECK-REG-NEXT: lwz r3, -20(r1)
1938 ; CHECK-REG-NEXT: ld r4, -40(r1)
1939 ; CHECK-REG-NEXT: srad r3, r4, r3
1940 ; CHECK-REG-NEXT: ld r4, -48(r1)
1941 ; CHECK-REG-NEXT: std r3, -8(r1)
1942 ; CHECK-REG-NEXT: lwz r3, -28(r1)
1943 ; CHECK-REG-NEXT: srad r3, r4, r3
1944 ; CHECK-REG-NEXT: std r3, -16(r1)
1945 ; CHECK-REG-NEXT: addi r3, r1, -16
1946 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
1947 ; CHECK-REG-NEXT: blr
1983 ; CHECK-REG-LABEL: test63:
1984 ; CHECK-REG: # %bb.0:
1985 ; CHECK-REG-NEXT: xxlor f1, v2, v2
1986 ; CHECK-REG-NEXT: blr
2012 ; CHECK-REG-LABEL: test64:
2013 ; CHECK-REG: # %bb.0:
2014 ; CHECK-REG-NEXT: xxswapd vs1, v2
2015 ; CHECK-REG-NEXT: # kill: def $f1 killed $f1 killed $vsl1
2016 ; CHECK-REG-NEXT: blr
2046 ; CHECK-REG-LABEL: test65:
2047 ; CHECK-REG: # %bb.0:
2048 ; CHECK-REG-NEXT: vcmpequw v2, v2, v3
2049 ; CHECK-REG-NEXT: addis r3, r2, .LCPI59_0@toc@ha
2050 ; CHECK-REG-NEXT: addi r3, r3, .LCPI59_0@toc@l
2051 ; CHECK-REG-NEXT: lxvw4x v3, 0, r3
2052 ; CHECK-REG-NEXT: vperm v3, v2, v2, v3
2053 ; CHECK-REG-NEXT: xxland v2, v3, v2
2054 ; CHECK-REG-NEXT: blr
2089 ; CHECK-REG-LABEL: test66:
2090 ; CHECK-REG: # %bb.0:
2091 ; CHECK-REG-NEXT: vcmpequw v2, v2, v3
2092 ; CHECK-REG-NEXT: addis r3, r2, .LCPI60_0@toc@ha
2093 ; CHECK-REG-NEXT: addi r3, r3, .LCPI60_0@toc@l
2094 ; CHECK-REG-NEXT: lxvw4x v3, 0, r3
2095 ; CHECK-REG-NEXT: xxlnor v2, v2, v2
2096 ; CHECK-REG-NEXT: vperm v3, v2, v2, v3
2097 ; CHECK-REG-NEXT: xxlor v2, v3, v2
2098 ; CHECK-REG-NEXT: blr
2146 ; CHECK-REG-LABEL: test67:
2147 ; CHECK-REG: # %bb.0:
2148 ; CHECK-REG-NEXT: addi r3, r1, -32
2149 ; CHECK-REG-NEXT: addi r4, r1, -48
2150 ; CHECK-REG-NEXT: stxvd2x v3, 0, r3
2151 ; CHECK-REG-NEXT: stxvd2x v2, 0, r4
2152 ; CHECK-REG-NEXT: ld r3, -24(r1)
2153 ; CHECK-REG-NEXT: ld r4, -40(r1)
2154 ; CHECK-REG-NEXT: ld r6, -48(r1)
2155 ; CHECK-REG-NEXT: cmpld r4, r3
2156 ; CHECK-REG-NEXT: li r3, 0
2157 ; CHECK-REG-NEXT: li r4, -1
2158 ; CHECK-REG-NEXT: isellt r5, r4, r3
2159 ; CHECK-REG-NEXT: std r5, -8(r1)
2160 ; CHECK-REG-NEXT: ld r5, -32(r1)
2161 ; CHECK-REG-NEXT: cmpld r6, r5
2162 ; CHECK-REG-NEXT: isellt r3, r4, r3
2163 ; CHECK-REG-NEXT: std r3, -16(r1)
2164 ; CHECK-REG-NEXT: addi r3, r1, -16
2165 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
2166 ; CHECK-REG-NEXT: blr
2208 ; CHECK-REG-LABEL: test68:
2209 ; CHECK-REG: # %bb.0:
2210 ; CHECK-REG-NEXT: xxmrghw vs0, v2, v2
2211 ; CHECK-REG-NEXT: xvcvsxwdp v2, vs0
2212 ; CHECK-REG-NEXT: blr
2250 ; CHECK-REG-LABEL: test69:
2251 ; CHECK-REG: # %bb.0:
2252 ; CHECK-REG-NEXT: addis r3, r2, .LCPI63_0@toc@ha
2253 ; CHECK-REG-NEXT: addi r3, r3, .LCPI63_0@toc@l
2254 ; CHECK-REG-NEXT: lxvw4x v3, 0, r3
2255 ; CHECK-REG-NEXT: addi r3, r1, -32
2256 ; CHECK-REG-NEXT: vperm v2, v2, v2, v3
2257 ; CHECK-REG-NEXT: stxvd2x v2, 0, r3
2258 ; CHECK-REG-NEXT: lha r3, -18(r1)
2259 ; CHECK-REG-NEXT: std r3, -8(r1)
2260 ; CHECK-REG-NEXT: lha r3, -26(r1)
2261 ; CHECK-REG-NEXT: std r3, -16(r1)
2262 ; CHECK-REG-NEXT: addi r3, r1, -16
2263 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
2264 ; CHECK-REG-NEXT: xvcvsxddp v2, v2
2265 ; CHECK-REG-NEXT: blr
2327 ; CHECK-REG-LABEL: test70:
2328 ; CHECK-REG: # %bb.0:
2329 ; CHECK-REG-NEXT: addis r3, r2, .LCPI64_0@toc@ha
2330 ; CHECK-REG-NEXT: addi r3, r3, .LCPI64_0@toc@l
2331 ; CHECK-REG-NEXT: lxvw4x v3, 0, r3
2332 ; CHECK-REG-NEXT: addi r3, r1, -32
2333 ; CHECK-REG-NEXT: vperm v2, v2, v2, v3
2334 ; CHECK-REG-NEXT: stxvd2x v2, 0, r3
2335 ; CHECK-REG-NEXT: ld r3, -24(r1)
2336 ; CHECK-REG-NEXT: extsb r3, r3
2337 ; CHECK-REG-NEXT: std r3, -8(r1)
2338 ; CHECK-REG-NEXT: ld r3, -32(r1)
2339 ; CHECK-REG-NEXT: extsb r3, r3
2340 ; CHECK-REG-NEXT: std r3, -16(r1)
2341 ; CHECK-REG-NEXT: addi r3, r1, -16
2342 ; CHECK-REG-NEXT: lxvd2x v2, 0, r3
2343 ; CHECK-REG-NEXT: xvcvsxddp v2, v2
2344 ; CHECK-REG-NEXT: blr
2401 ; CHECK-REG-LABEL: test80:
2402 ; CHECK-REG: # %bb.0:
2403 ; CHECK-REG-NEXT: addi r4, r1, -16
2404 ; CHECK-REG-NEXT: stw r3, -16(r1)
2405 ; CHECK-REG-NEXT: addis r3, r2, .LCPI65_0@toc@ha
2406 ; CHECK-REG-NEXT: lxvw4x vs0, 0, r4
2407 ; CHECK-REG-NEXT: addi r3, r3, .LCPI65_0@toc@l
2408 ; CHECK-REG-NEXT: lxvw4x v3, 0, r3
2409 ; CHECK-REG-NEXT: xxspltw v2, vs0, 0
2410 ; CHECK-REG-NEXT: vadduwm v2, v2, v3
2411 ; CHECK-REG-NEXT: blr
2450 ; CHECK-REG-LABEL: test81:
2451 ; CHECK-REG: # %bb.0:
2452 ; CHECK-REG-NEXT: blr
2476 ; CHECK-REG-LABEL: test82:
2477 ; CHECK-REG: # %bb.0: # %entry
2478 ; CHECK-REG-NEXT: xscmpudp cr0, f3, f4
2479 ; CHECK-REG-NEXT: beqlr cr0
2480 ; CHECK-REG-NEXT: # %bb.1: # %entry
2481 ; CHECK-REG-NEXT: fmr f1, f2
2482 ; CHECK-REG-NEXT: blr