Lines Matching refs:elem
85 ;vector int fromDiffMemVarAi(int *arr, int elem) { //
86 ; return (vector int) { arr[elem], arr[elem+1], arr[elem+2], arr[elem+3] }; //
90 ;vector int fromDiffMemVarDi(int *arr, int elem) { //
91 ; return (vector int) { arr[elem], arr[elem-1], arr[elem-2], arr[elem-3] }; //
100 ;vector int fromRandMemVari(int *arr, int elem) { //
101 ; return (vector int) { arr[elem+4], arr[elem+1], arr[elem+2], arr[elem+8] };//
142 ;vector int fromDiffMemVarAConvftoi(float *arr, int elem) { //
143 ; return (vector int) { arr[elem], arr[elem+1], arr[elem+2], arr[elem+3] }; //
149 ;vector int fromDiffMemVarDConvftoi(float *arr, int elem) { //
150 ; return (vector int) { arr[elem], arr[elem-1], arr[elem-2], arr[elem-3] }; //
189 ;vector int fromDiffMemVarAConvdtoi(double *arr, int elem) { //
190 ; return (vector int) { arr[elem], arr[elem+1], arr[elem+2], arr[elem+3] }; //
194 ;vector int fromDiffMemVarDConvdtoi(double *arr, int elem) { //
195 ; return (vector int) { arr[elem], arr[elem-1], arr[elem-2], arr[elem-3] }; //
252 ;vector unsigned int fromDiffMemVarAui(unsigned int *arr, int elem) { //
253 ; return (vector unsigned int) { arr[elem], arr[elem+1], //
254 ; arr[elem+2], arr[elem+3] }; //
258 ;vector unsigned int fromDiffMemVarDui(unsigned int *arr, int elem) { //
259 ; return (vector unsigned int) { arr[elem], arr[elem-1], //
260 ; arr[elem-2], arr[elem-3] }; //
269 ;vector unsigned int fromRandMemVarui(unsigned int *arr, int elem) { //
270 ; return (vector unsigned int) { arr[elem+4], arr[elem+1], //
271 ; arr[elem+2], arr[elem+8] }; //
312 ;vector unsigned int fromDiffMemVarAConvftoui(float *arr, int elem) { //
313 ; return (vector unsigned int) { arr[elem], arr[elem+1], //
314 ; arr[elem+2], arr[elem+3] }; //
320 ;vector unsigned int fromDiffMemVarDConvftoui(float *arr, int elem) { //
321 ; return (vector unsigned int) { arr[elem], arr[elem-1], //
322 ; arr[elem-2], arr[elem-3] }; //
362 ;vector unsigned int fromDiffMemVarAConvdtoui(double *arr, int elem) { //
363 ; return (vector unsigned int) { arr[elem], arr[elem+1], //
364 ; arr[elem+2], arr[elem+3] }; //
368 ;vector unsigned int fromDiffMemVarDConvdtoui(double *arr, int elem) { //
369 ; return (vector unsigned int) { arr[elem], arr[elem-1], //
370 ; arr[elem-2], arr[elem-3] }; //
426 ;vector long long fromDiffMemVarAll(long long *arr, int elem) { //
427 ; return (vector long long) { arr[elem], arr[elem+1] }; //
431 ;vector long long fromDiffMemVarDll(long long *arr, int elem) { //
432 ; return (vector long long) { arr[elem], arr[elem-1] }; //
441 ;vector long long fromRandMemVarll(long long *arr, int elem) { //
442 ; return (vector long long) { arr[elem+4], arr[elem+1] }; //
481 ;vector long long fromDiffMemVarAConvftoll(float *arr, int elem) { //
482 ; return (vector long long) { arr[elem], arr[elem+1] }; //
486 ;vector long long fromDiffMemVarDConvftoll(float *arr, int elem) { //
487 ; return (vector long long) { arr[elem], arr[elem-1] }; //
526 ;vector long long fromDiffMemVarAConvdtoll(double *arr, int elem) { //
527 ; return (vector long long) { arr[elem], arr[elem+1] }; //
531 ;vector long long fromDiffMemVarDConvdtoll(double *arr, int elem) { //
532 ; return (vector long long) { arr[elem], arr[elem-1] }; //
590 ; int elem) { //
591 ; return (vector unsigned long long) { arr[elem], arr[elem+1] }; //
596 ; int elem) { //
597 ; return (vector unsigned long long) { arr[elem], arr[elem-1] }; //
607 ; int elem) { //
608 ; return (vector unsigned long long) { arr[elem+4], arr[elem+1] }; //
647 ;vector unsigned long long fromDiffMemVarAConvftoull(float *arr, int elem) { //
648 ; return (vector unsigned long long) { arr[elem], arr[elem+1] }; //
652 ;vector unsigned long long fromDiffMemVarDConvftoull(float *arr, int elem) { //
653 ; return (vector unsigned long long) { arr[elem], arr[elem-1] }; //
692 ;vector unsigned long long fromDiffMemVarAConvdtoull(double *arr, int elem) { //
693 ; return (vector unsigned long long) { arr[elem], arr[elem+1] }; //
697 ;vector unsigned long long fromDiffMemVarDConvdtoull(double *arr, int elem) { //
698 ; return (vector unsigned long long) { arr[elem], arr[elem-1] }; //
974 define <4 x i32> @fromDiffMemVarAi(i32* nocapture readonly %arr, i32 signext %elem) {
1000 %idxprom = sext i32 %elem to i64
1004 %add = add nsw i32 %elem, 1
1009 %add4 = add nsw i32 %elem, 2
1014 %add8 = add nsw i32 %elem, 3
1022 define <4 x i32> @fromDiffMemVarDi(i32* nocapture readonly %arr, i32 signext %elem) {
1073 %idxprom = sext i32 %elem to i64
1077 %sub = add nsw i32 %elem, -1
1082 %sub4 = add nsw i32 %elem, -2
1087 %sub8 = add nsw i32 %elem, -3
1159 define <4 x i32> @fromRandMemVari(i32* nocapture readonly %arr, i32 signext %elem) {
1216 %add = add nsw i32 %elem, 4
1221 %add1 = add nsw i32 %elem, 1
1226 %add5 = add nsw i32 %elem, 2
1231 %add9 = add nsw i32 %elem, 8
1510 define <4 x i32> @fromDiffMemVarAConvftoi(float* nocapture readonly %arr, i32 signext %elem) {
1571 %idxprom = sext i32 %elem to i64
1576 %add = add nsw i32 %elem, 1
1582 %add5 = add nsw i32 %elem, 2
1588 %add10 = add nsw i32 %elem, 3
1597 define <4 x i32> @fromDiffMemVarDConvftoi(float* nocapture readonly %arr, i32 signext %elem) {
1658 %idxprom = sext i32 %elem to i64
1663 %sub = add nsw i32 %elem, -1
1669 %sub5 = add nsw i32 %elem, -2
1675 %sub10 = add nsw i32 %elem, -3
2004 define <4 x i32> @fromDiffMemVarAConvdtoi(double* nocapture readonly %arr, i32 signext %elem) {
2061 %idxprom = sext i32 %elem to i64
2066 %add = add nsw i32 %elem, 1
2072 %add5 = add nsw i32 %elem, 2
2078 %add10 = add nsw i32 %elem, 3
2087 define <4 x i32> @fromDiffMemVarDConvdtoi(double* nocapture readonly %arr, i32 signext %elem) {
2144 %idxprom = sext i32 %elem to i64
2149 %sub = add nsw i32 %elem, -1
2155 %sub5 = add nsw i32 %elem, -2
2161 %sub10 = add nsw i32 %elem, -3
2499 define <4 x i32> @fromDiffMemVarAui(i32* nocapture readonly %arr, i32 signext %elem) {
2525 %idxprom = sext i32 %elem to i64
2529 %add = add nsw i32 %elem, 1
2534 %add4 = add nsw i32 %elem, 2
2539 %add8 = add nsw i32 %elem, 3
2547 define <4 x i32> @fromDiffMemVarDui(i32* nocapture readonly %arr, i32 signext %elem) {
2598 %idxprom = sext i32 %elem to i64
2602 %sub = add nsw i32 %elem, -1
2607 %sub4 = add nsw i32 %elem, -2
2612 %sub8 = add nsw i32 %elem, -3
2684 define <4 x i32> @fromRandMemVarui(i32* nocapture readonly %arr, i32 signext %elem) {
2741 %add = add nsw i32 %elem, 4
2746 %add1 = add nsw i32 %elem, 1
2751 %add5 = add nsw i32 %elem, 2
2756 %add9 = add nsw i32 %elem, 8
3035 define <4 x i32> @fromDiffMemVarAConvftoui(float* nocapture readonly %arr, i32 signext %elem) {
3096 %idxprom = sext i32 %elem to i64
3101 %add = add nsw i32 %elem, 1
3107 %add5 = add nsw i32 %elem, 2
3113 %add10 = add nsw i32 %elem, 3
3123 define <4 x i32> @fromDiffMemVarDConvftoui(float* nocapture readonly %arr, i32 signext %elem) {
3184 %idxprom = sext i32 %elem to i64
3189 %sub = add nsw i32 %elem, -1
3195 %sub5 = add nsw i32 %elem, -2
3201 %sub10 = add nsw i32 %elem, -3
3530 define <4 x i32> @fromDiffMemVarAConvdtoui(double* nocapture readonly %arr, i32 signext %elem) {
3587 %idxprom = sext i32 %elem to i64
3592 %add = add nsw i32 %elem, 1
3598 %add5 = add nsw i32 %elem, 2
3604 %add10 = add nsw i32 %elem, 3
3613 define <4 x i32> @fromDiffMemVarDConvdtoui(double* nocapture readonly %arr, i32 signext %elem) {
3670 %idxprom = sext i32 %elem to i64
3675 %sub = add nsw i32 %elem, -1
3681 %sub5 = add nsw i32 %elem, -2
3687 %sub10 = add nsw i32 %elem, -3
4014 define <2 x i64> @fromDiffMemVarAll(i64* nocapture readonly %arr, i32 signext %elem) {
4040 %idxprom = sext i32 %elem to i64
4044 %add = add nsw i32 %elem, 1
4052 define <2 x i64> @fromDiffMemVarDll(i64* nocapture readonly %arr, i32 signext %elem) {
4087 %idxprom = sext i32 %elem to i64
4091 %sub = add nsw i32 %elem, -1
4141 define <2 x i64> @fromRandMemVarll(i64* nocapture readonly %arr, i32 signext %elem) {
4182 %add = add nsw i32 %elem, 4
4187 %add1 = add nsw i32 %elem, 1
4443 define <2 x i64> @fromDiffMemVarAConvftoll(float* nocapture readonly %arr, i32 signext %elem) {
4480 %idxprom = sext i32 %elem to i64
4485 %add = add nsw i32 %elem, 1
4494 define <2 x i64> @fromDiffMemVarDConvftoll(float* nocapture readonly %arr, i32 signext %elem) {
4531 %idxprom = sext i32 %elem to i64
4536 %sub = add nsw i32 %elem, -1
4791 define <2 x i64> @fromDiffMemVarAConvdtoll(double* nocapture readonly %arr, i32 signext %elem) {
4821 %idxprom = sext i32 %elem to i64
4826 %add = add nsw i32 %elem, 1
4835 define <2 x i64> @fromDiffMemVarDConvdtoll(double* nocapture readonly %arr, i32 signext %elem) {
4874 %idxprom = sext i32 %elem to i64
4879 %sub = add nsw i32 %elem, -1
5202 define <2 x i64> @fromDiffMemVarAull(i64* nocapture readonly %arr, i32 signext %elem) {
5228 %idxprom = sext i32 %elem to i64
5232 %add = add nsw i32 %elem, 1
5240 define <2 x i64> @fromDiffMemVarDull(i64* nocapture readonly %arr, i32 signext %elem) {
5275 %idxprom = sext i32 %elem to i64
5279 %sub = add nsw i32 %elem, -1
5329 define <2 x i64> @fromRandMemVarull(i64* nocapture readonly %arr, i32 signext %elem) {
5370 %add = add nsw i32 %elem, 4
5375 %add1 = add nsw i32 %elem, 1
5631 define <2 x i64> @fromDiffMemVarAConvftoull(float* nocapture readonly %arr, i32 signext %elem) {
5668 %idxprom = sext i32 %elem to i64
5673 %add = add nsw i32 %elem, 1
5682 define <2 x i64> @fromDiffMemVarDConvftoull(float* nocapture readonly %arr, i32 signext %elem) {
5719 %idxprom = sext i32 %elem to i64
5724 %sub = add nsw i32 %elem, -1
5979 define <2 x i64> @fromDiffMemVarAConvdtoull(double* nocapture readonly %arr, i32 signext %elem) {
6009 %idxprom = sext i32 %elem to i64
6014 %add = add nsw i32 %elem, 1
6023 define <2 x i64> @fromDiffMemVarDConvdtoull(double* nocapture readonly %arr, i32 signext %elem) {
6062 %idxprom = sext i32 %elem to i64
6067 %sub = add nsw i32 %elem, -1