Lines Matching refs:E4
117 ; CHECK-DAG: ld.param.u8 [[E4:%rs[0-9]+]], [test_v5i1_param_0+4];
121 ; CHECK-DAG: st.param.b8 [param0+4], [[E4]];
253 ; CHECK-DAG: ld.param.u8 [[E4:%rs[0-9]+]], [test_v5i8_param_0+4];
257 ; CHECK-DAG: st.param.b8 [param0+4], [[E4]];
366 ; CHECK-DAG: ld.param.u16 [[E4:%rs[0-9]+]], [test_v5i16_param_0+8];
370 ; CHECK-DAG: st.param.b16 [param0+8], [[E4]];
464 ; CHECK-DAG: ld.param.b16 [[E4:%h[0-9]+]], [test_v5f16_param_0+8];
467 ; CHECK-DAG: st.param.b16 [param0+8], [[E4]];
506 ; CHECK-DAG: ld.param.v4.b16 {[[E4:%h[0-9]+]], [[E5:%h[0-9]+]], [[E6:%h[0-9]+]], [[E7:%h[0-9]+]]}…
656 ; CHECK-DAG: ld.param.u32 [[E4:%r[0-9]+]], [test_v5i32_param_0+16];
660 ; CHECK-DAG: st.param.b32 [param0+16], [[E4]];
987 ; CHECK-DAG: ld.param.u64 [[E4:%rd[0-9]+]], [test_s_i32f32_param_0+16];
997 ; CHECK-DAG: st.param.b64 [param0+16], [[E4]];
1027 ; CHECK: st.param.b64 [param0+16], [[E4]];
1048 ; CHECK: ld.param.u32 [[E4:%r[0-9]+]], [test_s_i1i32x4_param_0+16];
1056 ; CHECK: st.param.b32 [param0+16], [[E4]];
1149 ; CHECK: ld.param.v4.u32 {[[E3:%r[0-9]+]], [[E4:%r[0-9]+]], [[E5:%r[0-9]+]], [[E6:%r[0-9]+]]…
1155 ; CHECK: st.param.v4.b32 [param0+16], {[[E3]], [[E4]], [[E5]], [[E6]]};