Lines Matching refs:f0
12 define i32 @i32_icmp_ne_i32_val(i32 signext %s, i32 signext %f0, i32 signext %f1) nounwind readnone…
52 %cond = select i1 %tobool, i32 %f1, i32 %f0
60 define i64 @i32_icmp_ne_i64_val(i32 signext %s, i64 %f0, i64 %f1) nounwind readnone {
114 %cond = select i1 %tobool, i64 %f1, i64 %f0
118 define i64 @i64_icmp_ne_i64_val(i64 %s, i64 %f0, i64 %f1) nounwind readnone {
174 %cond = select i1 %tobool, i64 %f1, i64 %f0
178 define float @i32_icmp_ne_f32_val(i32 signext %s, float %f0, float %f1) nounwind readnone {
181 ; 32-NEXT: mtc1 $6, $f0
184 ; 32-NEXT: movn.s $f0, $f1, $4
188 ; 32R2-NEXT: mtc1 $6, $f0
191 ; 32R2-NEXT: movn.s $f0, $f1, $4
199 ; 32R6-NEXT: mtc1 $1, $f0
201 ; 32R6-NEXT: sel.s $f0, $f2, $f1
205 ; 64-NEXT: mov.s $f0, $f14
207 ; 64-NEXT: movn.s $f0, $f13, $4
211 ; 64R2-NEXT: mov.s $f0, $f14
213 ; 64R2-NEXT: movn.s $f0, $f13, $4
219 ; 64R6-NEXT: mtc1 $1, $f0
221 ; 64R6-NEXT: sel.s $f0, $f14, $f13
224 %cond = select i1 %tobool, float %f0, float %f1
228 define double @i32_icmp_ne_f64_val(i32 signext %s, double %f0, double %f1) nounwind readnone {
233 ; 32-NEXT: ldc1 $f0, 16($sp)
235 ; 32-NEXT: movn.d $f0, $f2, $4
241 ; 32R2-NEXT: ldc1 $f0, 16($sp)
243 ; 32R2-NEXT: movn.d $f0, $f2, $4
251 ; 32R6-NEXT: mtc1 $1, $f0
254 ; 32R6-NEXT: sel.d $f0, $f2, $f1
258 ; 64-NEXT: mov.d $f0, $f14
260 ; 64-NEXT: movn.d $f0, $f13, $4
264 ; 64R2-NEXT: mov.d $f0, $f14
266 ; 64R2-NEXT: movn.d $f0, $f13, $4
272 ; 64R6-NEXT: mtc1 $1, $f0
274 ; 64R6-NEXT: sel.d $f0, $f14, $f13
277 %cond = select i1 %tobool, double %f0, double %f1
281 define float @f32_fcmp_oeq_f32_val(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
284 ; 32-NEXT: mov.s $f0, $f14
289 ; 32-NEXT: movt.s $f0, $f12, $fcc0
293 ; 32R2-NEXT: mov.s $f0, $f14
298 ; 32R2-NEXT: movt.s $f0, $f12, $fcc0
302 ; 32R6-NEXT: mtc1 $7, $f0
304 ; 32R6-NEXT: cmp.eq.s $f0, $f1, $f0
306 ; 32R6-NEXT: sel.s $f0, $f14, $f12
310 ; 64-NEXT: mov.s $f0, $f13
313 ; 64-NEXT: movt.s $f0, $f12, $fcc0
317 ; 64R2-NEXT: mov.s $f0, $f13
320 ; 64R2-NEXT: movt.s $f0, $f12, $fcc0
324 ; 64R6-NEXT: cmp.eq.s $f0, $f14, $f15
326 ; 64R6-NEXT: sel.s $f0, $f13, $f12
329 %cond = select i1 %cmp, float %f0, float %f1
333 define float @f32_fcmp_olt_f32_val(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
336 ; 32-NEXT: mov.s $f0, $f14
341 ; 32-NEXT: movt.s $f0, $f12, $fcc0
345 ; 32R2-NEXT: mov.s $f0, $f14
350 ; 32R2-NEXT: movt.s $f0, $f12, $fcc0
354 ; 32R6-NEXT: mtc1 $7, $f0
356 ; 32R6-NEXT: cmp.lt.s $f0, $f1, $f0
358 ; 32R6-NEXT: sel.s $f0, $f14, $f12
362 ; 64-NEXT: mov.s $f0, $f13
365 ; 64-NEXT: movt.s $f0, $f12, $fcc0
369 ; 64R2-NEXT: mov.s $f0, $f13
372 ; 64R2-NEXT: movt.s $f0, $f12, $fcc0
376 ; 64R6-NEXT: cmp.lt.s $f0, $f14, $f15
378 ; 64R6-NEXT: sel.s $f0, $f13, $f12
381 %cond = select i1 %cmp, float %f0, float %f1
385 define float @f32_fcmp_ogt_f32_val(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
388 ; 32-NEXT: mov.s $f0, $f14
393 ; 32-NEXT: movf.s $f0, $f12, $fcc0
397 ; 32R2-NEXT: mov.s $f0, $f14
402 ; 32R2-NEXT: movf.s $f0, $f12, $fcc0
406 ; 32R6-NEXT: mtc1 $6, $f0
408 ; 32R6-NEXT: cmp.lt.s $f0, $f1, $f0
410 ; 32R6-NEXT: sel.s $f0, $f14, $f12
414 ; 64-NEXT: mov.s $f0, $f13
417 ; 64-NEXT: movf.s $f0, $f12, $fcc0
421 ; 64R2-NEXT: mov.s $f0, $f13
424 ; 64R2-NEXT: movf.s $f0, $f12, $fcc0
428 ; 64R6-NEXT: cmp.lt.s $f0, $f15, $f14
430 ; 64R6-NEXT: sel.s $f0, $f13, $f12
433 %cond = select i1 %cmp, float %f0, float %f1
437 define double @f32_fcmp_ogt_f64_val(double %f0, double %f1, float %f2, float %f3) nounwind readnone…
440 ; 32-NEXT: mov.d $f0, $f14
445 ; 32-NEXT: movf.d $f0, $f12, $fcc0
449 ; 32R2-NEXT: mov.d $f0, $f14
454 ; 32R2-NEXT: movf.d $f0, $f12, $fcc0
458 ; 32R6-NEXT: lwc1 $f0, 16($sp)
460 ; 32R6-NEXT: cmp.lt.s $f0, $f1, $f0
461 ; 32R6-NEXT: mfc1 $1, $f0
462 ; 32R6-NEXT: mtc1 $1, $f0
464 ; 32R6-NEXT: sel.d $f0, $f14, $f12
468 ; 64-NEXT: mov.d $f0, $f13
471 ; 64-NEXT: movf.d $f0, $f12, $fcc0
475 ; 64R2-NEXT: mov.d $f0, $f13
478 ; 64R2-NEXT: movf.d $f0, $f12, $fcc0
482 ; 64R6-NEXT: cmp.lt.s $f0, $f15, $f14
483 ; 64R6-NEXT: mfc1 $1, $f0
484 ; 64R6-NEXT: mtc1 $1, $f0
486 ; 64R6-NEXT: sel.d $f0, $f13, $f12
489 %cond = select i1 %cmp, double %f0, double %f1
493 define double @f64_fcmp_oeq_f64_val(double %f0, double %f1, double %f2, double %f3) nounwind readno…
496 ; 32-NEXT: mov.d $f0, $f14
501 ; 32-NEXT: movt.d $f0, $f12, $fcc0
505 ; 32R2-NEXT: mov.d $f0, $f14
510 ; 32R2-NEXT: movt.d $f0, $f12, $fcc0
514 ; 32R6-NEXT: ldc1 $f0, 24($sp)
516 ; 32R6-NEXT: cmp.eq.d $f0, $f1, $f0
517 ; 32R6-NEXT: mfc1 $1, $f0
518 ; 32R6-NEXT: mtc1 $1, $f0
520 ; 32R6-NEXT: sel.d $f0, $f14, $f12
524 ; 64-NEXT: mov.d $f0, $f13
527 ; 64-NEXT: movt.d $f0, $f12, $fcc0
531 ; 64R2-NEXT: mov.d $f0, $f13
534 ; 64R2-NEXT: movt.d $f0, $f12, $fcc0
538 ; 64R6-NEXT: cmp.eq.d $f0, $f14, $f15
539 ; 64R6-NEXT: mfc1 $1, $f0
540 ; 64R6-NEXT: mtc1 $1, $f0
542 ; 64R6-NEXT: sel.d $f0, $f13, $f12
545 %cond = select i1 %cmp, double %f0, double %f1
549 define double @f64_fcmp_olt_f64_val(double %f0, double %f1, double %f2, double %f3) nounwind readno…
552 ; 32-NEXT: mov.d $f0, $f14
557 ; 32-NEXT: movt.d $f0, $f12, $fcc0
561 ; 32R2-NEXT: mov.d $f0, $f14
566 ; 32R2-NEXT: movt.d $f0, $f12, $fcc0
570 ; 32R6-NEXT: ldc1 $f0, 24($sp)
572 ; 32R6-NEXT: cmp.lt.d $f0, $f1, $f0
573 ; 32R6-NEXT: mfc1 $1, $f0
574 ; 32R6-NEXT: mtc1 $1, $f0
576 ; 32R6-NEXT: sel.d $f0, $f14, $f12
580 ; 64-NEXT: mov.d $f0, $f13
583 ; 64-NEXT: movt.d $f0, $f12, $fcc0
587 ; 64R2-NEXT: mov.d $f0, $f13
590 ; 64R2-NEXT: movt.d $f0, $f12, $fcc0
594 ; 64R6-NEXT: cmp.lt.d $f0, $f14, $f15
595 ; 64R6-NEXT: mfc1 $1, $f0
596 ; 64R6-NEXT: mtc1 $1, $f0
598 ; 64R6-NEXT: sel.d $f0, $f13, $f12
601 %cond = select i1 %cmp, double %f0, double %f1
605 define double @f64_fcmp_ogt_f64_val(double %f0, double %f1, double %f2, double %f3) nounwind readno…
608 ; 32-NEXT: mov.d $f0, $f14
613 ; 32-NEXT: movf.d $f0, $f12, $fcc0
617 ; 32R2-NEXT: mov.d $f0, $f14
622 ; 32R2-NEXT: movf.d $f0, $f12, $fcc0
626 ; 32R6-NEXT: ldc1 $f0, 16($sp)
628 ; 32R6-NEXT: cmp.lt.d $f0, $f1, $f0
629 ; 32R6-NEXT: mfc1 $1, $f0
630 ; 32R6-NEXT: mtc1 $1, $f0
632 ; 32R6-NEXT: sel.d $f0, $f14, $f12
636 ; 64-NEXT: mov.d $f0, $f13
639 ; 64-NEXT: movf.d $f0, $f12, $fcc0
643 ; 64R2-NEXT: mov.d $f0, $f13
646 ; 64R2-NEXT: movf.d $f0, $f12, $fcc0
650 ; 64R6-NEXT: cmp.lt.d $f0, $f15, $f14
651 ; 64R6-NEXT: mfc1 $1, $f0
652 ; 64R6-NEXT: mtc1 $1, $f0
654 ; 64R6-NEXT: sel.d $f0, $f13, $f12
657 %cond = select i1 %cmp, double %f0, double %f1
661 define float @f64_fcmp_ogt_f32_val(float %f0, float %f1, double %f2, double %f3) nounwind readnone {
664 ; 32-NEXT: mov.s $f0, $f14
670 ; 32-NEXT: movf.s $f0, $f12, $fcc0
674 ; 32R2-NEXT: mov.s $f0, $f14
680 ; 32R2-NEXT: movf.s $f0, $f12, $fcc0
684 ; 32R6-NEXT: mtc1 $6, $f0
685 ; 32R6-NEXT: mthc1 $7, $f0
687 ; 32R6-NEXT: cmp.lt.d $f0, $f1, $f0
689 ; 32R6-NEXT: sel.s $f0, $f14, $f12
693 ; 64-NEXT: mov.s $f0, $f13
696 ; 64-NEXT: movf.s $f0, $f12, $fcc0
700 ; 64R2-NEXT: mov.s $f0, $f13
703 ; 64R2-NEXT: movf.s $f0, $f12, $fcc0
707 ; 64R6-NEXT: cmp.lt.d $f0, $f15, $f14
709 ; 64R6-NEXT: sel.s $f0, $f13, $f12
712 %cond = select i1 %cmp, float %f0, float %f1
716 define i32 @f32_fcmp_oeq_i32_val(i32 signext %f0, i32 signext %f1, float %f2, float %f3) nounwind r…
719 ; 32-NEXT: mtc1 $7, $f0
721 ; 32-NEXT: c.eq.s $f1, $f0
728 ; 32R2-NEXT: mtc1 $7, $f0
730 ; 32R2-NEXT: c.eq.s $f1, $f0
737 ; 32R6-NEXT: mtc1 $7, $f0
739 ; 32R6-NEXT: cmp.eq.s $f0, $f1, $f0
740 ; 32R6-NEXT: mfc1 $1, $f0
763 ; 64R6-NEXT: cmp.eq.s $f0, $f14, $f15
764 ; 64R6-NEXT: mfc1 $1, $f0
772 %cond = select i1 %cmp, i32 %f0, i32 %f1
776 define i32 @f32_fcmp_olt_i32_val(i32 signext %f0, i32 signext %f1, float %f2, float %f3) nounwind r…
779 ; 32-NEXT: mtc1 $7, $f0
781 ; 32-NEXT: c.olt.s $f1, $f0
788 ; 32R2-NEXT: mtc1 $7, $f0
790 ; 32R2-NEXT: c.olt.s $f1, $f0
797 ; 32R6-NEXT: mtc1 $7, $f0
799 ; 32R6-NEXT: cmp.lt.s $f0, $f1, $f0
800 ; 32R6-NEXT: mfc1 $1, $f0
823 ; 64R6-NEXT: cmp.lt.s $f0, $f14, $f15
824 ; 64R6-NEXT: mfc1 $1, $f0
832 %cond = select i1 %cmp, i32 %f0, i32 %f1
836 define i32 @f32_fcmp_ogt_i32_val(i32 signext %f0, i32 signext %f1, float %f2, float %f3) nounwind r…
839 ; 32-NEXT: mtc1 $7, $f0
841 ; 32-NEXT: c.ule.s $f1, $f0
848 ; 32R2-NEXT: mtc1 $7, $f0
850 ; 32R2-NEXT: c.ule.s $f1, $f0
857 ; 32R6-NEXT: mtc1 $6, $f0
859 ; 32R6-NEXT: cmp.lt.s $f0, $f1, $f0
860 ; 32R6-NEXT: mfc1 $1, $f0
883 ; 64R6-NEXT: cmp.lt.s $f0, $f15, $f14
884 ; 64R6-NEXT: mfc1 $1, $f0
892 %cond = select i1 %cmp, i32 %f0, i32 %f1
896 define i32 @f64_fcmp_oeq_i32_val(i32 signext %f0, i32 signext %f1) nounwind readonly {
903 ; 32-NEXT: ldc1 $f0, 0($2)
906 ; 32-NEXT: c.eq.d $f2, $f0
917 ; 32R2-NEXT: ldc1 $f0, 0($2)
920 ; 32R2-NEXT: c.eq.d $f2, $f0
931 ; 32R6-NEXT: ldc1 $f0, 0($2)
934 ; 32R6-NEXT: cmp.eq.d $f0, $f1, $f0
935 ; 32R6-NEXT: mfc1 $1, $f0
948 ; 64-NEXT: ldc1 $f0, 0($2)
951 ; 64-NEXT: c.eq.d $f1, $f0
962 ; 64R2-NEXT: ldc1 $f0, 0($2)
965 ; 64R2-NEXT: c.eq.d $f1, $f0
976 ; 64R6-NEXT: ldc1 $f0, 0($2)
979 ; 64R6-NEXT: cmp.eq.d $f0, $f1, $f0
980 ; 64R6-NEXT: mfc1 $1, $f0
990 %cond = select i1 %cmp, i32 %f0, i32 %f1
994 define i32 @f64_fcmp_olt_i32_val(i32 signext %f0, i32 signext %f1) nounwind readonly {
1001 ; 32-NEXT: ldc1 $f0, 0($2)
1004 ; 32-NEXT: c.olt.d $f2, $f0
1015 ; 32R2-NEXT: ldc1 $f0, 0($2)
1018 ; 32R2-NEXT: c.olt.d $f2, $f0
1029 ; 32R6-NEXT: ldc1 $f0, 0($2)
1032 ; 32R6-NEXT: cmp.lt.d $f0, $f1, $f0
1033 ; 32R6-NEXT: mfc1 $1, $f0
1046 ; 64-NEXT: ldc1 $f0, 0($2)
1049 ; 64-NEXT: c.olt.d $f1, $f0
1060 ; 64R2-NEXT: ldc1 $f0, 0($2)
1063 ; 64R2-NEXT: c.olt.d $f1, $f0
1074 ; 64R6-NEXT: ldc1 $f0, 0($2)
1077 ; 64R6-NEXT: cmp.lt.d $f0, $f1, $f0
1078 ; 64R6-NEXT: mfc1 $1, $f0
1088 %cond = select i1 %cmp, i32 %f0, i32 %f1
1092 define i32 @f64_fcmp_ogt_i32_val(i32 signext %f0, i32 signext %f1) nounwind readonly {
1099 ; 32-NEXT: ldc1 $f0, 0($2)
1102 ; 32-NEXT: c.ule.d $f2, $f0
1113 ; 32R2-NEXT: ldc1 $f0, 0($2)
1116 ; 32R2-NEXT: c.ule.d $f2, $f0
1127 ; 32R6-NEXT: ldc1 $f0, 0($2)
1130 ; 32R6-NEXT: cmp.lt.d $f0, $f1, $f0
1131 ; 32R6-NEXT: mfc1 $1, $f0
1144 ; 64-NEXT: ldc1 $f0, 0($2)
1147 ; 64-NEXT: c.ule.d $f1, $f0
1158 ; 64R2-NEXT: ldc1 $f0, 0($2)
1161 ; 64R2-NEXT: c.ule.d $f1, $f0
1172 ; 64R6-NEXT: ldc1 $f0, 0($2)
1175 ; 64R6-NEXT: cmp.lt.d $f0, $f1, $f0
1176 ; 64R6-NEXT: mfc1 $1, $f0
1186 %cond = select i1 %cmp, i32 %f0, i32 %f1