Lines Matching refs:mips
4 ; RUN: llc -march=mips -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s
15 %2 = tail call <4 x i32> @llvm.mips.fcaf.w(<4 x float> %0, <4 x float> %1)
20 declare <4 x i32> @llvm.mips.fcaf.w(<4 x float>, <4 x float>) nounwind
37 %2 = tail call <2 x i64> @llvm.mips.fcaf.d(<2 x double> %0, <2 x double> %1)
42 declare <2 x i64> @llvm.mips.fcaf.d(<2 x double>, <2 x double>) nounwind
59 %2 = tail call <4 x i32> @llvm.mips.fceq.w(<4 x float> %0, <4 x float> %1)
64 declare <4 x i32> @llvm.mips.fceq.w(<4 x float>, <4 x float>) nounwind
81 %2 = tail call <2 x i64> @llvm.mips.fceq.d(<2 x double> %0, <2 x double> %1)
86 declare <2 x i64> @llvm.mips.fceq.d(<2 x double>, <2 x double>) nounwind
103 %2 = tail call <4 x i32> @llvm.mips.fcle.w(<4 x float> %0, <4 x float> %1)
108 declare <4 x i32> @llvm.mips.fcle.w(<4 x float>, <4 x float>) nounwind
125 %2 = tail call <2 x i64> @llvm.mips.fcle.d(<2 x double> %0, <2 x double> %1)
130 declare <2 x i64> @llvm.mips.fcle.d(<2 x double>, <2 x double>) nounwind
147 %2 = tail call <4 x i32> @llvm.mips.fclt.w(<4 x float> %0, <4 x float> %1)
152 declare <4 x i32> @llvm.mips.fclt.w(<4 x float>, <4 x float>) nounwind
169 %2 = tail call <2 x i64> @llvm.mips.fclt.d(<2 x double> %0, <2 x double> %1)
174 declare <2 x i64> @llvm.mips.fclt.d(<2 x double>, <2 x double>) nounwind
191 %2 = tail call <4 x i32> @llvm.mips.fcor.w(<4 x float> %0, <4 x float> %1)
196 declare <4 x i32> @llvm.mips.fcor.w(<4 x float>, <4 x float>) nounwind
213 %2 = tail call <2 x i64> @llvm.mips.fcor.d(<2 x double> %0, <2 x double> %1)
218 declare <2 x i64> @llvm.mips.fcor.d(<2 x double>, <2 x double>) nounwind
235 %2 = tail call <4 x i32> @llvm.mips.fcne.w(<4 x float> %0, <4 x float> %1)
240 declare <4 x i32> @llvm.mips.fcne.w(<4 x float>, <4 x float>) nounwind
257 %2 = tail call <2 x i64> @llvm.mips.fcne.d(<2 x double> %0, <2 x double> %1)
262 declare <2 x i64> @llvm.mips.fcne.d(<2 x double>, <2 x double>) nounwind
279 %2 = tail call <4 x i32> @llvm.mips.fcueq.w(<4 x float> %0, <4 x float> %1)
284 declare <4 x i32> @llvm.mips.fcueq.w(<4 x float>, <4 x float>) nounwind
301 %2 = tail call <2 x i64> @llvm.mips.fcueq.d(<2 x double> %0, <2 x double> %1)
306 declare <2 x i64> @llvm.mips.fcueq.d(<2 x double>, <2 x double>) nounwind
323 %2 = tail call <4 x i32> @llvm.mips.fcult.w(<4 x float> %0, <4 x float> %1)
328 declare <4 x i32> @llvm.mips.fcult.w(<4 x float>, <4 x float>) nounwind
345 %2 = tail call <2 x i64> @llvm.mips.fcult.d(<2 x double> %0, <2 x double> %1)
350 declare <2 x i64> @llvm.mips.fcult.d(<2 x double>, <2 x double>) nounwind
367 %2 = tail call <4 x i32> @llvm.mips.fcule.w(<4 x float> %0, <4 x float> %1)
372 declare <4 x i32> @llvm.mips.fcule.w(<4 x float>, <4 x float>) nounwind
389 %2 = tail call <2 x i64> @llvm.mips.fcule.d(<2 x double> %0, <2 x double> %1)
394 declare <2 x i64> @llvm.mips.fcule.d(<2 x double>, <2 x double>) nounwind
411 %2 = tail call <4 x i32> @llvm.mips.fcun.w(<4 x float> %0, <4 x float> %1)
416 declare <4 x i32> @llvm.mips.fcun.w(<4 x float>, <4 x float>) nounwind
433 %2 = tail call <2 x i64> @llvm.mips.fcun.d(<2 x double> %0, <2 x double> %1)
438 declare <2 x i64> @llvm.mips.fcun.d(<2 x double>, <2 x double>) nounwind
455 %2 = tail call <4 x i32> @llvm.mips.fcune.w(<4 x float> %0, <4 x float> %1)
460 declare <4 x i32> @llvm.mips.fcune.w(<4 x float>, <4 x float>) nounwind
477 %2 = tail call <2 x i64> @llvm.mips.fcune.d(<2 x double> %0, <2 x double> %1)
482 declare <2 x i64> @llvm.mips.fcune.d(<2 x double>, <2 x double>) nounwind
499 %2 = tail call <4 x i32> @llvm.mips.fsaf.w(<4 x float> %0, <4 x float> %1)
504 declare <4 x i32> @llvm.mips.fsaf.w(<4 x float>, <4 x float>) nounwind
521 %2 = tail call <2 x i64> @llvm.mips.fsaf.d(<2 x double> %0, <2 x double> %1)
526 declare <2 x i64> @llvm.mips.fsaf.d(<2 x double>, <2 x double>) nounwind
543 %2 = tail call <4 x i32> @llvm.mips.fseq.w(<4 x float> %0, <4 x float> %1)
548 declare <4 x i32> @llvm.mips.fseq.w(<4 x float>, <4 x float>) nounwind
565 %2 = tail call <2 x i64> @llvm.mips.fseq.d(<2 x double> %0, <2 x double> %1)
570 declare <2 x i64> @llvm.mips.fseq.d(<2 x double>, <2 x double>) nounwind
587 %2 = tail call <4 x i32> @llvm.mips.fsle.w(<4 x float> %0, <4 x float> %1)
592 declare <4 x i32> @llvm.mips.fsle.w(<4 x float>, <4 x float>) nounwind
609 %2 = tail call <2 x i64> @llvm.mips.fsle.d(<2 x double> %0, <2 x double> %1)
614 declare <2 x i64> @llvm.mips.fsle.d(<2 x double>, <2 x double>) nounwind
631 %2 = tail call <4 x i32> @llvm.mips.fslt.w(<4 x float> %0, <4 x float> %1)
636 declare <4 x i32> @llvm.mips.fslt.w(<4 x float>, <4 x float>) nounwind
653 %2 = tail call <2 x i64> @llvm.mips.fslt.d(<2 x double> %0, <2 x double> %1)
658 declare <2 x i64> @llvm.mips.fslt.d(<2 x double>, <2 x double>) nounwind
675 %2 = tail call <4 x i32> @llvm.mips.fsor.w(<4 x float> %0, <4 x float> %1)
680 declare <4 x i32> @llvm.mips.fsor.w(<4 x float>, <4 x float>) nounwind
697 %2 = tail call <2 x i64> @llvm.mips.fsor.d(<2 x double> %0, <2 x double> %1)
702 declare <2 x i64> @llvm.mips.fsor.d(<2 x double>, <2 x double>) nounwind
719 %2 = tail call <4 x i32> @llvm.mips.fsne.w(<4 x float> %0, <4 x float> %1)
724 declare <4 x i32> @llvm.mips.fsne.w(<4 x float>, <4 x float>) nounwind
741 %2 = tail call <2 x i64> @llvm.mips.fsne.d(<2 x double> %0, <2 x double> %1)
746 declare <2 x i64> @llvm.mips.fsne.d(<2 x double>, <2 x double>) nounwind
763 %2 = tail call <4 x i32> @llvm.mips.fsueq.w(<4 x float> %0, <4 x float> %1)
768 declare <4 x i32> @llvm.mips.fsueq.w(<4 x float>, <4 x float>) nounwind
785 %2 = tail call <2 x i64> @llvm.mips.fsueq.d(<2 x double> %0, <2 x double> %1)
790 declare <2 x i64> @llvm.mips.fsueq.d(<2 x double>, <2 x double>) nounwind
807 %2 = tail call <4 x i32> @llvm.mips.fsult.w(<4 x float> %0, <4 x float> %1)
812 declare <4 x i32> @llvm.mips.fsult.w(<4 x float>, <4 x float>) nounwind
829 %2 = tail call <2 x i64> @llvm.mips.fsult.d(<2 x double> %0, <2 x double> %1)
834 declare <2 x i64> @llvm.mips.fsult.d(<2 x double>, <2 x double>) nounwind
851 %2 = tail call <4 x i32> @llvm.mips.fsule.w(<4 x float> %0, <4 x float> %1)
856 declare <4 x i32> @llvm.mips.fsule.w(<4 x float>, <4 x float>) nounwind
873 %2 = tail call <2 x i64> @llvm.mips.fsule.d(<2 x double> %0, <2 x double> %1)
878 declare <2 x i64> @llvm.mips.fsule.d(<2 x double>, <2 x double>) nounwind
895 %2 = tail call <4 x i32> @llvm.mips.fsun.w(<4 x float> %0, <4 x float> %1)
900 declare <4 x i32> @llvm.mips.fsun.w(<4 x float>, <4 x float>) nounwind
917 %2 = tail call <2 x i64> @llvm.mips.fsun.d(<2 x double> %0, <2 x double> %1)
922 declare <2 x i64> @llvm.mips.fsun.d(<2 x double>, <2 x double>) nounwind
939 %2 = tail call <4 x i32> @llvm.mips.fsune.w(<4 x float> %0, <4 x float> %1)
944 declare <4 x i32> @llvm.mips.fsune.w(<4 x float>, <4 x float>) nounwind
961 %2 = tail call <2 x i64> @llvm.mips.fsune.d(<2 x double> %0, <2 x double> %1)
966 declare <2 x i64> @llvm.mips.fsune.d(<2 x double>, <2 x double>) nounwind