Lines Matching refs:f14
82 ; M3-NEXT: mov.d $f0, $f14
89 ; CMOV64-NEXT: mov.d $f0, $f14
98 ; 64R6-NEXT: sel.d $f0, $f14, $f13
130 ; M2-NEXT: mov.d $f0, $f14
137 ; CMOV32R1-NEXT: mov.d $f0, $f14
145 ; CMOV32R2-NEXT: mov.d $f0, $f14
156 ; 32R6-NEXT: sel.d $f0, $f14, $f12
184 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
194 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
205 ; M2-NEXT: c.olt.d $f12, $f14
210 ; M2-NEXT: mov.d $f0, $f14
217 ; CMOV32R1-NEXT: mov.d $f0, $f14
218 ; CMOV32R1-NEXT: c.olt.d $f12, $f14
224 ; CMOV32R2-NEXT: mov.d $f0, $f14
225 ; CMOV32R2-NEXT: c.olt.d $f12, $f14
231 ; 32R6-NEXT: cmp.lt.d $f0, $f12, $f14
235 ; 32R6-NEXT: sel.d $f0, $f14, $f12
266 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
267 ; MM32R3: c.olt.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
273 ; MM32R6-NEXT: cmp.lt.d $f0, $f12, $f14
276 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
287 ; M2-NEXT: c.ole.d $f12, $f14
292 ; M2-NEXT: mov.d $f0, $f14
299 ; CMOV32R1-NEXT: mov.d $f0, $f14
300 ; CMOV32R1-NEXT: c.ole.d $f12, $f14
306 ; CMOV32R2-NEXT: mov.d $f0, $f14
307 ; CMOV32R2-NEXT: c.ole.d $f12, $f14
313 ; 32R6-NEXT: cmp.le.d $f0, $f12, $f14
317 ; 32R6-NEXT: sel.d $f0, $f14, $f12
348 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
349 ; MM32R3: c.ole.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
355 ; MM32R6-NEXT: cmp.le.d $f0, $f12, $f14
358 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
369 ; M2-NEXT: c.ule.d $f12, $f14
374 ; M2-NEXT: mov.d $f0, $f14
381 ; CMOV32R1-NEXT: mov.d $f0, $f14
382 ; CMOV32R1-NEXT: c.ule.d $f12, $f14
388 ; CMOV32R2-NEXT: mov.d $f0, $f14
389 ; CMOV32R2-NEXT: c.ule.d $f12, $f14
395 ; 32R6-NEXT: cmp.lt.d $f0, $f14, $f12
399 ; 32R6-NEXT: sel.d $f0, $f14, $f12
430 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
431 ; MM32R3: c.ule.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
437 ; MM32R6-NEXT: cmp.lt.d $f0, $f14, $f12
440 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
451 ; M2-NEXT: c.ult.d $f12, $f14
456 ; M2-NEXT: mov.d $f0, $f14
463 ; CMOV32R1-NEXT: mov.d $f0, $f14
464 ; CMOV32R1-NEXT: c.ult.d $f12, $f14
470 ; CMOV32R2-NEXT: mov.d $f0, $f14
471 ; CMOV32R2-NEXT: c.ult.d $f12, $f14
477 ; 32R6-NEXT: cmp.le.d $f0, $f14, $f12
481 ; 32R6-NEXT: sel.d $f0, $f14, $f12
512 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
513 ; MM32R3: c.ult.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
519 ; MM32R6-NEXT: cmp.le.d $f0, $f14, $f12
522 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
533 ; M2-NEXT: c.eq.d $f12, $f14
538 ; M2-NEXT: mov.d $f0, $f14
545 ; CMOV32R1-NEXT: mov.d $f0, $f14
546 ; CMOV32R1-NEXT: c.eq.d $f12, $f14
552 ; CMOV32R2-NEXT: mov.d $f0, $f14
553 ; CMOV32R2-NEXT: c.eq.d $f12, $f14
559 ; 32R6-NEXT: cmp.eq.d $f0, $f12, $f14
563 ; 32R6-NEXT: sel.d $f0, $f14, $f12
594 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
595 ; MM32R3: c.eq.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
601 ; MM32R6-NEXT: cmp.eq.d $f0, $f12, $f14
604 ; MM32R6-NEXT: sel.d $f0, $f14, $f12
615 ; M2-NEXT: c.ueq.d $f12, $f14
620 ; M2-NEXT: mov.d $f0, $f14
627 ; CMOV32R1-NEXT: mov.d $f0, $f14
628 ; CMOV32R1-NEXT: c.ueq.d $f12, $f14
634 ; CMOV32R2-NEXT: mov.d $f0, $f14
635 ; CMOV32R2-NEXT: c.ueq.d $f12, $f14
641 ; 32R6-NEXT: cmp.ueq.d $f0, $f12, $f14
646 ; 32R6-NEXT: sel.d $f0, $f14, $f12
678 ; MM32R3: mov.d $f0, $f14 # <MCInst #{{.*}} FMOV_D32
679 ; MM32R3: c.ueq.d $f12, $f14 # <MCInst #{{.*}} FCMP_D32_MM
685 ; MM32R6-NEXT: cmp.ueq.d $f0, $f12, $f14
689 ; MM32R6-NEXT: sel.d $f0, $f14, $f12