Lines Matching refs:NO
11 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-F…
13 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO…
16 ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP6…
18 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-F…
31 ; 32R2-NO-FP64A-LE-NOT: addiu $sp, $sp
32 ; 32R2-NO-FP64A-LE: mtc1 $4, $f0
33 ; 32R2-NO-FP64A-LE: mthc1 $5, $f0
35 ; 32R2-NO-FP64A-BE-NOT: addiu $sp, $sp
36 ; 32R2-NO-FP64A-BE: mtc1 $5, $f0
37 ; 32R2-NO-FP64A-BE: mthc1 $4, $f0
44 ; 64-NO-FP64A: daddiu $sp, $sp, -64
45 ; 64-NO-FP64A: mov.d $f0, $f12
53 ; 32R2-NO-FP64A-LE: mtc1 $6, $f0
54 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
56 ; 32R2-NO-FP64A-BE: mtc1 $7, $f0
57 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
64 ; 64-NO-FP64A-NOT: daddiu $sp, $sp
65 ; 64-NO-FP64A: mov.d $f0, $f13
73 ; 32R2-NO-FP64A-LE: mtc1 $6, $f0
74 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
76 ; 32R2-NO-FP64A-BE: mtc1 $7, $f0
77 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
84 ; 64-NO-FP64A-NOT: daddiu $sp, $sp
85 ; 64-NO-FP64A: mov.d $f0, $f14
93 ; 32R2-NO-FP64A-LE: mtc1 $6, $f0
94 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
96 ; 32R2-NO-FP64A-BE: mtc1 $7, $f0
97 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
104 ; 64-NO-FP64A: daddiu $sp, $sp, -48
105 ; 64-NO-FP64A: mov.d $f0, $f13
114 ; 32R2-NO-FP64A-LE-DAG: mtc1 $4, $[[T0:f[0-9]+]]
115 ; 32R2-NO-FP64A-LE-DAG: mthc1 $5, $[[T0:f[0-9]+]]
116 ; 32R2-NO-FP64A-LE-DAG: mtc1 $6, $[[T1:f[0-9]+]]
117 ; 32R2-NO-FP64A-LE-DAG: mthc1 $7, $[[T1:f[0-9]+]]
118 ; 32R2-NO-FP64A-LE: sub.d $f0, $[[T0]], $[[T1]]
120 ; 32R2-NO-FP64A-BE-DAG: mtc1 $5, $[[T0:f[0-9]+]]
121 ; 32R2-NO-FP64A-BE-DAG: mthc1 $4, $[[T0:f[0-9]+]]
122 ; 32R2-NO-FP64A-BE-DAG: mtc1 $7, $[[T1:f[0-9]+]]
123 ; 32R2-NO-FP64A-BE-DAG: mthc1 $6, $[[T1:f[0-9]+]]
124 ; 32R2-NO-FP64A-BE: sub.d $f0, $[[T0]], $[[T1]]
135 ; 64-NO-FP64A: sub.d $f0, $f12, $f13
145 ; 32R2-NO-FP64A-LE-DAG: mfc1 $6, $f0
146 ; 32R2-NO-FP64A-LE-DAG: mfhc1 $7, $f0
148 ; 32R2-NO-FP64A-BE-DAG: mfc1 $7, $f0
149 ; 32R2-NO-FP64A-BE-DAG: mfhc1 $6, $f0
158 ; 64-NO-FP64A: mov.d $f13, $f0