Lines Matching refs:DF
3 …tr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf -mattr=+fpuv2_df | FileCheck %s --check-prefix=CHECK-DF
12 ; CHECK-DF-LABEL: FCMP_DOUBLE_ueq:
13 ; CHECK-DF: # %bb.0: # %entry
14 ; CHECK-DF-NEXT: fcmpuod vr1, vr0
15 ; CHECK-DF-NEXT: mvc32 a0
16 ; CHECK-DF-NEXT: fcmpned vr1, vr0
17 ; CHECK-DF-NEXT: mvcv16 a1
18 ; CHECK-DF-NEXT: or16 a0, a1
19 ; CHECK-DF-NEXT: rts16
37 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_ueq:
38 ; CHECK-DF: # %bb.0: # %entry
39 ; CHECK-DF-NEXT: grs32 a0, .LCPI1_0
40 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
41 ; CHECK-DF-NEXT: fcmpuod vr0, vr1
42 ; CHECK-DF-NEXT: mvc32 a0
43 ; CHECK-DF-NEXT: fcmpned vr0, vr1
44 ; CHECK-DF-NEXT: mvcv16 a1
45 ; CHECK-DF-NEXT: or16 a0, a1
46 ; CHECK-DF-NEXT: rts16
47 ; CHECK-DF-NEXT: .p2align 1
48 ; CHECK-DF-NEXT: # %bb.1:
49 ; CHECK-DF-NEXT: .p2align 2
50 ; CHECK-DF-NEXT: .LCPI1_0:
51 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
77 ; CHECK-DF-LABEL: FCMP_DOUBLE_une:
78 ; CHECK-DF: # %bb.0: # %entry
79 ; CHECK-DF-NEXT: fcmpned vr1, vr0
80 ; CHECK-DF-NEXT: mvc32 a0
81 ; CHECK-DF-NEXT: rts16
96 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_une:
97 ; CHECK-DF: # %bb.0: # %entry
98 ; CHECK-DF-NEXT: grs32 a0, .LCPI3_0
99 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
100 ; CHECK-DF-NEXT: fcmpned vr0, vr1
101 ; CHECK-DF-NEXT: mvc32 a0
102 ; CHECK-DF-NEXT: rts16
103 ; CHECK-DF-NEXT: .p2align 1
104 ; CHECK-DF-NEXT: # %bb.1:
105 ; CHECK-DF-NEXT: .p2align 2
106 ; CHECK-DF-NEXT: .LCPI3_0:
107 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
130 ; CHECK-DF-LABEL: FCMP_DOUBLE_ugt:
131 ; CHECK-DF: # %bb.0: # %entry
132 ; CHECK-DF-NEXT: fcmphsd vr0, vr1
133 ; CHECK-DF-NEXT: mvc32 a0
134 ; CHECK-DF-NEXT: xori32 a0, a0, 1
135 ; CHECK-DF-NEXT: rts16
151 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_ugt:
152 ; CHECK-DF: # %bb.0: # %entry
153 ; CHECK-DF-NEXT: grs32 a0, .LCPI5_0
154 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
155 ; CHECK-DF-NEXT: fcmphsd vr1, vr0
156 ; CHECK-DF-NEXT: mvc32 a0
157 ; CHECK-DF-NEXT: xori32 a0, a0, 1
158 ; CHECK-DF-NEXT: rts16
159 ; CHECK-DF-NEXT: .p2align 1
160 ; CHECK-DF-NEXT: # %bb.1:
161 ; CHECK-DF-NEXT: .p2align 2
162 ; CHECK-DF-NEXT: .LCPI5_0:
163 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
188 ; CHECK-DF-LABEL: FCMP_DOUBLE_uge:
189 ; CHECK-DF: # %bb.0: # %entry
190 ; CHECK-DF-NEXT: fcmpltd vr1, vr0
191 ; CHECK-DF-NEXT: mvc32 a0
192 ; CHECK-DF-NEXT: xori32 a0, a0, 1
193 ; CHECK-DF-NEXT: rts16
209 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_uge:
210 ; CHECK-DF: # %bb.0: # %entry
211 ; CHECK-DF-NEXT: grs32 a0, .LCPI7_0
212 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
213 ; CHECK-DF-NEXT: fcmpltd vr0, vr1
214 ; CHECK-DF-NEXT: mvc32 a0
215 ; CHECK-DF-NEXT: xori32 a0, a0, 1
216 ; CHECK-DF-NEXT: rts16
217 ; CHECK-DF-NEXT: .p2align 1
218 ; CHECK-DF-NEXT: # %bb.1:
219 ; CHECK-DF-NEXT: .p2align 2
220 ; CHECK-DF-NEXT: .LCPI7_0:
221 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
246 ; CHECK-DF-LABEL: FCMP_DOUBLE_ult:
247 ; CHECK-DF: # %bb.0: # %entry
248 ; CHECK-DF-NEXT: fcmphsd vr1, vr0
249 ; CHECK-DF-NEXT: mvc32 a0
250 ; CHECK-DF-NEXT: xori32 a0, a0, 1
251 ; CHECK-DF-NEXT: rts16
267 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_ult:
268 ; CHECK-DF: # %bb.0: # %entry
269 ; CHECK-DF-NEXT: grs32 a0, .LCPI9_0
270 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
271 ; CHECK-DF-NEXT: fcmphsd vr0, vr1
272 ; CHECK-DF-NEXT: mvc32 a0
273 ; CHECK-DF-NEXT: xori32 a0, a0, 1
274 ; CHECK-DF-NEXT: rts16
275 ; CHECK-DF-NEXT: .p2align 1
276 ; CHECK-DF-NEXT: # %bb.1:
277 ; CHECK-DF-NEXT: .p2align 2
278 ; CHECK-DF-NEXT: .LCPI9_0:
279 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
304 ; CHECK-DF-LABEL: FCMP_DOUBLE_ule:
305 ; CHECK-DF: # %bb.0: # %entry
306 ; CHECK-DF-NEXT: fcmpltd vr0, vr1
307 ; CHECK-DF-NEXT: mvc32 a0
308 ; CHECK-DF-NEXT: xori32 a0, a0, 1
309 ; CHECK-DF-NEXT: rts16
325 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_ule:
326 ; CHECK-DF: # %bb.0: # %entry
327 ; CHECK-DF-NEXT: grs32 a0, .LCPI11_0
328 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
329 ; CHECK-DF-NEXT: fcmpltd vr1, vr0
330 ; CHECK-DF-NEXT: mvc32 a0
331 ; CHECK-DF-NEXT: xori32 a0, a0, 1
332 ; CHECK-DF-NEXT: rts16
333 ; CHECK-DF-NEXT: .p2align 1
334 ; CHECK-DF-NEXT: # %bb.1:
335 ; CHECK-DF-NEXT: .p2align 2
336 ; CHECK-DF-NEXT: .LCPI11_0:
337 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
362 ; CHECK-DF-LABEL: FCMP_DOUBLE_ogt:
363 ; CHECK-DF: # %bb.0: # %entry
364 ; CHECK-DF-NEXT: fcmpltd vr0, vr1
365 ; CHECK-DF-NEXT: mvc32 a0
366 ; CHECK-DF-NEXT: rts16
381 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_ogt:
382 ; CHECK-DF: # %bb.0: # %entry
383 ; CHECK-DF-NEXT: grs32 a0, .LCPI13_0
384 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
385 ; CHECK-DF-NEXT: fcmpltd vr1, vr0
386 ; CHECK-DF-NEXT: mvc32 a0
387 ; CHECK-DF-NEXT: rts16
388 ; CHECK-DF-NEXT: .p2align 1
389 ; CHECK-DF-NEXT: # %bb.1:
390 ; CHECK-DF-NEXT: .p2align 2
391 ; CHECK-DF-NEXT: .LCPI13_0:
392 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
415 ; CHECK-DF-LABEL: FCMP_DOUBLE_oge:
416 ; CHECK-DF: # %bb.0: # %entry
417 ; CHECK-DF-NEXT: fcmphsd vr1, vr0
418 ; CHECK-DF-NEXT: mvc32 a0
419 ; CHECK-DF-NEXT: rts16
434 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_oge:
435 ; CHECK-DF: # %bb.0: # %entry
436 ; CHECK-DF-NEXT: grs32 a0, .LCPI15_0
437 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
438 ; CHECK-DF-NEXT: fcmphsd vr0, vr1
439 ; CHECK-DF-NEXT: mvc32 a0
440 ; CHECK-DF-NEXT: rts16
441 ; CHECK-DF-NEXT: .p2align 1
442 ; CHECK-DF-NEXT: # %bb.1:
443 ; CHECK-DF-NEXT: .p2align 2
444 ; CHECK-DF-NEXT: .LCPI15_0:
445 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
469 ; CHECK-DF-LABEL: FCMP_DOUBLE_olt:
470 ; CHECK-DF: # %bb.0: # %entry
471 ; CHECK-DF-NEXT: fcmpltd vr1, vr0
472 ; CHECK-DF-NEXT: mvc32 a0
473 ; CHECK-DF-NEXT: rts16
488 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_olt:
489 ; CHECK-DF: # %bb.0: # %entry
490 ; CHECK-DF-NEXT: grs32 a0, .LCPI17_0
491 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
492 ; CHECK-DF-NEXT: fcmpltd vr0, vr1
493 ; CHECK-DF-NEXT: mvc32 a0
494 ; CHECK-DF-NEXT: rts16
495 ; CHECK-DF-NEXT: .p2align 1
496 ; CHECK-DF-NEXT: # %bb.1:
497 ; CHECK-DF-NEXT: .p2align 2
498 ; CHECK-DF-NEXT: .LCPI17_0:
499 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
522 ; CHECK-DF-LABEL: FCMP_DOUBLE_ole:
523 ; CHECK-DF: # %bb.0: # %entry
524 ; CHECK-DF-NEXT: fcmphsd vr0, vr1
525 ; CHECK-DF-NEXT: mvc32 a0
526 ; CHECK-DF-NEXT: rts16
541 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_ole:
542 ; CHECK-DF: # %bb.0: # %entry
543 ; CHECK-DF-NEXT: grs32 a0, .LCPI19_0
544 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
545 ; CHECK-DF-NEXT: fcmphsd vr1, vr0
546 ; CHECK-DF-NEXT: mvc32 a0
547 ; CHECK-DF-NEXT: rts16
548 ; CHECK-DF-NEXT: .p2align 1
549 ; CHECK-DF-NEXT: # %bb.1:
550 ; CHECK-DF-NEXT: .p2align 2
551 ; CHECK-DF-NEXT: .LCPI19_0:
552 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
575 ; CHECK-DF-LABEL: FCMP_DOUBLE_one:
576 ; CHECK-DF: # %bb.0: # %entry
577 ; CHECK-DF-NEXT: fcmpuod vr1, vr0
578 ; CHECK-DF-NEXT: mvcv16 a0
579 ; CHECK-DF-NEXT: fcmpned vr1, vr0
580 ; CHECK-DF-NEXT: mvc32 a1
581 ; CHECK-DF-NEXT: and16 a0, a1
582 ; CHECK-DF-NEXT: rts16
600 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_one:
601 ; CHECK-DF: # %bb.0: # %entry
602 ; CHECK-DF-NEXT: grs32 a0, .LCPI21_0
603 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
604 ; CHECK-DF-NEXT: fcmpuod vr0, vr1
605 ; CHECK-DF-NEXT: mvcv16 a0
606 ; CHECK-DF-NEXT: fcmpned vr0, vr1
607 ; CHECK-DF-NEXT: mvc32 a1
608 ; CHECK-DF-NEXT: and16 a0, a1
609 ; CHECK-DF-NEXT: rts16
610 ; CHECK-DF-NEXT: .p2align 1
611 ; CHECK-DF-NEXT: # %bb.1:
612 ; CHECK-DF-NEXT: .p2align 2
613 ; CHECK-DF-NEXT: .LCPI21_0:
614 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
640 ; CHECK-DF-LABEL: FCMP_DOUBLE_oeq:
641 ; CHECK-DF: # %bb.0: # %entry
642 ; CHECK-DF-NEXT: fcmpned vr1, vr0
643 ; CHECK-DF-NEXT: mvcv16 a0
644 ; CHECK-DF-NEXT: rts16
659 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_oeq:
660 ; CHECK-DF: # %bb.0: # %entry
661 ; CHECK-DF-NEXT: grs32 a0, .LCPI23_0
662 ; CHECK-DF-NEXT: fldd vr1, (a0, 0)
663 ; CHECK-DF-NEXT: fcmpned vr0, vr1
664 ; CHECK-DF-NEXT: mvcv16 a0
665 ; CHECK-DF-NEXT: rts16
666 ; CHECK-DF-NEXT: .p2align 1
667 ; CHECK-DF-NEXT: # %bb.1:
668 ; CHECK-DF-NEXT: .p2align 2
669 ; CHECK-DF-NEXT: .LCPI23_0:
670 ; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
693 ; CHECK-DF-LABEL: FCMP_DOUBLE_ord:
694 ; CHECK-DF: # %bb.0: # %entry
695 ; CHECK-DF-NEXT: fcmpuod vr1, vr0
696 ; CHECK-DF-NEXT: mvcv16 a0
697 ; CHECK-DF-NEXT: rts16
712 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_ord:
713 ; CHECK-DF: # %bb.0: # %entry
714 ; CHECK-DF-NEXT: fcmpuod vr0, vr0
715 ; CHECK-DF-NEXT: mvcv16 a0
716 ; CHECK-DF-NEXT: rts16
733 ; CHECK-DF-LABEL: FCMP_DOUBLE_uno:
734 ; CHECK-DF: # %bb.0: # %entry
735 ; CHECK-DF-NEXT: fcmpuod vr1, vr0
736 ; CHECK-DF-NEXT: mvc32 a0
737 ; CHECK-DF-NEXT: rts16
752 ; CHECK-DF-LABEL: FCMP_DOUBLE_I_uno:
753 ; CHECK-DF: # %bb.0: # %entry
754 ; CHECK-DF-NEXT: fcmpuod vr0, vr0
755 ; CHECK-DF-NEXT: mvc32 a0
756 ; CHECK-DF-NEXT: rts16