Lines Matching refs:T1

2 …: llc -mtriple=thumbv6m-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-T1
18 ; CHECK-T1-LABEL: i32_3:
19 ; CHECK-T1:       @ %bb.0:
20 ; CHECK-T1-NEXT:    movs r2, #3
21 ; CHECK-T1-NEXT:    str r1, [r0, r2]
22 ; CHECK-T1-NEXT:    adds r0, r0, #3
23 ; CHECK-T1-NEXT:    bx lr
41 ; CHECK-T1-LABEL: i32_4:
42 ; CHECK-T1:       @ %bb.0:
43 ; CHECK-T1-NEXT:    str r1, [r0, #4]
44 ; CHECK-T1-NEXT:    adds r0, r0, #4
45 ; CHECK-T1-NEXT:    bx lr
63 ; CHECK-T1-LABEL: i32_8:
64 ; CHECK-T1:       @ %bb.0:
65 ; CHECK-T1-NEXT:    str r1, [r0, #8]
66 ; CHECK-T1-NEXT:    adds r0, #8
67 ; CHECK-T1-NEXT:    bx lr
85 ; CHECK-T1-LABEL: i32_m1:
86 ; CHECK-T1:       @ %bb.0:
87 ; CHECK-T1-NEXT:    subs r0, r0, #1
88 ; CHECK-T1-NEXT:    str r1, [r0]
89 ; CHECK-T1-NEXT:    bx lr
107 ; CHECK-T1-LABEL: i32_m4:
108 ; CHECK-T1:       @ %bb.0:
109 ; CHECK-T1-NEXT:    subs r0, r0, #4
110 ; CHECK-T1-NEXT:    str r1, [r0]
111 ; CHECK-T1-NEXT:    bx lr
129 ; CHECK-T1-LABEL: i32_252:
130 ; CHECK-T1:       @ %bb.0:
131 ; CHECK-T1-NEXT:    movs r2, #252
132 ; CHECK-T1-NEXT:    str r1, [r0, r2]
133 ; CHECK-T1-NEXT:    adds r0, #252
134 ; CHECK-T1-NEXT:    bx lr
152 ; CHECK-T1-LABEL: i32_255:
153 ; CHECK-T1:       @ %bb.0:
154 ; CHECK-T1-NEXT:    movs r2, #255
155 ; CHECK-T1-NEXT:    str r1, [r0, r2]
156 ; CHECK-T1-NEXT:    adds r0, #255
157 ; CHECK-T1-NEXT:    bx lr
175 ; CHECK-T1-LABEL: i32_256:
176 ; CHECK-T1:       @ %bb.0:
177 ; CHECK-T1-NEXT:    movs r2, #1
178 ; CHECK-T1-NEXT:    lsls r2, r2, #8
179 ; CHECK-T1-NEXT:    str r1, [r0, r2]
180 ; CHECK-T1-NEXT:    adds r0, r0, r2
181 ; CHECK-T1-NEXT:    bx lr
200 ; CHECK-T1-LABEL: i32_m252:
201 ; CHECK-T1:       @ %bb.0:
202 ; CHECK-T1-NEXT:    subs r0, #252
203 ; CHECK-T1-NEXT:    str r1, [r0]
204 ; CHECK-T1-NEXT:    bx lr
222 ; CHECK-T1-LABEL: i32_m255:
223 ; CHECK-T1:       @ %bb.0:
224 ; CHECK-T1-NEXT:    subs r0, #255
225 ; CHECK-T1-NEXT:    str r1, [r0]
226 ; CHECK-T1-NEXT:    bx lr
244 ; CHECK-T1-LABEL: i32_m256:
245 ; CHECK-T1:       @ %bb.0:
246 ; CHECK-T1-NEXT:    movs r2, #255
247 ; CHECK-T1-NEXT:    mvns r2, r2
248 ; CHECK-T1-NEXT:    str r1, [r0, r2]
249 ; CHECK-T1-NEXT:    adds r0, r0, r2
250 ; CHECK-T1-NEXT:    bx lr
270 ; CHECK-T1-LABEL: i32_4095:
271 ; CHECK-T1:       @ %bb.0:
272 ; CHECK-T1-NEXT:    ldr r2, .LCPI12_0
273 ; CHECK-T1-NEXT:    str r1, [r0, r2]
274 ; CHECK-T1-NEXT:    adds r0, r0, r2
275 ; CHECK-T1-NEXT:    bx lr
276 ; CHECK-T1-NEXT:    .p2align 2
277 ; CHECK-T1-NEXT:  @ %bb.1:
278 ; CHECK-T1-NEXT:  .LCPI12_0:
279 ; CHECK-T1-NEXT:    .long 4095 @ 0xfff
298 ; CHECK-T1-LABEL: i32_4096:
299 ; CHECK-T1:       @ %bb.0:
300 ; CHECK-T1-NEXT:    movs r2, #1
301 ; CHECK-T1-NEXT:    lsls r2, r2, #12
302 ; CHECK-T1-NEXT:    str r1, [r0, r2]
303 ; CHECK-T1-NEXT:    adds r0, r0, r2
304 ; CHECK-T1-NEXT:    bx lr
325 ; CHECK-T1-LABEL: i32_m4095:
326 ; CHECK-T1:       @ %bb.0:
327 ; CHECK-T1-NEXT:    ldr r2, .LCPI14_0
328 ; CHECK-T1-NEXT:    str r1, [r0, r2]
329 ; CHECK-T1-NEXT:    adds r0, r0, r2
330 ; CHECK-T1-NEXT:    bx lr
331 ; CHECK-T1-NEXT:    .p2align 2
332 ; CHECK-T1-NEXT:  @ %bb.1:
333 ; CHECK-T1-NEXT:  .LCPI14_0:
334 ; CHECK-T1-NEXT:    .long 4294963201 @ 0xfffff001
355 ; CHECK-T1-LABEL: i32_m4096:
356 ; CHECK-T1:       @ %bb.0:
357 ; CHECK-T1-NEXT:    ldr r2, .LCPI15_0
358 ; CHECK-T1-NEXT:    str r1, [r0, r2]
359 ; CHECK-T1-NEXT:    adds r0, r0, r2
360 ; CHECK-T1-NEXT:    bx lr
361 ; CHECK-T1-NEXT:    .p2align 2
362 ; CHECK-T1-NEXT:  @ %bb.1:
363 ; CHECK-T1-NEXT:  .LCPI15_0:
364 ; CHECK-T1-NEXT:    .long 4294963200 @ 0xfffff000
387 ; CHECK-T1-LABEL: i64_0:
388 ; CHECK-T1:       @ %bb.0:
389 ; CHECK-T1-NEXT:    stm r0!, {r2, r3}
390 ; CHECK-T1-NEXT:    subs r0, #8
391 ; CHECK-T1-NEXT:    bx lr
411 ; CHECK-T1-LABEL: i64_3:
412 ; CHECK-T1:       @ %bb.0:
413 ; CHECK-T1-NEXT:    movs r1, #3
414 ; CHECK-T1-NEXT:    str r2, [r0, r1]
415 ; CHECK-T1-NEXT:    adds r0, r0, #3
416 ; CHECK-T1-NEXT:    str r3, [r0, #4]
417 ; CHECK-T1-NEXT:    bx lr
437 ; CHECK-T1-LABEL: i64_4:
438 ; CHECK-T1:       @ %bb.0:
439 ; CHECK-T1-NEXT:    str r2, [r0, #4]
440 ; CHECK-T1-NEXT:    str r3, [r0, #8]
441 ; CHECK-T1-NEXT:    adds r0, r0, #4
442 ; CHECK-T1-NEXT:    bx lr
462 ; CHECK-T1-LABEL: i64_8:
463 ; CHECK-T1:       @ %bb.0:
464 ; CHECK-T1-NEXT:    str r2, [r0, #8]
465 ; CHECK-T1-NEXT:    str r3, [r0, #12]
466 ; CHECK-T1-NEXT:    adds r0, #8
467 ; CHECK-T1-NEXT:    bx lr
487 ; CHECK-T1-LABEL: i64_m1:
488 ; CHECK-T1:       @ %bb.0:
489 ; CHECK-T1-NEXT:    subs r0, r0, #1
490 ; CHECK-T1-NEXT:    stm r0!, {r2, r3}
491 ; CHECK-T1-NEXT:    subs r0, #8
492 ; CHECK-T1-NEXT:    bx lr
512 ; CHECK-T1-LABEL: i64_m4:
513 ; CHECK-T1:       @ %bb.0:
514 ; CHECK-T1-NEXT:    str r3, [r0]
515 ; CHECK-T1-NEXT:    subs r0, r0, #4
516 ; CHECK-T1-NEXT:    str r2, [r0]
517 ; CHECK-T1-NEXT:    bx lr
537 ; CHECK-T1-LABEL: i64_252:
538 ; CHECK-T1:       @ %bb.0:
539 ; CHECK-T1-NEXT:    movs r1, #252
540 ; CHECK-T1-NEXT:    str r2, [r0, r1]
541 ; CHECK-T1-NEXT:    adds r0, #252
542 ; CHECK-T1-NEXT:    str r3, [r0, #4]
543 ; CHECK-T1-NEXT:    bx lr
563 ; CHECK-T1-LABEL: i64_255:
564 ; CHECK-T1:       @ %bb.0:
565 ; CHECK-T1-NEXT:    movs r1, #255
566 ; CHECK-T1-NEXT:    str r2, [r0, r1]
567 ; CHECK-T1-NEXT:    adds r0, #255
568 ; CHECK-T1-NEXT:    str r3, [r0, #4]
569 ; CHECK-T1-NEXT:    bx lr
589 ; CHECK-T1-LABEL: i64_256:
590 ; CHECK-T1:       @ %bb.0:
591 ; CHECK-T1-NEXT:    movs r1, #1
592 ; CHECK-T1-NEXT:    lsls r1, r1, #8
593 ; CHECK-T1-NEXT:    str r2, [r0, r1]
594 ; CHECK-T1-NEXT:    adds r0, r0, r1
595 ; CHECK-T1-NEXT:    str r3, [r0, #4]
596 ; CHECK-T1-NEXT:    bx lr
616 ; CHECK-T1-LABEL: i64_m252:
617 ; CHECK-T1:       @ %bb.0:
618 ; CHECK-T1-NEXT:    subs r0, #252
619 ; CHECK-T1-NEXT:    stm r0!, {r2, r3}
620 ; CHECK-T1-NEXT:    subs r0, #8
621 ; CHECK-T1-NEXT:    bx lr
641 ; CHECK-T1-LABEL: i64_m255:
642 ; CHECK-T1:       @ %bb.0:
643 ; CHECK-T1-NEXT:    subs r0, #255
644 ; CHECK-T1-NEXT:    stm r0!, {r2, r3}
645 ; CHECK-T1-NEXT:    subs r0, #8
646 ; CHECK-T1-NEXT:    bx lr
666 ; CHECK-T1-LABEL: i64_m256:
667 ; CHECK-T1:       @ %bb.0:
668 ; CHECK-T1-NEXT:    movs r1, #255
669 ; CHECK-T1-NEXT:    mvns r1, r1
670 ; CHECK-T1-NEXT:    str r2, [r0, r1]
671 ; CHECK-T1-NEXT:    adds r0, r0, r1
672 ; CHECK-T1-NEXT:    str r3, [r0, #4]
673 ; CHECK-T1-NEXT:    bx lr
695 ; CHECK-T1-LABEL: i64_4095:
696 ; CHECK-T1:       @ %bb.0:
697 ; CHECK-T1-NEXT:    ldr r1, .LCPI28_0
698 ; CHECK-T1-NEXT:    str r2, [r0, r1]
699 ; CHECK-T1-NEXT:    adds r0, r0, r1
700 ; CHECK-T1-NEXT:    str r3, [r0, #4]
701 ; CHECK-T1-NEXT:    bx lr
702 ; CHECK-T1-NEXT:    .p2align 2
703 ; CHECK-T1-NEXT:  @ %bb.1:
704 ; CHECK-T1-NEXT:  .LCPI28_0:
705 ; CHECK-T1-NEXT:    .long 4095 @ 0xfff
726 ; CHECK-T1-LABEL: i64_4096:
727 ; CHECK-T1:       @ %bb.0:
728 ; CHECK-T1-NEXT:    movs r1, #1
729 ; CHECK-T1-NEXT:    lsls r1, r1, #12
730 ; CHECK-T1-NEXT:    str r2, [r0, r1]
731 ; CHECK-T1-NEXT:    adds r0, r0, r1
732 ; CHECK-T1-NEXT:    str r3, [r0, #4]
733 ; CHECK-T1-NEXT:    bx lr
756 ; CHECK-T1-LABEL: i64_m4095:
757 ; CHECK-T1:       @ %bb.0:
758 ; CHECK-T1-NEXT:    ldr r1, .LCPI30_0
759 ; CHECK-T1-NEXT:    str r2, [r0, r1]
760 ; CHECK-T1-NEXT:    adds r0, r0, r1
761 ; CHECK-T1-NEXT:    str r3, [r0, #4]
762 ; CHECK-T1-NEXT:    bx lr
763 ; CHECK-T1-NEXT:    .p2align 2
764 ; CHECK-T1-NEXT:  @ %bb.1:
765 ; CHECK-T1-NEXT:  .LCPI30_0:
766 ; CHECK-T1-NEXT:    .long 4294963201 @ 0xfffff001
789 ; CHECK-T1-LABEL: i64_m4096:
790 ; CHECK-T1:       @ %bb.0:
791 ; CHECK-T1-NEXT:    ldr r1, .LCPI31_0
792 ; CHECK-T1-NEXT:    str r2, [r0, r1]
793 ; CHECK-T1-NEXT:    adds r0, r0, r1
794 ; CHECK-T1-NEXT:    str r3, [r0, #4]
795 ; CHECK-T1-NEXT:    bx lr
796 ; CHECK-T1-NEXT:    .p2align 2
797 ; CHECK-T1-NEXT:  @ %bb.1:
798 ; CHECK-T1-NEXT:  .LCPI31_0:
799 ; CHECK-T1-NEXT:    .long 4294963200 @ 0xfffff000
824 ; CHECK-T1-LABEL: i128_0:
825 ; CHECK-T1:       @ %bb.0:
826 ; CHECK-T1-NEXT:    ldr r1, [sp, #4]
827 ; CHECK-T1-NEXT:    str r1, [r0, #12]
828 ; CHECK-T1-NEXT:    ldr r1, [sp]
829 ; CHECK-T1-NEXT:    str r1, [r0, #8]
830 ; CHECK-T1-NEXT:    stm r0!, {r2, r3}
831 ; CHECK-T1-NEXT:    subs r0, #8
832 ; CHECK-T1-NEXT:    bx lr
857 ; CHECK-T1-LABEL: i128_3:
858 ; CHECK-T1:       @ %bb.0:
859 ; CHECK-T1-NEXT:    movs r1, #3
860 ; CHECK-T1-NEXT:    str r2, [r0, r1]
861 ; CHECK-T1-NEXT:    adds r0, r0, #3
862 ; CHECK-T1-NEXT:    ldr r1, [sp, #4]
863 ; CHECK-T1-NEXT:    str r1, [r0, #12]
864 ; CHECK-T1-NEXT:    ldr r1, [sp]
865 ; CHECK-T1-NEXT:    str r1, [r0, #8]
866 ; CHECK-T1-NEXT:    str r3, [r0, #4]
867 ; CHECK-T1-NEXT:    bx lr
893 ; CHECK-T1-LABEL: i128_4:
894 ; CHECK-T1:       @ %bb.0:
895 ; CHECK-T1-NEXT:    ldr r1, [sp, #4]
896 ; CHECK-T1-NEXT:    str r1, [r0, #16]
897 ; CHECK-T1-NEXT:    ldr r1, [sp]
898 ; CHECK-T1-NEXT:    str r1, [r0, #12]
899 ; CHECK-T1-NEXT:    str r3, [r0, #8]
900 ; CHECK-T1-NEXT:    str r2, [r0, #4]
901 ; CHECK-T1-NEXT:    adds r0, r0, #4
902 ; CHECK-T1-NEXT:    bx lr
928 ; CHECK-T1-LABEL: i128_8:
929 ; CHECK-T1:       @ %bb.0:
930 ; CHECK-T1-NEXT:    ldr r1, [sp, #4]
931 ; CHECK-T1-NEXT:    str r1, [r0, #20]
932 ; CHECK-T1-NEXT:    ldr r1, [sp]
933 ; CHECK-T1-NEXT:    str r1, [r0, #16]
934 ; CHECK-T1-NEXT:    str r3, [r0, #12]
935 ; CHECK-T1-NEXT:    str r2, [r0, #8]
936 ; CHECK-T1-NEXT:    adds r0, #8
937 ; CHECK-T1-NEXT:    bx lr
963 ; CHECK-T1-LABEL: i128_16:
964 ; CHECK-T1:       @ %bb.0:
965 ; CHECK-T1-NEXT:    ldr r1, [sp, #4]
966 ; CHECK-T1-NEXT:    str r1, [r0, #28]
967 ; CHECK-T1-NEXT:    ldr r1, [sp]
968 ; CHECK-T1-NEXT:    str r1, [r0, #24]
969 ; CHECK-T1-NEXT:    str r3, [r0, #20]
970 ; CHECK-T1-NEXT:    str r2, [r0, #16]
971 ; CHECK-T1-NEXT:    adds r0, #16
972 ; CHECK-T1-NEXT:    bx lr
998 ; CHECK-T1-LABEL: i128_m1:
999 ; CHECK-T1:       @ %bb.0:
1000 ; CHECK-T1-NEXT:    subs r0, r0, #1
1001 ; CHECK-T1-NEXT:    ldr r1, [sp, #4]
1002 ; CHECK-T1-NEXT:    str r1, [r0, #12]
1003 ; CHECK-T1-NEXT:    ldr r1, [sp]
1004 ; CHECK-T1-NEXT:    str r1, [r0, #8]
1005 ; CHECK-T1-NEXT:    stm r0!, {r2, r3}
1006 ; CHECK-T1-NEXT:    subs r0, #8
1007 ; CHECK-T1-NEXT:    bx lr
1033 ; CHECK-T1-LABEL: i128_m4:
1034 ; CHECK-T1:       @ %bb.0:
1035 ; CHECK-T1-NEXT:    ldr r1, [sp, #4]
1036 ; CHECK-T1-NEXT:    str r1, [r0, #8]
1037 ; CHECK-T1-NEXT:    ldr r1, [sp]
1038 ; CHECK-T1-NEXT:    str r1, [r0, #4]
1039 ; CHECK-T1-NEXT:    str r3, [r0]
1040 ; CHECK-T1-NEXT:    subs r0, r0, #4
1041 ; CHECK-T1-NEXT:    str r2, [r0]
1042 ; CHECK-T1-NEXT:    bx lr
1078 ; CHECK-T1-LABEL: i16_3:
1079 ; CHECK-T1:       @ %bb.0:
1080 ; CHECK-T1-NEXT:    movs r2, #3
1081 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1082 ; CHECK-T1-NEXT:    adds r0, r0, #3
1083 ; CHECK-T1-NEXT:    bx lr
1101 ; CHECK-T1-LABEL: i16_4:
1102 ; CHECK-T1:       @ %bb.0:
1103 ; CHECK-T1-NEXT:    strh r1, [r0, #4]
1104 ; CHECK-T1-NEXT:    adds r0, r0, #4
1105 ; CHECK-T1-NEXT:    bx lr
1123 ; CHECK-T1-LABEL: i16_8:
1124 ; CHECK-T1:       @ %bb.0:
1125 ; CHECK-T1-NEXT:    strh r1, [r0, #8]
1126 ; CHECK-T1-NEXT:    adds r0, #8
1127 ; CHECK-T1-NEXT:    bx lr
1145 ; CHECK-T1-LABEL: i16_m1:
1146 ; CHECK-T1:       @ %bb.0:
1147 ; CHECK-T1-NEXT:    subs r0, r0, #1
1148 ; CHECK-T1-NEXT:    strh r1, [r0]
1149 ; CHECK-T1-NEXT:    bx lr
1167 ; CHECK-T1-LABEL: i16_m4:
1168 ; CHECK-T1:       @ %bb.0:
1169 ; CHECK-T1-NEXT:    subs r0, r0, #4
1170 ; CHECK-T1-NEXT:    strh r1, [r0]
1171 ; CHECK-T1-NEXT:    bx lr
1189 ; CHECK-T1-LABEL: i16_252:
1190 ; CHECK-T1:       @ %bb.0:
1191 ; CHECK-T1-NEXT:    movs r2, #252
1192 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1193 ; CHECK-T1-NEXT:    adds r0, #252
1194 ; CHECK-T1-NEXT:    bx lr
1212 ; CHECK-T1-LABEL: i16_255:
1213 ; CHECK-T1:       @ %bb.0:
1214 ; CHECK-T1-NEXT:    movs r2, #255
1215 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1216 ; CHECK-T1-NEXT:    adds r0, #255
1217 ; CHECK-T1-NEXT:    bx lr
1235 ; CHECK-T1-LABEL: i16_256:
1236 ; CHECK-T1:       @ %bb.0:
1237 ; CHECK-T1-NEXT:    movs r2, #1
1238 ; CHECK-T1-NEXT:    lsls r2, r2, #8
1239 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1240 ; CHECK-T1-NEXT:    adds r0, r0, r2
1241 ; CHECK-T1-NEXT:    bx lr
1261 ; CHECK-T1-LABEL: i16_m252:
1262 ; CHECK-T1:       @ %bb.0:
1263 ; CHECK-T1-NEXT:    subs r0, #252
1264 ; CHECK-T1-NEXT:    strh r1, [r0]
1265 ; CHECK-T1-NEXT:    bx lr
1283 ; CHECK-T1-LABEL: i16_m255:
1284 ; CHECK-T1:       @ %bb.0:
1285 ; CHECK-T1-NEXT:    subs r0, #255
1286 ; CHECK-T1-NEXT:    strh r1, [r0]
1287 ; CHECK-T1-NEXT:    bx lr
1305 ; CHECK-T1-LABEL: i16_m256:
1306 ; CHECK-T1:       @ %bb.0:
1307 ; CHECK-T1-NEXT:    movs r2, #255
1308 ; CHECK-T1-NEXT:    mvns r2, r2
1309 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1310 ; CHECK-T1-NEXT:    adds r0, r0, r2
1311 ; CHECK-T1-NEXT:    bx lr
1332 ; CHECK-T1-LABEL: i16_4095:
1333 ; CHECK-T1:       @ %bb.0:
1334 ; CHECK-T1-NEXT:    ldr r2, .LCPI51_0
1335 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1336 ; CHECK-T1-NEXT:    adds r0, r0, r2
1337 ; CHECK-T1-NEXT:    bx lr
1338 ; CHECK-T1-NEXT:    .p2align 2
1339 ; CHECK-T1-NEXT:  @ %bb.1:
1340 ; CHECK-T1-NEXT:  .LCPI51_0:
1341 ; CHECK-T1-NEXT:    .long 4095 @ 0xfff
1361 ; CHECK-T1-LABEL: i16_4096:
1362 ; CHECK-T1:       @ %bb.0:
1363 ; CHECK-T1-NEXT:    movs r2, #1
1364 ; CHECK-T1-NEXT:    lsls r2, r2, #12
1365 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1366 ; CHECK-T1-NEXT:    adds r0, r0, r2
1367 ; CHECK-T1-NEXT:    bx lr
1388 ; CHECK-T1-LABEL: i16_m4095:
1389 ; CHECK-T1:       @ %bb.0:
1390 ; CHECK-T1-NEXT:    ldr r2, .LCPI53_0
1391 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1392 ; CHECK-T1-NEXT:    adds r0, r0, r2
1393 ; CHECK-T1-NEXT:    bx lr
1394 ; CHECK-T1-NEXT:    .p2align 2
1395 ; CHECK-T1-NEXT:  @ %bb.1:
1396 ; CHECK-T1-NEXT:  .LCPI53_0:
1397 ; CHECK-T1-NEXT:    .long 4294963201 @ 0xfffff001
1420 ; CHECK-T1-LABEL: i16_m4096:
1421 ; CHECK-T1:       @ %bb.0:
1422 ; CHECK-T1-NEXT:    ldr r2, .LCPI54_0
1423 ; CHECK-T1-NEXT:    strh r1, [r0, r2]
1424 ; CHECK-T1-NEXT:    adds r0, r0, r2
1425 ; CHECK-T1-NEXT:    bx lr
1426 ; CHECK-T1-NEXT:    .p2align 2
1427 ; CHECK-T1-NEXT:  @ %bb.1:
1428 ; CHECK-T1-NEXT:  .LCPI54_0:
1429 ; CHECK-T1-NEXT:    .long 4294963200 @ 0xfffff000
1463 ; CHECK-T1-LABEL: i8_3:
1464 ; CHECK-T1:       @ %bb.0:
1465 ; CHECK-T1-NEXT:    strb r1, [r0, #3]
1466 ; CHECK-T1-NEXT:    adds r0, r0, #3
1467 ; CHECK-T1-NEXT:    bx lr
1485 ; CHECK-T1-LABEL: i8_4:
1486 ; CHECK-T1:       @ %bb.0:
1487 ; CHECK-T1-NEXT:    strb r1, [r0, #4]
1488 ; CHECK-T1-NEXT:    adds r0, r0, #4
1489 ; CHECK-T1-NEXT:    bx lr
1507 ; CHECK-T1-LABEL: i8_8:
1508 ; CHECK-T1:       @ %bb.0:
1509 ; CHECK-T1-NEXT:    strb r1, [r0, #8]
1510 ; CHECK-T1-NEXT:    adds r0, #8
1511 ; CHECK-T1-NEXT:    bx lr
1529 ; CHECK-T1-LABEL: i8_m1:
1530 ; CHECK-T1:       @ %bb.0:
1531 ; CHECK-T1-NEXT:    subs r0, r0, #1
1532 ; CHECK-T1-NEXT:    strb r1, [r0]
1533 ; CHECK-T1-NEXT:    bx lr
1551 ; CHECK-T1-LABEL: i8_m4:
1552 ; CHECK-T1:       @ %bb.0:
1553 ; CHECK-T1-NEXT:    subs r0, r0, #4
1554 ; CHECK-T1-NEXT:    strb r1, [r0]
1555 ; CHECK-T1-NEXT:    bx lr
1573 ; CHECK-T1-LABEL: i8_252:
1574 ; CHECK-T1:       @ %bb.0:
1575 ; CHECK-T1-NEXT:    movs r2, #252
1576 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1577 ; CHECK-T1-NEXT:    adds r0, #252
1578 ; CHECK-T1-NEXT:    bx lr
1596 ; CHECK-T1-LABEL: i8_255:
1597 ; CHECK-T1:       @ %bb.0:
1598 ; CHECK-T1-NEXT:    movs r2, #255
1599 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1600 ; CHECK-T1-NEXT:    adds r0, #255
1601 ; CHECK-T1-NEXT:    bx lr
1619 ; CHECK-T1-LABEL: i8_256:
1620 ; CHECK-T1:       @ %bb.0:
1621 ; CHECK-T1-NEXT:    movs r2, #1
1622 ; CHECK-T1-NEXT:    lsls r2, r2, #8
1623 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1624 ; CHECK-T1-NEXT:    adds r0, r0, r2
1625 ; CHECK-T1-NEXT:    bx lr
1644 ; CHECK-T1-LABEL: i8_m252:
1645 ; CHECK-T1:       @ %bb.0:
1646 ; CHECK-T1-NEXT:    subs r0, #252
1647 ; CHECK-T1-NEXT:    strb r1, [r0]
1648 ; CHECK-T1-NEXT:    bx lr
1666 ; CHECK-T1-LABEL: i8_m255:
1667 ; CHECK-T1:       @ %bb.0:
1668 ; CHECK-T1-NEXT:    subs r0, #255
1669 ; CHECK-T1-NEXT:    strb r1, [r0]
1670 ; CHECK-T1-NEXT:    bx lr
1688 ; CHECK-T1-LABEL: i8_m256:
1689 ; CHECK-T1:       @ %bb.0:
1690 ; CHECK-T1-NEXT:    movs r2, #255
1691 ; CHECK-T1-NEXT:    mvns r2, r2
1692 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1693 ; CHECK-T1-NEXT:    adds r0, r0, r2
1694 ; CHECK-T1-NEXT:    bx lr
1714 ; CHECK-T1-LABEL: i8_4095:
1715 ; CHECK-T1:       @ %bb.0:
1716 ; CHECK-T1-NEXT:    ldr r2, .LCPI67_0
1717 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1718 ; CHECK-T1-NEXT:    adds r0, r0, r2
1719 ; CHECK-T1-NEXT:    bx lr
1720 ; CHECK-T1-NEXT:    .p2align 2
1721 ; CHECK-T1-NEXT:  @ %bb.1:
1722 ; CHECK-T1-NEXT:  .LCPI67_0:
1723 ; CHECK-T1-NEXT:    .long 4095 @ 0xfff
1742 ; CHECK-T1-LABEL: i8_4096:
1743 ; CHECK-T1:       @ %bb.0:
1744 ; CHECK-T1-NEXT:    movs r2, #1
1745 ; CHECK-T1-NEXT:    lsls r2, r2, #12
1746 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1747 ; CHECK-T1-NEXT:    adds r0, r0, r2
1748 ; CHECK-T1-NEXT:    bx lr
1769 ; CHECK-T1-LABEL: i8_m4095:
1770 ; CHECK-T1:       @ %bb.0:
1771 ; CHECK-T1-NEXT:    ldr r2, .LCPI69_0
1772 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1773 ; CHECK-T1-NEXT:    adds r0, r0, r2
1774 ; CHECK-T1-NEXT:    bx lr
1775 ; CHECK-T1-NEXT:    .p2align 2
1776 ; CHECK-T1-NEXT:  @ %bb.1:
1777 ; CHECK-T1-NEXT:  .LCPI69_0:
1778 ; CHECK-T1-NEXT:    .long 4294963201 @ 0xfffff001
1799 ; CHECK-T1-LABEL: i8_m4096:
1800 ; CHECK-T1:       @ %bb.0:
1801 ; CHECK-T1-NEXT:    ldr r2, .LCPI70_0
1802 ; CHECK-T1-NEXT:    strb r1, [r0, r2]
1803 ; CHECK-T1-NEXT:    adds r0, r0, r2
1804 ; CHECK-T1-NEXT:    bx lr
1805 ; CHECK-T1-NEXT:    .p2align 2
1806 ; CHECK-T1-NEXT:  @ %bb.1:
1807 ; CHECK-T1-NEXT:  .LCPI70_0:
1808 ; CHECK-T1-NEXT:    .long 4294963200 @ 0xfffff000