Lines Matching refs:R1
13 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
14 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
19 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
20 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
23 ; CHECK-ARMV4T-NEXT: ldr [[R1:r[0-9]+]], [[[ADDR0]]]
26 ; CHECK-ARMV4T-NEXT: str [[R1]], [[[ADDR1]]]
37 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #-4]
38 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #-4]
43 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #-4]
44 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #-4]
48 ; CHECK-ARMV4T-NEXT: ldr [[R1:r[0-9]+]], [[[ADDR0]]]
49 ; CHECK-ARMV4T-NEXT: str [[R1]], [[[ADDR1]]]
60 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #255]
61 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #255]
64 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
65 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
69 ; CHECK-ARMV4T-NEXT: ldr [[R1:r[0-9]+]], [[[ADDR0]], #259]
70 ; CHECK-ARMV4T-NEXT: str [[R1]], [[[ADDR1]], #259]
84 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
85 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
90 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #256]
91 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #256]
95 ; CHECK-ARMV4T-NEXT: ldr [[R1:r[0-9]+]], [[[ADDR0]], #260]
96 ; CHECK-ARMV4T-NEXT: str [[R1]], [[[ADDR1]], #260]
110 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
111 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
116 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #1020]
117 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #1020]
121 ; CHECK-ARMV4T-NEXT: ldr [[R1:r[0-9]+]], [[[ADDR0]], #1024]
122 ; CHECK-ARMV4T-NEXT: str [[R1]], [[[ADDR1]], #1024]
136 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
137 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
144 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
145 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
149 ; CHECK-ARMV4T-NEXT: ldr [[R1:r[0-9]+]], [[[ADDR0]], #1028]
150 ; CHECK-ARMV4T-NEXT: str [[R1]], [[[ADDR1]], #1028]
162 ; CHECK-ARMV5TE-NEXT: mov [[R1:r[0-9]+]], #1
163 ; CHECK-ARMV5TE-NEXT: strd [[R1]], [[R0]], [sp, #8]
169 ; CHECK-T2-NEXT: movs [[R1:r[0-9]+]], #1
170 ; CHECK-T2-NEXT: strd [[R1]], [[R0]], [sp, #8]
177 ; CHECK-ARMV4T-NEXT: mov [[R1:r[0-9]+]], #1
178 ; CHECK-ARMV4T-NEXT: str [[R1]], [sp, #8]