Lines Matching refs:R0
13 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
14 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
19 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
20 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
24 ; CHECK-ARMV4T-NEXT: ldr [[R0:r[0-9]+]], [[[ADDR0]], #4]
25 ; CHECK-ARMV4T-NEXT: str [[R0]], [[[ADDR1]], #4]
37 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #-4]
38 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #-4]
43 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #-4]
44 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #-4]
47 ; CHECK-ARMV4T-NEXT: ldr [[R0:r[0-9]+]], [[[ADDR0]], #-4]
50 ; CHECK-ARMV4T-NEXT: str [[R0]], [[[ADDR1]], #-4]
60 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #255]
61 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #255]
64 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
65 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
68 ; CHECK-ARMV4T-NEXT: ldr [[R0:r[0-9]+]], [[[ADDR0]], #255]
71 ; CHECK-ARMV4T-NEXT: str [[R0]], [[[ADDR1]], #255]
84 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
85 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
90 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #256]
91 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #256]
94 ; CHECK-ARMV4T-NEXT: ldr [[R0:r[0-9]+]], [[[ADDR0]], #256]
97 ; CHECK-ARMV4T-NEXT: str [[R0]], [[[ADDR1]], #256]
110 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
111 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
116 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]], #1020]
117 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]], #1020]
120 ; CHECK-ARMV4T-NEXT: ldr [[R0:r[0-9]+]], [[[ADDR0]], #1020]
123 ; CHECK-ARMV4T-NEXT: str [[R0]], [[[ADDR1]], #1020]
136 ; CHECK-ARMV5TE-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
137 ; CHECK-ARMV5TE-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
144 ; CHECK-T2-NEXT: ldrd [[R0:r[0-9]+]], [[R1:r[0-9]+]], [[[ADDR0]]]
145 ; CHECK-T2-NEXT: strd [[R0]], [[R1]], [[[ADDR1]]]
148 ; CHECK-ARMV4T-NEXT: ldr [[R0:r[0-9]+]], [[[ADDR0]], #1024]
151 ; CHECK-ARMV4T-NEXT: str [[R0]], [[[ADDR1]], #1024]
161 ; CHECK-ARMV5TE-NEXT: mov [[R0:r[0-9]+]], #0
163 ; CHECK-ARMV5TE-NEXT: strd [[R1]], [[R0]], [sp, #8]
168 ; CHECK-T2-NEXT: movs [[R0:r[0-9]+]], #0
170 ; CHECK-T2-NEXT: strd [[R1]], [[R0]], [sp, #8]
175 ; CHECK-ARMV4T-NEXT: mov [[R0:r[0-9]+]], #0
176 ; CHECK-ARMV4T-NEXT: str [[R0]], [sp, #12]