Lines Matching refs:OPT
4 …RUN: opt -S -mtriple=armv7-a -arm-parallel-dsp -dce %s -o - | FileCheck %s --check-prefix=CHECK-OPT
50 ; CHECK-OPT-LABEL: @complex_dot_prod(
51 ; CHECK-OPT-NEXT: entry:
52 ; CHECK-OPT-NEXT: [[TMP0:%.*]] = bitcast i16* [[PSRCA:%.*]] to i32*
53 ; CHECK-OPT-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 2
54 ; CHECK-OPT-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
55 ; CHECK-OPT-NEXT: [[TMP3:%.*]] = sext i16 [[TMP2]] to i32
56 ; CHECK-OPT-NEXT: [[TMP4:%.*]] = lshr i32 [[TMP1]], 16
57 ; CHECK-OPT-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
58 ; CHECK-OPT-NEXT: [[TMP6:%.*]] = sext i16 [[TMP5]] to i32
59 ; CHECK-OPT-NEXT: [[INCDEC_PTR1:%.*]] = getelementptr inbounds i16, i16* [[PSRCA]], i32 2
60 ; CHECK-OPT-NEXT: [[TMP7:%.*]] = bitcast i16* [[PSRCB:%.*]] to i32*
61 ; CHECK-OPT-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 2
62 ; CHECK-OPT-NEXT: [[TMP9:%.*]] = trunc i32 [[TMP8]] to i16
63 ; CHECK-OPT-NEXT: [[TMP10:%.*]] = call i64 @llvm.arm.smlaldx(i32 [[TMP1]], i32 [[TMP8]], i64 0)
64 ; CHECK-OPT-NEXT: [[TMP11:%.*]] = sext i16 [[TMP9]] to i32
65 ; CHECK-OPT-NEXT: [[TMP12:%.*]] = lshr i32 [[TMP8]], 16
66 ; CHECK-OPT-NEXT: [[TMP13:%.*]] = trunc i32 [[TMP12]] to i16
67 ; CHECK-OPT-NEXT: [[TMP14:%.*]] = sext i16 [[TMP13]] to i32
68 ; CHECK-OPT-NEXT: [[INCDEC_PTR3:%.*]] = getelementptr inbounds i16, i16* [[PSRCB]], i32 2
69 ; CHECK-OPT-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], [[TMP3]]
70 ; CHECK-OPT-NEXT: [[CONV5:%.*]] = sext i32 [[MUL]] to i64
71 ; CHECK-OPT-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP14]], [[TMP6]]
72 ; CHECK-OPT-NEXT: [[CONV14:%.*]] = sext i32 [[MUL13]] to i64
73 ; CHECK-OPT-NEXT: [[SUB:%.*]] = sub nsw i64 [[CONV5]], [[CONV14]]
74 ; CHECK-OPT-NEXT: [[TMP15:%.*]] = bitcast i16* [[INCDEC_PTR1]] to i32*
75 ; CHECK-OPT-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 2
76 ; CHECK-OPT-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
77 ; CHECK-OPT-NEXT: [[TMP18:%.*]] = sext i16 [[TMP17]] to i32
78 ; CHECK-OPT-NEXT: [[TMP19:%.*]] = lshr i32 [[TMP16]], 16
79 ; CHECK-OPT-NEXT: [[TMP20:%.*]] = trunc i32 [[TMP19]] to i16
80 ; CHECK-OPT-NEXT: [[TMP21:%.*]] = sext i16 [[TMP20]] to i32
81 ; CHECK-OPT-NEXT: [[INCDEC_PTR21:%.*]] = getelementptr inbounds i16, i16* [[PSRCA]], i32 4
82 ; CHECK-OPT-NEXT: [[TMP22:%.*]] = bitcast i16* [[INCDEC_PTR3]] to i32*
83 ; CHECK-OPT-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 2
84 ; CHECK-OPT-NEXT: [[TMP24:%.*]] = trunc i32 [[TMP23]] to i16
85 ; CHECK-OPT-NEXT: [[TMP25:%.*]] = call i64 @llvm.arm.smlaldx(i32 [[TMP16]], i32 [[TMP23]], i64 […
86 ; CHECK-OPT-NEXT: [[TMP26:%.*]] = sext i16 [[TMP24]] to i32
87 ; CHECK-OPT-NEXT: [[TMP27:%.*]] = lshr i32 [[TMP23]], 16
88 ; CHECK-OPT-NEXT: [[TMP28:%.*]] = trunc i32 [[TMP27]] to i16
89 ; CHECK-OPT-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
90 ; CHECK-OPT-NEXT: [[INCDEC_PTR23:%.*]] = getelementptr inbounds i16, i16* [[PSRCB]], i32 4
91 ; CHECK-OPT-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP26]], [[TMP18]]
92 ; CHECK-OPT-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
93 ; CHECK-OPT-NEXT: [[ADD28:%.*]] = add nsw i64 [[SUB]], [[CONV27]]
94 ; CHECK-OPT-NEXT: [[MUL36:%.*]] = mul nsw i32 [[TMP29]], [[TMP21]]
95 ; CHECK-OPT-NEXT: [[CONV37:%.*]] = sext i32 [[MUL36]] to i64
96 ; CHECK-OPT-NEXT: [[SUB38:%.*]] = sub nsw i64 [[ADD28]], [[CONV37]]
97 ; CHECK-OPT-NEXT: [[TMP30:%.*]] = bitcast i16* [[INCDEC_PTR21]] to i32*
98 ; CHECK-OPT-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 2
99 ; CHECK-OPT-NEXT: [[TMP32:%.*]] = trunc i32 [[TMP31]] to i16
100 ; CHECK-OPT-NEXT: [[TMP33:%.*]] = sext i16 [[TMP32]] to i32
101 ; CHECK-OPT-NEXT: [[TMP34:%.*]] = lshr i32 [[TMP31]], 16
102 ; CHECK-OPT-NEXT: [[TMP35:%.*]] = trunc i32 [[TMP34]] to i16
103 ; CHECK-OPT-NEXT: [[TMP36:%.*]] = sext i16 [[TMP35]] to i32
104 ; CHECK-OPT-NEXT: [[INCDEC_PTR45:%.*]] = getelementptr inbounds i16, i16* [[PSRCA]], i32 6
105 ; CHECK-OPT-NEXT: [[TMP37:%.*]] = bitcast i16* [[INCDEC_PTR23]] to i32*
106 ; CHECK-OPT-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 2
107 ; CHECK-OPT-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i16
108 ; CHECK-OPT-NEXT: [[TMP40:%.*]] = call i64 @llvm.arm.smlaldx(i32 [[TMP31]], i32 [[TMP38]], i64 […
109 ; CHECK-OPT-NEXT: [[TMP41:%.*]] = sext i16 [[TMP39]] to i32
110 ; CHECK-OPT-NEXT: [[TMP42:%.*]] = lshr i32 [[TMP38]], 16
111 ; CHECK-OPT-NEXT: [[TMP43:%.*]] = trunc i32 [[TMP42]] to i16
112 ; CHECK-OPT-NEXT: [[TMP44:%.*]] = sext i16 [[TMP43]] to i32
113 ; CHECK-OPT-NEXT: [[INCDEC_PTR47:%.*]] = getelementptr inbounds i16, i16* [[PSRCB]], i32 6
114 ; CHECK-OPT-NEXT: [[MUL50:%.*]] = mul nsw i32 [[TMP41]], [[TMP33]]
115 ; CHECK-OPT-NEXT: [[CONV51:%.*]] = sext i32 [[MUL50]] to i64
116 ; CHECK-OPT-NEXT: [[ADD52:%.*]] = add nsw i64 [[SUB38]], [[CONV51]]
117 ; CHECK-OPT-NEXT: [[MUL60:%.*]] = mul nsw i32 [[TMP44]], [[TMP36]]
118 ; CHECK-OPT-NEXT: [[CONV61:%.*]] = sext i32 [[MUL60]] to i64
119 ; CHECK-OPT-NEXT: [[SUB62:%.*]] = sub nsw i64 [[ADD52]], [[CONV61]]
120 ; CHECK-OPT-NEXT: [[TMP45:%.*]] = bitcast i16* [[INCDEC_PTR45]] to i32*
121 ; CHECK-OPT-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 2
122 ; CHECK-OPT-NEXT: [[TMP47:%.*]] = trunc i32 [[TMP46]] to i16
123 ; CHECK-OPT-NEXT: [[TMP48:%.*]] = sext i16 [[TMP47]] to i32
124 ; CHECK-OPT-NEXT: [[TMP49:%.*]] = lshr i32 [[TMP46]], 16
125 ; CHECK-OPT-NEXT: [[TMP50:%.*]] = trunc i32 [[TMP49]] to i16
126 ; CHECK-OPT-NEXT: [[TMP51:%.*]] = sext i16 [[TMP50]] to i32
127 ; CHECK-OPT-NEXT: [[TMP52:%.*]] = bitcast i16* [[INCDEC_PTR47]] to i32*
128 ; CHECK-OPT-NEXT: [[TMP53:%.*]] = load i32, i32* [[TMP52]], align 2
129 ; CHECK-OPT-NEXT: [[TMP54:%.*]] = trunc i32 [[TMP53]] to i16
130 ; CHECK-OPT-NEXT: [[TMP55:%.*]] = call i64 @llvm.arm.smlaldx(i32 [[TMP46]], i32 [[TMP53]], i64 […
131 ; CHECK-OPT-NEXT: [[TMP56:%.*]] = sext i16 [[TMP54]] to i32
132 ; CHECK-OPT-NEXT: [[TMP57:%.*]] = lshr i32 [[TMP53]], 16
133 ; CHECK-OPT-NEXT: [[TMP58:%.*]] = trunc i32 [[TMP57]] to i16
134 ; CHECK-OPT-NEXT: [[TMP59:%.*]] = sext i16 [[TMP58]] to i32
135 ; CHECK-OPT-NEXT: [[MUL74:%.*]] = mul nsw i32 [[TMP56]], [[TMP48]]
136 ; CHECK-OPT-NEXT: [[CONV75:%.*]] = sext i32 [[MUL74]] to i64
137 ; CHECK-OPT-NEXT: [[ADD76:%.*]] = add nsw i64 [[SUB62]], [[CONV75]]
138 ; CHECK-OPT-NEXT: [[MUL84:%.*]] = mul nsw i32 [[TMP59]], [[TMP51]]
139 ; CHECK-OPT-NEXT: [[CONV85:%.*]] = sext i32 [[MUL84]] to i64
140 ; CHECK-OPT-NEXT: [[SUB86:%.*]] = sub nsw i64 [[ADD76]], [[CONV85]]
141 ; CHECK-OPT-NEXT: [[TMP60:%.*]] = lshr i64 [[SUB86]], 6
142 ; CHECK-OPT-NEXT: [[CONV92:%.*]] = trunc i64 [[TMP60]] to i32
143 ; CHECK-OPT-NEXT: store i32 [[CONV92]], i32* [[REALRESULT:%.*]], align 4
144 ; CHECK-OPT-NEXT: [[TMP61:%.*]] = lshr i64 [[TMP55]], 6
145 ; CHECK-OPT-NEXT: [[CONV94:%.*]] = trunc i64 [[TMP61]] to i32
146 ; CHECK-OPT-NEXT: store i32 [[CONV94]], i32* [[IMAGRESULT:%.*]], align 4
147 ; CHECK-OPT-NEXT: ret void