Lines Matching refs:SI
1 …le-block-placement -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefix=SI %s
5 ; SI-LABEL: {{^}}test_if:
11 ; SI: v_cmp_lt_i32_e32 vcc, 1,
12 ; SI-NEXT: s_mov_b64 {{s\[[0-9]+:[0-9]+\]}}, 0
13 ; SI-NEXT: s_mov_b64 {{s\[[0-9]+:[0-9]+\]}}, 0
14 ; SI-NEXT: s_and_saveexec_b64 [[SAVE1:s\[[0-9]+:[0-9]+\]]], vcc
15 ; SI-NEXT: s_xor_b64 [[SAVE2:s\[[0-9]+:[0-9]+\]]], exec, [[SAVE1]]
16 ; SI-NEXT: s_cbranch_execz [[FLOW_BB:.LBB[0-9]+_[0-9]+]]
18 ; SI-NEXT: ; %bb.{{[0-9]+}}: ; %LeafBlock3
19 ; SI: s_mov_b64 s[{{[0-9]:[0-9]}}], -1
20 ; SI: s_and_saveexec_b64
21 ; SI-NEXT: s_cbranch_execnz
24 ; SI: [[FLOW_BB]]:
25 ; SI-NEXT: s_andn2_saveexec_b64 [[SAVE2]], [[SAVE2]]
62 ; SI-LABEL: {{^}}simple_test_v_if:
63 ; SI: v_cmp_ne_u32_e32 vcc, 0, v{{[0-9]+}}
64 ; SI: s_and_saveexec_b64 [[BR_SREG:s\[[0-9]+:[0-9]+\]]], vcc
65 ; SI-NEXT: s_cbranch_execz [[EXIT:.LBB[0-9]+_[0-9]+]]
67 ; SI-NEXT: ; %bb.{{[0-9]+}}:
68 ; SI: buffer_store_dword
70 ; SI-NEXT: {{^}}[[EXIT]]:
71 ; SI: s_endpgm
88 ; SI-LABEL: {{^}}simple_test_v_if_ret_else_ret:
89 ; SI: v_cmp_ne_u32_e32 vcc, 0, v{{[0-9]+}}
90 ; SI: s_and_saveexec_b64 [[BR_SREG:s\[[0-9]+:[0-9]+\]]], vcc
91 ; SI-NEXT: s_cbranch_execz [[EXIT:.LBB[0-9]+_[0-9]+]]
93 ; SI-NEXT: ; %bb.{{[0-9]+}}:
94 ; SI: buffer_store_dword
96 ; SI-NEXT: {{^}}[[EXIT]]:
97 ; SI: s_endpgm
116 ; SI-LABEL: {{^}}simple_test_v_if_ret_else_code_ret:
117 ; SI: v_cmp_eq_u32_e32 vcc, 0, v{{[0-9]+}}
118 ; SI: s_and_saveexec_b64 [[BR_SREG:s\[[0-9]+:[0-9]+\]]], vcc
119 ; SI: s_xor_b64 [[BR_SREG]], exec, [[BR_SREG]]
120 ; SI: s_cbranch_execnz [[EXIT:.LBB[0-9]+_[0-9]+]]
122 ; SI-NEXT: {{^.LBB[0-9]+_[0-9]+}}: ; %Flow
123 ; SI-NEXT: s_andn2_saveexec_b64 [[BR_SREG]], [[BR_SREG]]
124 ; SI-NEXT: s_cbranch_execz [[UNIFIED_RETURN:.LBB[0-9]+_[0-9]+]]
126 ; SI-NEXT: ; %bb.{{[0-9]+}}: ; %then
127 ; SI: s_waitcnt
128 ; SI-NEXT: buffer_store_dword
130 ; SI-NEXT: {{^}}[[UNIFIED_RETURN]]: ; %UnifiedReturnBlock
131 ; SI: s_endpgm
133 ; SI-NEXT: {{^}}[[EXIT]]:
134 ; SI: ds_write_b32
150 ; SI-LABEL: {{^}}simple_test_v_loop:
151 ; SI: v_cmp_ne_u32_e32 vcc, 0, v{{[0-9]+}}
152 ; SI: s_and_saveexec_b64 [[BR_SREG:s\[[0-9]+:[0-9]+\]]], vcc
153 ; SI-NEXT: s_cbranch_execz [[LABEL_EXIT:.LBB[0-9]+_[0-9]+]]
155 ; SI: s_mov_b64 {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}
157 ; SI: [[LABEL_LOOP:.LBB[0-9]+_[0-9]+]]:
158 ; SI: buffer_load_dword
159 ; SI-DAG: buffer_store_dword
160 ; SI-DAG: s_cmpk_lg_i32 s{{[0-9]+}}, 0x100
161 ; SI: s_cbranch_scc1 [[LABEL_LOOP]]
162 ; SI: [[LABEL_EXIT]]:
163 ; SI: s_endpgm
185 ; SI-LABEL: {{^}}multi_vcond_loop:
189 ; SI: ; %bb.0:
190 ; SI: buffer_load_dword [[VBOUND:v[0-9]+]]
191 ; SI: v_cmp_lt_i32_e32 vcc
192 ; SI: s_and_saveexec_b64 [[OUTER_CMP_SREG:s\[[0-9]+:[0-9]+\]]], vcc
193 ; SI-NEXT: s_cbranch_execz [[LABEL_EXIT:.LBB[0-9]+_[0-9]+]]
196 ; SI: ; %bb.{{[0-9]+}}: ; %bb10.preheader
197 ; SI: s_mov_b64 [[COND_STATE:s\[[0-9]+:[0-9]+\]]], 0{{$}}
200 ; SI: .L[[LABEL_LOOP:BB[0-9]+_[0-9]+]]:
201 ; SI: buffer_load_dword [[B:v[0-9]+]]
202 ; SI: buffer_load_dword [[A:v[0-9]+]]
203 ; SI-DAG: v_cmp_ne_u32_e64 [[NEG1_CHECK_0:s\[[0-9]+:[0-9]+\]]], -1, [[A]]
204 ; SI-DAG: v_cmp_ne_u32_e32 [[NEG1_CHECK_1:vcc]], -1, [[B]]
205 ; SI: s_and_b64 [[ORNEG1:s\[[0-9]+:[0-9]+\]]], [[NEG1_CHECK_1]], [[NEG1_CHECK_0]]
206 ; SI: s_and_saveexec_b64 [[ORNEG2:s\[[0-9]+:[0-9]+\]]], [[ORNEG1]]
207 ; SI: s_cbranch_execz [[LABEL_FLOW:.LBB[0-9]+_[0-9]+]]
209 ; SI: ; %bb.{{[0-9]+}}: ; %bb20
210 ; SI: buffer_store_dword
212 ; SI: [[LABEL_FLOW]]:
213 ; SI-NEXT: ; in Loop: Header=[[LABEL_LOOP]]
214 ; SI-NEXT: s_or_b64 exec, exec, [[ORNEG2]]
215 ; SI-NEXT: s_and_b64 [[TMP1:s\[[0-9]+:[0-9]+\]]],
216 ; SI-NEXT: s_or_b64 [[COND_STATE]], [[TMP1]], [[COND_STATE]]
217 ; SI-NEXT: s_andn2_b64 exec, exec, [[COND_STATE]]
218 ; SI-NEXT: s_cbranch_execnz .L[[LABEL_LOOP]]
220 ; SI: [[LABEL_EXIT]]:
221 ; SI-NOT: [[COND_STATE]]
222 ; SI: s_endpgm