Lines Matching refs:k4
17 ; CHECK: %llvm.amdgcn.kernel.k4.lds.t = type { [12 x i8], [4 x i8], [11 x i8], [5 x i8], [10 x i8],…
26 ; CHECK: @llvm.amdgcn.kernel.k4.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k4.lds.t und…
145 ; CHECK-NOT: @k4.lds.size.9.align.1
146 ; CHECK-NOT: @k4.lds.size.10.align.2
147 ; CHECK-NOT: @k4.lds.size.11.align.4
148 ; CHECK-NOT: @k4.lds.size.12.align.8
149 @k4.lds.size.9.align.1 = internal unnamed_addr addrspace(3) global [9 x i8] undef, align 1
150 @k4.lds.size.10.align.2 = internal unnamed_addr addrspace(3) global [10 x i8] undef, align 2
151 @k4.lds.size.11.align.4 = internal unnamed_addr addrspace(3) global [11 x i8] undef, align 4
152 @k4.lds.size.12.align.8 = internal unnamed_addr addrspace(3) global [12 x i8] undef, align 8
154 define amdgpu_kernel void @k4() {
155 …%k4.lds.size.9.align.1.bc = bitcast [9 x i8] addrspace(3)* @k4.lds.size.9.align.1 to i8 addrspace(…
156 store i8 1, i8 addrspace(3)* %k4.lds.size.9.align.1.bc, align 1
158 …%k4.lds.size.10.align.2.bc = bitcast [10 x i8] addrspace(3)* @k4.lds.size.10.align.2 to i8 addrspa…
159 store i8 2, i8 addrspace(3)* %k4.lds.size.10.align.2.bc, align 2
161 …%k4.lds.size.11.align.4.bc = bitcast [11 x i8] addrspace(3)* @k4.lds.size.11.align.4 to i8 addrspa…
162 store i8 3, i8 addrspace(3)* %k4.lds.size.11.align.4.bc, align 4
164 …%k4.lds.size.12.align.8.bc = bitcast [12 x i8] addrspace(3)* @k4.lds.size.12.align.8 to i8 addrspa…
165 store i8 4, i8 addrspace(3)* %k4.lds.size.12.align.8.bc, align 8