Lines Matching refs:k3
14 ; CHECK: %llvm.amdgcn.kernel.k3.lds.t = type { [7 x i8], [1 x i8], [7 x i8], [1 x i8], [6 x i8], [2…
25 ; CHECK: @llvm.amdgcn.kernel.k3.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k3.lds.t und…
119 ; CHECK-NOT: @k3.lds.size.5.align.2
120 ; CHECK-NOT: @k3.lds.size.6.align.2
121 ; CHECK-NOT: @k3.lds.size.7.align.2
122 ; CHECK-NOT: @k3.lds.size.7.align.4
123 @k3.lds.size.5.align.2 = internal unnamed_addr addrspace(3) global [5 x i8] undef, align 2
124 @k3.lds.size.6.align.2 = internal unnamed_addr addrspace(3) global [6 x i8] undef, align 2
125 @k3.lds.size.7.align.2 = internal unnamed_addr addrspace(3) global [7 x i8] undef, align 2
126 @k3.lds.size.7.align.4 = internal unnamed_addr addrspace(3) global [7 x i8] undef, align 4
128 define amdgpu_kernel void @k3() {
129 …%k3.lds.size.5.align.2.bc = bitcast [5 x i8] addrspace(3)* @k3.lds.size.5.align.2 to i8 addrspace(…
130 store i8 1, i8 addrspace(3)* %k3.lds.size.5.align.2.bc, align 2
132 …%k3.lds.size.6.align.2.bc = bitcast [6 x i8] addrspace(3)* @k3.lds.size.6.align.2 to i8 addrspace(…
133 store i8 2, i8 addrspace(3)* %k3.lds.size.6.align.2.bc, align 2
135 …%k3.lds.size.7.align.2.bc = bitcast [7 x i8] addrspace(3)* @k3.lds.size.7.align.2 to i8 addrspace(…
136 store i8 3, i8 addrspace(3)* %k3.lds.size.7.align.2.bc, align 2
138 …%k3.lds.size.7.align.4.bc = bitcast [7 x i8] addrspace(3)* @k3.lds.size.7.align.4 to i8 addrspace(…
139 store i8 4, i8 addrspace(3)* %k3.lds.size.7.align.4.bc, align 4