Lines Matching refs:GCN
2 … -mcpu=gfx600 -amdgpu-bypass-slow-div=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3 … -amdgpu-codegenprepare-expand-div64 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-IR %s
6 ; GCN-LABEL: s_test_udiv_i64:
7 ; GCN: ; %bb.0:
8 ; GCN-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd
9 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
10 ; GCN-NEXT: s_mov_b32 s7, 0xf000
11 ; GCN-NEXT: s_mov_b32 s6, -1
12 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
13 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
14 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s9
15 ; GCN-NEXT: s_sub_u32 s4, 0, s8
16 ; GCN-NEXT: s_subb_u32 s5, 0, s9
17 ; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
18 ; GCN-NEXT: v_rcp_f32_e32 v0, v0
19 ; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
20 ; GCN-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
21 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
22 ; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
23 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
24 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
25 ; GCN-NEXT: v_mul_lo_u32 v2, s4, v1
26 ; GCN-NEXT: v_mul_hi_u32 v3, s4, v0
27 ; GCN-NEXT: v_mul_lo_u32 v5, s5, v0
28 ; GCN-NEXT: v_mul_lo_u32 v4, s4, v0
29 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3
30 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v5, v2
31 ; GCN-NEXT: v_mul_hi_u32 v3, v0, v4
32 ; GCN-NEXT: v_mul_lo_u32 v5, v0, v2
33 ; GCN-NEXT: v_mul_hi_u32 v7, v0, v2
34 ; GCN-NEXT: v_mul_hi_u32 v6, v1, v4
35 ; GCN-NEXT: v_mul_lo_u32 v4, v1, v4
36 ; GCN-NEXT: v_mul_hi_u32 v8, v1, v2
37 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
38 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v7, vcc
39 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
40 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v4
41 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v5, v6, vcc
42 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v8, vcc
43 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
44 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
45 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
46 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc
47 ; GCN-NEXT: v_mul_lo_u32 v2, s4, v1
48 ; GCN-NEXT: v_mul_hi_u32 v3, s4, v0
49 ; GCN-NEXT: v_mul_lo_u32 v4, s5, v0
50 ; GCN-NEXT: s_mov_b32 s5, s1
51 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
52 ; GCN-NEXT: v_mul_lo_u32 v3, s4, v0
53 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v4, v2
54 ; GCN-NEXT: v_mul_lo_u32 v6, v0, v2
55 ; GCN-NEXT: v_mul_hi_u32 v7, v0, v3
56 ; GCN-NEXT: v_mul_hi_u32 v8, v0, v2
57 ; GCN-NEXT: v_mul_hi_u32 v5, v1, v3
58 ; GCN-NEXT: v_mul_lo_u32 v3, v1, v3
59 ; GCN-NEXT: v_mul_hi_u32 v4, v1, v2
60 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
61 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc
62 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
63 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v6, v3
64 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v7, v5, vcc
65 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc
66 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
67 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
68 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
69 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc
70 ; GCN-NEXT: v_mul_lo_u32 v2, s2, v1
71 ; GCN-NEXT: v_mul_hi_u32 v3, s2, v0
72 ; GCN-NEXT: v_mul_hi_u32 v4, s2, v1
73 ; GCN-NEXT: v_mul_hi_u32 v5, s3, v1
74 ; GCN-NEXT: v_mul_lo_u32 v1, s3, v1
75 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
76 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
77 ; GCN-NEXT: v_mul_lo_u32 v4, s3, v0
78 ; GCN-NEXT: v_mul_hi_u32 v0, s3, v0
79 ; GCN-NEXT: s_mov_b32 s4, s0
80 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
81 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, v3, v0, vcc
82 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc
83 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
84 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v2, vcc
85 ; GCN-NEXT: v_mul_lo_u32 v2, s8, v1
86 ; GCN-NEXT: v_mul_hi_u32 v3, s8, v0
87 ; GCN-NEXT: v_mul_lo_u32 v4, s9, v0
88 ; GCN-NEXT: v_mov_b32_e32 v5, s9
89 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3
90 ; GCN-NEXT: v_mul_lo_u32 v3, s8, v0
91 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v4, v2
92 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, s3, v2
93 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, s2, v3
94 ; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v4, v5, vcc
95 ; GCN-NEXT: v_subrev_i32_e64 v5, s[0:1], s8, v3
96 ; GCN-NEXT: v_subbrev_u32_e64 v4, s[0:1], 0, v4, s[0:1]
97 ; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s9, v4
98 ; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
99 ; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s8, v5
100 ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
101 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s9, v4
102 ; GCN-NEXT: v_cndmask_b32_e64 v4, v6, v5, s[0:1]
103 ; GCN-NEXT: v_add_i32_e64 v5, s[0:1], 2, v0
104 ; GCN-NEXT: v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]
105 ; GCN-NEXT: v_add_i32_e64 v7, s[0:1], 1, v0
106 ; GCN-NEXT: v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
107 ; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v4
108 ; GCN-NEXT: v_cndmask_b32_e64 v4, v8, v6, s[0:1]
109 ; GCN-NEXT: v_mov_b32_e32 v6, s3
110 ; GCN-NEXT: v_subb_u32_e32 v2, vcc, v6, v2, vcc
111 ; GCN-NEXT: v_cmp_le_u32_e32 vcc, s9, v2
112 ; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
113 ; GCN-NEXT: v_cmp_le_u32_e32 vcc, s8, v3
114 ; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
115 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s9, v2
116 ; GCN-NEXT: v_cndmask_b32_e32 v2, v6, v3, vcc
117 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
118 ; GCN-NEXT: v_cndmask_b32_e64 v2, v7, v5, s[0:1]
119 ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
120 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
121 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
122 ; GCN-NEXT: s_endpgm
124 ; GCN-IR-LABEL: s_test_udiv_i64:
125 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
126 ; GCN-IR-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
127 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
128 ; GCN-IR-NEXT: s_mov_b64 s[6:7], 0
129 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
130 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[8:9], s[4:5], 0
131 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[10:11], s[2:3], 0
132 ; GCN-IR-NEXT: s_flbit_i32_b32 s12, s4
133 ; GCN-IR-NEXT: s_add_i32 s14, s12, 32
134 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[8:9], s[10:11]
135 ; GCN-IR-NEXT: s_flbit_i32_b32 s8, s5
136 ; GCN-IR-NEXT: s_min_u32 s10, s14, s8
137 ; GCN-IR-NEXT: s_flbit_i32_b32 s8, s2
138 ; GCN-IR-NEXT: s_add_i32 s8, s8, 32
139 ; GCN-IR-NEXT: s_flbit_i32_b32 s9, s3
140 ; GCN-IR-NEXT: s_min_u32 s14, s8, s9
141 ; GCN-IR-NEXT: s_sub_u32 s8, s10, s14
142 ; GCN-IR-NEXT: s_subb_u32 s9, 0, 0
143 ; GCN-IR-NEXT: v_cmp_gt_u64_e64 s[16:17], s[8:9], 63
144 ; GCN-IR-NEXT: s_mov_b32 s11, 0
145 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[16:17]
146 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[8:9], 63
147 ; GCN-IR-NEXT: s_xor_b64 s[18:19], s[12:13], -1
148 ; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17]
149 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17]
150 ; GCN-IR-NEXT: s_cbranch_vccz .LBB0_5
151 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
152 ; GCN-IR-NEXT: s_add_u32 s12, s8, 1
153 ; GCN-IR-NEXT: s_addc_u32 s13, s9, 0
154 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[16:17], s[12:13], 0
155 ; GCN-IR-NEXT: s_sub_i32 s8, 63, s8
156 ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, s[16:17]
157 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[2:3], s8
158 ; GCN-IR-NEXT: s_cbranch_vccz .LBB0_4
159 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
160 ; GCN-IR-NEXT: s_lshr_b64 s[12:13], s[2:3], s12
161 ; GCN-IR-NEXT: s_add_u32 s15, s4, -1
162 ; GCN-IR-NEXT: s_addc_u32 s16, s5, -1
163 ; GCN-IR-NEXT: s_not_b64 s[2:3], s[10:11]
164 ; GCN-IR-NEXT: s_add_u32 s2, s2, s14
165 ; GCN-IR-NEXT: s_addc_u32 s3, s3, 0
166 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
167 ; GCN-IR-NEXT: s_mov_b32 s7, 0
168 ; GCN-IR-NEXT: .LBB0_3: ; %udiv-do-while
169 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
170 ; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[12:13], 1
171 ; GCN-IR-NEXT: s_lshr_b32 s6, s9, 31
172 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[8:9], 1
173 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[6:7]
174 ; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]
175 ; GCN-IR-NEXT: s_sub_u32 s6, s15, s12
176 ; GCN-IR-NEXT: s_subb_u32 s6, s16, s13
177 ; GCN-IR-NEXT: s_ashr_i32 s10, s6, 31
178 ; GCN-IR-NEXT: s_mov_b32 s11, s10
179 ; GCN-IR-NEXT: s_and_b32 s6, s10, 1
180 ; GCN-IR-NEXT: s_and_b64 s[10:11], s[10:11], s[4:5]
181 ; GCN-IR-NEXT: s_sub_u32 s12, s12, s10
182 ; GCN-IR-NEXT: s_subb_u32 s13, s13, s11
183 ; GCN-IR-NEXT: s_add_u32 s2, s2, 1
184 ; GCN-IR-NEXT: s_addc_u32 s3, s3, 0
185 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[18:19], s[2:3], 0
186 ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[6:7]
187 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[18:19]
188 ; GCN-IR-NEXT: s_cbranch_vccz .LBB0_3
189 ; GCN-IR-NEXT: .LBB0_4: ; %Flow6
190 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[8:9], 1
191 ; GCN-IR-NEXT: s_or_b64 s[2:3], s[6:7], s[2:3]
192 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
193 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s3
194 ; GCN-IR-NEXT: s_branch .LBB0_6
195 ; GCN-IR-NEXT: .LBB0_5:
196 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s3
197 ; GCN-IR-NEXT: v_cndmask_b32_e64 v1, v0, 0, s[12:13]
198 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
199 ; GCN-IR-NEXT: v_cndmask_b32_e64 v0, v0, 0, s[12:13]
200 ; GCN-IR-NEXT: .LBB0_6: ; %udiv-end
201 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
202 ; GCN-IR-NEXT: s_mov_b32 s2, -1
203 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
204 ; GCN-IR-NEXT: s_endpgm
211 ; GCN-LABEL: v_test_udiv_i64:
212 ; GCN: ; %bb.0:
213 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
214 ; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2
215 ; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3
216 ; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v2
217 ; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v3, vcc
218 ; GCN-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5
219 ; GCN-NEXT: v_rcp_f32_e32 v4, v4
220 ; GCN-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4
221 ; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4
222 ; GCN-NEXT: v_trunc_f32_e32 v5, v5
223 ; GCN-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5
224 ; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5
225 ; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4
226 ; GCN-NEXT: v_mul_lo_u32 v8, v6, v5
227 ; GCN-NEXT: v_mul_hi_u32 v9, v6, v4
228 ; GCN-NEXT: v_mul_lo_u32 v10, v7, v4
229 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
230 ; GCN-NEXT: v_mul_lo_u32 v9, v6, v4
231 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v10
232 ; GCN-NEXT: v_mul_lo_u32 v10, v4, v8
233 ; GCN-NEXT: v_mul_hi_u32 v11, v4, v9
234 ; GCN-NEXT: v_mul_hi_u32 v12, v4, v8
235 ; GCN-NEXT: v_mul_hi_u32 v13, v5, v8
236 ; GCN-NEXT: v_mul_lo_u32 v8, v5, v8
237 ; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
238 ; GCN-NEXT: v_addc_u32_e32 v11, vcc, 0, v12, vcc
239 ; GCN-NEXT: v_mul_lo_u32 v12, v5, v9
240 ; GCN-NEXT: v_mul_hi_u32 v9, v5, v9
241 ; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v12
242 ; GCN-NEXT: v_addc_u32_e32 v9, vcc, v11, v9, vcc
243 ; GCN-NEXT: v_addc_u32_e32 v10, vcc, 0, v13, vcc
244 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
245 ; GCN-NEXT: v_addc_u32_e32 v9, vcc, 0, v10, vcc
246 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v8
247 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v5, v9, vcc
248 ; GCN-NEXT: v_mul_lo_u32 v8, v6, v5
249 ; GCN-NEXT: v_mul_hi_u32 v9, v6, v4
250 ; GCN-NEXT: v_mul_lo_u32 v7, v7, v4
251 ; GCN-NEXT: v_mul_lo_u32 v6, v6, v4
252 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
253 ; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7
254 ; GCN-NEXT: v_mul_lo_u32 v10, v4, v7
255 ; GCN-NEXT: v_mul_hi_u32 v11, v4, v6
256 ; GCN-NEXT: v_mul_hi_u32 v12, v4, v7
257 ; GCN-NEXT: v_mul_hi_u32 v9, v5, v6
258 ; GCN-NEXT: v_mul_lo_u32 v6, v5, v6
259 ; GCN-NEXT: v_mul_hi_u32 v8, v5, v7
260 ; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
261 ; GCN-NEXT: v_addc_u32_e32 v11, vcc, 0, v12, vcc
262 ; GCN-NEXT: v_mul_lo_u32 v7, v5, v7
263 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v10, v6
264 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, v11, v9, vcc
265 ; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc
266 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7
267 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc
268 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
269 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v5, v7, vcc
270 ; GCN-NEXT: v_mul_lo_u32 v6, v0, v5
271 ; GCN-NEXT: v_mul_hi_u32 v7, v0, v4
272 ; GCN-NEXT: v_mul_hi_u32 v8, v0, v5
273 ; GCN-NEXT: v_mul_hi_u32 v9, v1, v5
274 ; GCN-NEXT: v_mul_lo_u32 v5, v1, v5
275 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
276 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc
277 ; GCN-NEXT: v_mul_lo_u32 v8, v1, v4
278 ; GCN-NEXT: v_mul_hi_u32 v4, v1, v4
279 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
280 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, v7, v4, vcc
281 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, 0, v9, vcc
282 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
283 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v6, vcc
284 ; GCN-NEXT: v_mul_lo_u32 v6, v2, v5
285 ; GCN-NEXT: v_mul_hi_u32 v7, v2, v4
286 ; GCN-NEXT: v_mul_lo_u32 v8, v3, v4
287 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
288 ; GCN-NEXT: v_mul_lo_u32 v7, v2, v4
289 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
290 ; GCN-NEXT: v_sub_i32_e32 v8, vcc, v1, v6
291 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v7
292 ; GCN-NEXT: v_subb_u32_e64 v7, s[4:5], v8, v3, vcc
293 ; GCN-NEXT: v_sub_i32_e64 v8, s[4:5], v0, v2
294 ; GCN-NEXT: v_subbrev_u32_e64 v7, s[4:5], 0, v7, s[4:5]
295 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v3
296 ; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5]
297 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v2
298 ; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5]
299 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v7, v3
300 ; GCN-NEXT: v_cndmask_b32_e64 v7, v9, v8, s[4:5]
301 ; GCN-NEXT: v_add_i32_e64 v8, s[4:5], 2, v4
302 ; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v6, vcc
303 ; GCN-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v5, s[4:5]
304 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3
305 ; GCN-NEXT: v_add_i32_e64 v10, s[4:5], 1, v4
306 ; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
307 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2
308 ; GCN-NEXT: v_addc_u32_e64 v11, s[4:5], 0, v5, s[4:5]
309 ; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
310 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3
311 ; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v7
312 ; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
313 ; GCN-NEXT: v_cndmask_b32_e64 v7, v10, v8, s[4:5]
314 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
315 ; GCN-NEXT: v_cndmask_b32_e64 v1, v11, v9, s[4:5]
316 ; GCN-NEXT: v_cndmask_b32_e32 v0, v4, v7, vcc
317 ; GCN-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc
318 ; GCN-NEXT: s_setpc_b64 s[30:31]
320 ; GCN-IR-LABEL: v_test_udiv_i64:
321 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
322 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
323 ; GCN-IR-NEXT: v_ffbh_u32_e32 v4, v2
324 ; GCN-IR-NEXT: v_add_i32_e64 v4, s[6:7], 32, v4
325 ; GCN-IR-NEXT: v_ffbh_u32_e32 v5, v3
326 ; GCN-IR-NEXT: v_min_u32_e32 v8, v4, v5
327 ; GCN-IR-NEXT: v_ffbh_u32_e32 v4, v0
328 ; GCN-IR-NEXT: v_add_i32_e64 v4, s[6:7], 32, v4
329 ; GCN-IR-NEXT: v_ffbh_u32_e32 v5, v1
330 ; GCN-IR-NEXT: v_min_u32_e32 v9, v4, v5
331 ; GCN-IR-NEXT: v_sub_i32_e64 v6, s[6:7], v8, v9
332 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3]
333 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1]
334 ; GCN-IR-NEXT: v_subb_u32_e64 v7, s[6:7], 0, 0, s[6:7]
335 ; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[6:7], 63, v[6:7]
336 ; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
337 ; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7]
338 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[6:7]
339 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], -1
340 ; GCN-IR-NEXT: v_cndmask_b32_e64 v4, v1, 0, s[4:5]
341 ; GCN-IR-NEXT: v_cndmask_b32_e64 v5, v0, 0, s[4:5]
342 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[6:7], vcc
343 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
344 ; GCN-IR-NEXT: s_cbranch_execz .LBB1_6
345 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
346 ; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6
347 ; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc
348 ; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 63, v6
349 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11]
350 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[0:1], v4
351 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
352 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
353 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
354 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
355 ; GCN-IR-NEXT: s_cbranch_execz .LBB1_5
356 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
357 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v2
358 ; GCN-IR-NEXT: v_lshr_b64 v[10:11], v[0:1], v10
359 ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v3, vcc
360 ; GCN-IR-NEXT: v_not_b32_e32 v0, v8
361 ; GCN-IR-NEXT: v_not_b32_e32 v1, 0
362 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v9
363 ; GCN-IR-NEXT: v_mov_b32_e32 v8, 0
364 ; GCN-IR-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
365 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
366 ; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
367 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
368 ; GCN-IR-NEXT: .LBB1_3: ; %udiv-do-while
369 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
370 ; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1
371 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
372 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6
373 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
374 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v12, v10
375 ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v13, v11, vcc
376 ; GCN-IR-NEXT: v_or_b32_e32 v4, v8, v4
377 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v8, 31, v6
378 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 1, v0
379 ; GCN-IR-NEXT: v_or_b32_e32 v5, v9, v5
380 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v8
381 ; GCN-IR-NEXT: v_and_b32_e32 v9, v8, v3
382 ; GCN-IR-NEXT: v_and_b32_e32 v8, v8, v2
383 ; GCN-IR-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
384 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
385 ; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v8
386 ; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v9, s[4:5]
387 ; GCN-IR-NEXT: v_mov_b32_e32 v9, v7
388 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
389 ; GCN-IR-NEXT: v_mov_b32_e32 v8, v6
390 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
391 ; GCN-IR-NEXT: s_cbranch_execnz .LBB1_3
392 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
393 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
394 ; GCN-IR-NEXT: .LBB1_5: ; %Flow3
395 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
396 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1
397 ; GCN-IR-NEXT: v_or_b32_e32 v4, v7, v1
398 ; GCN-IR-NEXT: v_or_b32_e32 v5, v6, v0
399 ; GCN-IR-NEXT: .LBB1_6: ; %Flow4
400 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
401 ; GCN-IR-NEXT: v_mov_b32_e32 v0, v5
402 ; GCN-IR-NEXT: v_mov_b32_e32 v1, v4
403 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
409 ; GCN-LABEL: s_test_udiv24_64:
410 ; GCN: ; %bb.0:
411 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
412 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
413 ; GCN-NEXT: s_mov_b32 s7, 0xf000
414 ; GCN-NEXT: s_mov_b32 s6, -1
415 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
416 ; GCN-NEXT: s_lshr_b32 s2, s4, 8
417 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2
418 ; GCN-NEXT: s_lshr_b32 s2, s3, 8
419 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s2
420 ; GCN-NEXT: s_mov_b32 s4, s0
421 ; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0
422 ; GCN-NEXT: s_mov_b32 s5, s1
423 ; GCN-NEXT: v_mul_f32_e32 v2, v1, v2
424 ; GCN-NEXT: v_trunc_f32_e32 v2, v2
425 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v2
426 ; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1
427 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
428 ; GCN-NEXT: v_mov_b32_e32 v1, 0
429 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
430 ; GCN-NEXT: v_and_b32_e32 v0, 0xffffff, v0
431 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
432 ; GCN-NEXT: s_endpgm
434 ; GCN-IR-LABEL: s_test_udiv24_64:
435 ; GCN-IR: ; %bb.0:
436 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
437 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
438 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
439 ; GCN-IR-NEXT: s_mov_b32 s6, -1
440 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
441 ; GCN-IR-NEXT: s_lshr_b32 s2, s4, 8
442 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, s2
443 ; GCN-IR-NEXT: s_lshr_b32 s2, s3, 8
444 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v1, s2
445 ; GCN-IR-NEXT: s_mov_b32 s4, s0
446 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
447 ; GCN-IR-NEXT: s_mov_b32 s5, s1
448 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
449 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
450 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v3, v2
451 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
452 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
453 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
454 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
455 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0xffffff, v0
456 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
457 ; GCN-IR-NEXT: s_endpgm
466 ; GCN-LABEL: v_test_udiv24_i64:
467 ; GCN: ; %bb.0:
468 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
469 ; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v3
470 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, v0
471 ; GCN-NEXT: v_lshrrev_b32_e32 v1, 8, v1
472 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, v1
473 ; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0
474 ; GCN-NEXT: v_mul_f32_e32 v2, v1, v2
475 ; GCN-NEXT: v_trunc_f32_e32 v2, v2
476 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v2
477 ; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1
478 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
479 ; GCN-NEXT: v_mov_b32_e32 v1, 0
480 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
481 ; GCN-NEXT: v_and_b32_e32 v0, 0xffffff, v0
482 ; GCN-NEXT: s_setpc_b64 s[30:31]
484 ; GCN-IR-LABEL: v_test_udiv24_i64:
485 ; GCN-IR: ; %bb.0:
486 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
487 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 8, v3
488 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, v0
489 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v1, 8, v1
490 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v1, v1
491 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
492 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
493 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
494 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v3, v2
495 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
496 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
497 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
498 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
499 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0xffffff, v0
500 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
508 ; GCN-LABEL: s_test_udiv32_i64:
509 ; GCN: ; %bb.0:
510 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
511 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
512 ; GCN-NEXT: s_mov_b32 s7, 0xf000
513 ; GCN-NEXT: s_mov_b32 s6, -1
514 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
515 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s4
516 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s3
517 ; GCN-NEXT: s_mov_b32 s4, s0
518 ; GCN-NEXT: s_mov_b32 s5, s1
519 ; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0
520 ; GCN-NEXT: v_mul_f32_e32 v2, v1, v2
521 ; GCN-NEXT: v_trunc_f32_e32 v2, v2
522 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v2
523 ; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1
524 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
525 ; GCN-NEXT: v_mov_b32_e32 v1, 0
526 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
527 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
528 ; GCN-NEXT: s_endpgm
530 ; GCN-IR-LABEL: s_test_udiv32_i64:
531 ; GCN-IR: ; %bb.0:
532 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
533 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
534 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
535 ; GCN-IR-NEXT: s_mov_b32 s6, -1
536 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
537 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, s4
538 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v1, s3
539 ; GCN-IR-NEXT: s_mov_b32 s4, s0
540 ; GCN-IR-NEXT: s_mov_b32 s5, s1
541 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
542 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
543 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
544 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v3, v2
545 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
546 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
547 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
548 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
549 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
550 ; GCN-IR-NEXT: s_endpgm
559 ; GCN-LABEL: s_test_udiv31_i64:
560 ; GCN: ; %bb.0:
561 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
562 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
563 ; GCN-NEXT: s_mov_b32 s7, 0xf000
564 ; GCN-NEXT: s_mov_b32 s6, -1
565 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
566 ; GCN-NEXT: s_lshr_b32 s2, s4, 1
567 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2
568 ; GCN-NEXT: s_lshr_b32 s2, s3, 1
569 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s2
570 ; GCN-NEXT: s_mov_b32 s4, s0
571 ; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0
572 ; GCN-NEXT: s_mov_b32 s5, s1
573 ; GCN-NEXT: v_mul_f32_e32 v2, v1, v2
574 ; GCN-NEXT: v_trunc_f32_e32 v2, v2
575 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v2
576 ; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1
577 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
578 ; GCN-NEXT: v_mov_b32_e32 v1, 0
579 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
580 ; GCN-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
581 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
582 ; GCN-NEXT: s_endpgm
584 ; GCN-IR-LABEL: s_test_udiv31_i64:
585 ; GCN-IR: ; %bb.0:
586 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
587 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
588 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
589 ; GCN-IR-NEXT: s_mov_b32 s6, -1
590 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
591 ; GCN-IR-NEXT: s_lshr_b32 s2, s4, 1
592 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, s2
593 ; GCN-IR-NEXT: s_lshr_b32 s2, s3, 1
594 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v1, s2
595 ; GCN-IR-NEXT: s_mov_b32 s4, s0
596 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
597 ; GCN-IR-NEXT: s_mov_b32 s5, s1
598 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
599 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
600 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v3, v2
601 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
602 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
603 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
604 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
605 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
606 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
607 ; GCN-IR-NEXT: s_endpgm
616 ; GCN-LABEL: s_test_udiv23_i64:
617 ; GCN: ; %bb.0:
618 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
619 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
620 ; GCN-NEXT: s_mov_b32 s7, 0xf000
621 ; GCN-NEXT: s_mov_b32 s6, -1
622 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
623 ; GCN-NEXT: s_lshr_b32 s2, s4, 9
624 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2
625 ; GCN-NEXT: s_lshr_b32 s2, s3, 9
626 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s2
627 ; GCN-NEXT: s_mov_b32 s4, s0
628 ; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0
629 ; GCN-NEXT: s_mov_b32 s5, s1
630 ; GCN-NEXT: v_mul_f32_e32 v2, v1, v2
631 ; GCN-NEXT: v_trunc_f32_e32 v2, v2
632 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v2
633 ; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1
634 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
635 ; GCN-NEXT: v_mov_b32_e32 v1, 0
636 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
637 ; GCN-NEXT: v_and_b32_e32 v0, 0x7fffff, v0
638 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
639 ; GCN-NEXT: s_endpgm
641 ; GCN-IR-LABEL: s_test_udiv23_i64:
642 ; GCN-IR: ; %bb.0:
643 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
644 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
645 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
646 ; GCN-IR-NEXT: s_mov_b32 s6, -1
647 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
648 ; GCN-IR-NEXT: s_lshr_b32 s2, s4, 9
649 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, s2
650 ; GCN-IR-NEXT: s_lshr_b32 s2, s3, 9
651 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v1, s2
652 ; GCN-IR-NEXT: s_mov_b32 s4, s0
653 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
654 ; GCN-IR-NEXT: s_mov_b32 s5, s1
655 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
656 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
657 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v3, v2
658 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
659 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
660 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
661 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
662 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0x7fffff, v0
663 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
664 ; GCN-IR-NEXT: s_endpgm
673 ; GCN-LABEL: s_test_udiv24_i48:
674 ; GCN: ; %bb.0:
675 ; GCN-NEXT: s_load_dword s2, s[0:1], 0xe
676 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xd
677 ; GCN-NEXT: s_load_dword s6, s[0:1], 0xc
678 ; GCN-NEXT: v_cvt_f32_ubyte3_e32 v2, 0xffff
679 ; GCN-NEXT: s_mov_b32 s7, 0xf000
680 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
681 ; GCN-NEXT: s_and_b32 s3, s2, 0xffff
682 ; GCN-NEXT: s_and_b32 s2, s4, 0xff000000
683 ; GCN-NEXT: v_mov_b32_e32 v0, s2
684 ; GCN-NEXT: v_alignbit_b32 v0, s3, v0, 24
685 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0
686 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
687 ; GCN-NEXT: s_load_dword s0, s[0:1], 0xb
688 ; GCN-NEXT: s_and_b32 s8, s6, 0xffff
689 ; GCN-NEXT: s_mov_b32 s6, -1
690 ; GCN-NEXT: v_mac_f32_e32 v1, 0x4f800000, v2
691 ; GCN-NEXT: v_rcp_f32_e32 v1, v1
692 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
693 ; GCN-NEXT: s_and_b32 s9, s0, 0xff000000
694 ; GCN-NEXT: s_lshr_b64 s[0:1], s[2:3], 24
695 ; GCN-NEXT: s_sub_u32 s0, 0, s0
696 ; GCN-NEXT: v_mul_f32_e32 v1, 0x5f7ffffc, v1
697 ; GCN-NEXT: v_mul_f32_e32 v2, 0x2f800000, v1
698 ; GCN-NEXT: v_trunc_f32_e32 v2, v2
699 ; GCN-NEXT: v_mac_f32_e32 v1, 0xcf800000, v2
700 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
701 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
702 ; GCN-NEXT: s_subb_u32 s1, 0, s1
703 ; GCN-NEXT: v_mul_lo_u32 v3, s0, v2
704 ; GCN-NEXT: v_mul_hi_u32 v4, s0, v1
705 ; GCN-NEXT: v_mul_lo_u32 v5, s1, v1
706 ; GCN-NEXT: v_mul_lo_u32 v6, s0, v1
707 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v4
708 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v5, v3
709 ; GCN-NEXT: v_mul_lo_u32 v4, v1, v3
710 ; GCN-NEXT: v_mul_hi_u32 v5, v1, v6
711 ; GCN-NEXT: v_mul_hi_u32 v7, v1, v3
712 ; GCN-NEXT: v_mul_hi_u32 v8, v2, v3
713 ; GCN-NEXT: v_mul_lo_u32 v3, v2, v3
714 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
715 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v7, vcc
716 ; GCN-NEXT: v_mul_lo_u32 v7, v2, v6
717 ; GCN-NEXT: v_mul_hi_u32 v6, v2, v6
718 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v7
719 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, v5, v6, vcc
720 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v8, vcc
721 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
722 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v5, vcc
723 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
724 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, v2, v4, vcc
725 ; GCN-NEXT: v_mul_lo_u32 v3, s0, v2
726 ; GCN-NEXT: v_mul_hi_u32 v4, s0, v1
727 ; GCN-NEXT: v_mul_lo_u32 v5, s1, v1
728 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v4
729 ; GCN-NEXT: v_mul_lo_u32 v4, s0, v1
730 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
731 ; GCN-NEXT: v_mul_lo_u32 v7, v1, v3
732 ; GCN-NEXT: v_mul_hi_u32 v8, v1, v4
733 ; GCN-NEXT: v_mul_hi_u32 v9, v1, v3
734 ; GCN-NEXT: v_mul_hi_u32 v6, v2, v4
735 ; GCN-NEXT: v_mul_lo_u32 v4, v2, v4
736 ; GCN-NEXT: v_mul_hi_u32 v5, v2, v3
737 ; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7
738 ; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v9, vcc
739 ; GCN-NEXT: v_mul_lo_u32 v3, v2, v3
740 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v7, v4
741 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, v8, v6, vcc
742 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
743 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
744 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v5, vcc
745 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
746 ; GCN-NEXT: v_mov_b32_e32 v3, s9
747 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, v2, v4, vcc
748 ; GCN-NEXT: v_alignbit_b32 v3, s8, v3, 24
749 ; GCN-NEXT: v_mul_lo_u32 v4, v3, v2
750 ; GCN-NEXT: v_mul_hi_u32 v1, v3, v1
751 ; GCN-NEXT: v_mul_hi_u32 v2, v3, v2
752 ; GCN-NEXT: v_mov_b32_e32 v5, 0
753 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v4
754 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc
755 ; GCN-NEXT: v_add_i32_e32 v1, vcc, 0, v1
756 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v2, vcc
757 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc
758 ; GCN-NEXT: v_add_i32_e32 v1, vcc, 0, v1
759 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc
760 ; GCN-NEXT: v_mul_lo_u32 v6, v0, v2
761 ; GCN-NEXT: v_mul_hi_u32 v7, v0, v1
762 ; GCN-NEXT: v_add_i32_e32 v4, vcc, 2, v1
763 ; GCN-NEXT: v_mul_lo_u32 v10, v0, v1
764 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v2, vcc
765 ; GCN-NEXT: v_add_i32_e32 v8, vcc, 1, v1
766 ; GCN-NEXT: v_addc_u32_e32 v9, vcc, 0, v2, vcc
767 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
768 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, v3, v10
769 ; GCN-NEXT: v_subb_u32_e32 v6, vcc, 0, v6, vcc
770 ; GCN-NEXT: v_sub_i32_e32 v7, vcc, v3, v0
771 ; GCN-NEXT: v_subbrev_u32_e32 v10, vcc, 0, v6, vcc
772 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v7, v0
773 ; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc
774 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v10
775 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v3, v0
776 ; GCN-NEXT: v_cndmask_b32_e32 v7, -1, v7, vcc
777 ; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, s[0:1]
778 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
779 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7
780 ; GCN-NEXT: v_cndmask_b32_e64 v0, -1, v0, s[0:1]
781 ; GCN-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc
782 ; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v0
783 ; GCN-NEXT: v_cndmask_b32_e64 v0, v1, v4, s[0:1]
784 ; GCN-NEXT: v_cndmask_b32_e32 v1, v9, v5, vcc
785 ; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v1, s[0:1]
786 ; GCN-NEXT: buffer_store_short v1, off, s[4:7], 0 offset:4
787 ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
788 ; GCN-NEXT: s_endpgm
790 ; GCN-IR-LABEL: s_test_udiv24_i48:
791 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
792 ; GCN-IR-NEXT: s_load_dword s2, s[0:1], 0xc
793 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xb
794 ; GCN-IR-NEXT: s_load_dword s5, s[0:1], 0xe
795 ; GCN-IR-NEXT: s_load_dword s6, s[0:1], 0xd
796 ; GCN-IR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
797 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
798 ; GCN-IR-NEXT: s_and_b32 s3, s2, 0xffff
799 ; GCN-IR-NEXT: s_and_b32 s2, s4, 0xff000000
800 ; GCN-IR-NEXT: s_and_b32 s5, s5, 0xffff
801 ; GCN-IR-NEXT: s_and_b32 s4, s6, 0xff000000
802 ; GCN-IR-NEXT: s_lshr_b64 s[8:9], s[2:3], 24
803 ; GCN-IR-NEXT: s_lshr_b64 s[4:5], s[4:5], 24
804 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[6:7], s[4:5], 0
805 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[10:11], s[8:9], 0
806 ; GCN-IR-NEXT: s_mov_b64 s[2:3], 0
807 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[6:7], s[10:11]
808 ; GCN-IR-NEXT: s_flbit_i32_b32 s6, s4
809 ; GCN-IR-NEXT: s_add_i32 s6, s6, 32
810 ; GCN-IR-NEXT: s_flbit_i32_b32 s7, s5
811 ; GCN-IR-NEXT: s_min_u32 s10, s6, s7
812 ; GCN-IR-NEXT: s_flbit_i32_b32 s6, s8
813 ; GCN-IR-NEXT: s_add_i32 s6, s6, 32
814 ; GCN-IR-NEXT: s_flbit_i32_b32 s7, s9
815 ; GCN-IR-NEXT: s_min_u32 s14, s6, s7
816 ; GCN-IR-NEXT: s_sub_u32 s6, s10, s14
817 ; GCN-IR-NEXT: s_subb_u32 s7, 0, 0
818 ; GCN-IR-NEXT: v_cmp_gt_u64_e64 s[16:17], s[6:7], 63
819 ; GCN-IR-NEXT: s_mov_b32 s11, 0
820 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[16:17]
821 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[6:7], 63
822 ; GCN-IR-NEXT: s_xor_b64 s[18:19], s[12:13], -1
823 ; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17]
824 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17]
825 ; GCN-IR-NEXT: s_cbranch_vccz .LBB7_5
826 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
827 ; GCN-IR-NEXT: s_add_u32 s12, s6, 1
828 ; GCN-IR-NEXT: s_addc_u32 s13, s7, 0
829 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[16:17], s[12:13], 0
830 ; GCN-IR-NEXT: s_sub_i32 s6, 63, s6
831 ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, s[16:17]
832 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[8:9], s6
833 ; GCN-IR-NEXT: s_cbranch_vccz .LBB7_4
834 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
835 ; GCN-IR-NEXT: s_lshr_b64 s[12:13], s[8:9], s12
836 ; GCN-IR-NEXT: s_add_u32 s15, s4, -1
837 ; GCN-IR-NEXT: s_addc_u32 s16, s5, -1
838 ; GCN-IR-NEXT: s_not_b64 s[2:3], s[10:11]
839 ; GCN-IR-NEXT: s_add_u32 s8, s2, s14
840 ; GCN-IR-NEXT: s_addc_u32 s9, s3, 0
841 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
842 ; GCN-IR-NEXT: s_mov_b32 s3, 0
843 ; GCN-IR-NEXT: .LBB7_3: ; %udiv-do-while
844 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
845 ; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[12:13], 1
846 ; GCN-IR-NEXT: s_lshr_b32 s2, s7, 31
847 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[6:7], 1
848 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[2:3]
849 ; GCN-IR-NEXT: s_or_b64 s[6:7], s[10:11], s[6:7]
850 ; GCN-IR-NEXT: s_sub_u32 s2, s15, s12
851 ; GCN-IR-NEXT: s_subb_u32 s2, s16, s13
852 ; GCN-IR-NEXT: s_ashr_i32 s10, s2, 31
853 ; GCN-IR-NEXT: s_mov_b32 s11, s10
854 ; GCN-IR-NEXT: s_and_b32 s2, s10, 1
855 ; GCN-IR-NEXT: s_and_b64 s[10:11], s[10:11], s[4:5]
856 ; GCN-IR-NEXT: s_sub_u32 s12, s12, s10
857 ; GCN-IR-NEXT: s_subb_u32 s13, s13, s11
858 ; GCN-IR-NEXT: s_add_u32 s8, s8, 1
859 ; GCN-IR-NEXT: s_addc_u32 s9, s9, 0
860 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[18:19], s[8:9], 0
861 ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[2:3]
862 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[18:19]
863 ; GCN-IR-NEXT: s_cbranch_vccz .LBB7_3
864 ; GCN-IR-NEXT: .LBB7_4: ; %Flow3
865 ; GCN-IR-NEXT: s_lshl_b64 s[4:5], s[6:7], 1
866 ; GCN-IR-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]
867 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
868 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s3
869 ; GCN-IR-NEXT: s_branch .LBB7_6
870 ; GCN-IR-NEXT: .LBB7_5:
871 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s9
872 ; GCN-IR-NEXT: v_cndmask_b32_e64 v1, v0, 0, s[12:13]
873 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
874 ; GCN-IR-NEXT: v_cndmask_b32_e64 v0, v0, 0, s[12:13]
875 ; GCN-IR-NEXT: .LBB7_6: ; %udiv-end
876 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
877 ; GCN-IR-NEXT: s_mov_b32 s2, -1
878 ; GCN-IR-NEXT: buffer_store_short v1, off, s[0:3], 0 offset:4
879 ; GCN-IR-NEXT: buffer_store_dword v0, off, s[0:3], 0
880 ; GCN-IR-NEXT: s_endpgm
889 ; GCN-LABEL: s_test_udiv_k_num_i64:
890 ; GCN: ; %bb.0:
891 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
892 ; GCN-NEXT: s_mov_b32 s7, 0xf000
893 ; GCN-NEXT: s_mov_b32 s6, -1
894 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
895 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2
896 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s3
897 ; GCN-NEXT: s_sub_u32 s4, 0, s2
898 ; GCN-NEXT: s_subb_u32 s5, 0, s3
899 ; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
900 ; GCN-NEXT: v_rcp_f32_e32 v0, v0
901 ; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
902 ; GCN-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
903 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
904 ; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
905 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
906 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
907 ; GCN-NEXT: v_mul_lo_u32 v2, s4, v1
908 ; GCN-NEXT: v_mul_hi_u32 v3, s4, v0
909 ; GCN-NEXT: v_mul_lo_u32 v5, s5, v0
910 ; GCN-NEXT: v_mul_lo_u32 v4, s4, v0
911 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3
912 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v5, v2
913 ; GCN-NEXT: v_mul_hi_u32 v3, v0, v4
914 ; GCN-NEXT: v_mul_lo_u32 v5, v0, v2
915 ; GCN-NEXT: v_mul_hi_u32 v7, v0, v2
916 ; GCN-NEXT: v_mul_hi_u32 v6, v1, v4
917 ; GCN-NEXT: v_mul_lo_u32 v4, v1, v4
918 ; GCN-NEXT: v_mul_hi_u32 v8, v1, v2
919 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
920 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v7, vcc
921 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
922 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v4
923 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v5, v6, vcc
924 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v8, vcc
925 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
926 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
927 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
928 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc
929 ; GCN-NEXT: v_mul_lo_u32 v2, s4, v1
930 ; GCN-NEXT: v_mul_hi_u32 v3, s4, v0
931 ; GCN-NEXT: v_mul_lo_u32 v4, s5, v0
932 ; GCN-NEXT: s_mov_b32 s5, s1
933 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
934 ; GCN-NEXT: v_mul_lo_u32 v3, s4, v0
935 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v4, v2
936 ; GCN-NEXT: v_mul_lo_u32 v6, v0, v2
937 ; GCN-NEXT: v_mul_hi_u32 v7, v0, v3
938 ; GCN-NEXT: v_mul_hi_u32 v8, v0, v2
939 ; GCN-NEXT: v_mul_hi_u32 v5, v1, v3
940 ; GCN-NEXT: v_mul_lo_u32 v3, v1, v3
941 ; GCN-NEXT: v_mul_hi_u32 v4, v1, v2
942 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
943 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc
944 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
945 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v6, v3
946 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v7, v5, vcc
947 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc
948 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
949 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
950 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
951 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc
952 ; GCN-NEXT: v_mul_lo_u32 v2, v1, 24
953 ; GCN-NEXT: v_mul_hi_u32 v0, v0, 24
954 ; GCN-NEXT: v_mul_hi_u32 v1, v1, 24
955 ; GCN-NEXT: v_mov_b32_e32 v4, s3
956 ; GCN-NEXT: s_mov_b32 s4, s0
957 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
958 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v1, vcc
959 ; GCN-NEXT: v_mul_lo_u32 v1, s3, v0
960 ; GCN-NEXT: v_mul_hi_u32 v2, s2, v0
961 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v2
962 ; GCN-NEXT: v_mul_lo_u32 v2, s2, v0
963 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
964 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, 24, v2
965 ; GCN-NEXT: v_subb_u32_e64 v3, s[0:1], v3, v4, vcc
966 ; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s2, v2
967 ; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
968 ; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v3
969 ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
970 ; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s2, v4
971 ; GCN-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[0:1]
972 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s3, v3
973 ; GCN-NEXT: v_cndmask_b32_e64 v3, v5, v4, s[0:1]
974 ; GCN-NEXT: v_add_i32_e64 v4, s[0:1], 2, v0
975 ; GCN-NEXT: v_addc_u32_e64 v5, s[0:1], 0, 0, s[0:1]
976 ; GCN-NEXT: v_add_i32_e64 v6, s[0:1], 1, v0
977 ; GCN-NEXT: v_addc_u32_e64 v7, s[0:1], 0, 0, s[0:1]
978 ; GCN-NEXT: v_subb_u32_e32 v1, vcc, 0, v1, vcc
979 ; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3
980 ; GCN-NEXT: v_cmp_le_u32_e32 vcc, s3, v1
981 ; GCN-NEXT: v_cndmask_b32_e64 v3, v7, v5, s[0:1]
982 ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
983 ; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v2
984 ; GCN-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc
985 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1
986 ; GCN-NEXT: v_cndmask_b32_e32 v1, v5, v2, vcc
987 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
988 ; GCN-NEXT: v_cndmask_b32_e64 v2, v6, v4, s[0:1]
989 ; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc
990 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
991 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
992 ; GCN-NEXT: s_endpgm
994 ; GCN-IR-LABEL: s_test_udiv_k_num_i64:
995 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
996 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
997 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
998 ; GCN-IR-NEXT: s_flbit_i32_b32 s4, s2
999 ; GCN-IR-NEXT: s_flbit_i32_b32 s5, s3
1000 ; GCN-IR-NEXT: s_add_i32 s4, s4, 32
1001 ; GCN-IR-NEXT: s_min_u32 s8, s4, s5
1002 ; GCN-IR-NEXT: s_add_u32 s6, s8, 0xffffffc5
1003 ; GCN-IR-NEXT: s_addc_u32 s7, 0, -1
1004 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[10:11], s[2:3], 0
1005 ; GCN-IR-NEXT: v_cmp_gt_u64_e64 s[12:13], s[6:7], 63
1006 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0
1007 ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13]
1008 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[6:7], 63
1009 ; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1
1010 ; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13]
1011 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
1012 ; GCN-IR-NEXT: s_cbranch_vccz .LBB8_5
1013 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1014 ; GCN-IR-NEXT: s_add_u32 s10, s6, 1
1015 ; GCN-IR-NEXT: s_addc_u32 s11, s7, 0
1016 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[12:13], s[10:11], 0
1017 ; GCN-IR-NEXT: s_sub_i32 s6, 63, s6
1018 ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, s[12:13]
1019 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], 24, s6
1020 ; GCN-IR-NEXT: s_cbranch_vccz .LBB8_4
1021 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1022 ; GCN-IR-NEXT: s_lshr_b64 s[10:11], 24, s10
1023 ; GCN-IR-NEXT: s_add_u32 s14, s2, -1
1024 ; GCN-IR-NEXT: s_addc_u32 s15, s3, -1
1025 ; GCN-IR-NEXT: s_sub_u32 s8, 58, s8
1026 ; GCN-IR-NEXT: s_subb_u32 s9, 0, 0
1027 ; GCN-IR-NEXT: s_mov_b64 s[12:13], 0
1028 ; GCN-IR-NEXT: s_mov_b32 s5, 0
1029 ; GCN-IR-NEXT: .LBB8_3: ; %udiv-do-while
1030 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1031 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[10:11], 1
1032 ; GCN-IR-NEXT: s_lshr_b32 s4, s7, 31
1033 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[6:7], 1
1034 ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[4:5]
1035 ; GCN-IR-NEXT: s_or_b64 s[6:7], s[12:13], s[6:7]
1036 ; GCN-IR-NEXT: s_sub_u32 s4, s14, s10
1037 ; GCN-IR-NEXT: s_subb_u32 s4, s15, s11
1038 ; GCN-IR-NEXT: s_ashr_i32 s12, s4, 31
1039 ; GCN-IR-NEXT: s_mov_b32 s13, s12
1040 ; GCN-IR-NEXT: s_and_b32 s4, s12, 1
1041 ; GCN-IR-NEXT: s_and_b64 s[12:13], s[12:13], s[2:3]
1042 ; GCN-IR-NEXT: s_sub_u32 s10, s10, s12
1043 ; GCN-IR-NEXT: s_subb_u32 s11, s11, s13
1044 ; GCN-IR-NEXT: s_add_u32 s8, s8, 1
1045 ; GCN-IR-NEXT: s_addc_u32 s9, s9, 0
1046 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[16:17], s[8:9], 0
1047 ; GCN-IR-NEXT: s_mov_b64 s[12:13], s[4:5]
1048 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17]
1049 ; GCN-IR-NEXT: s_cbranch_vccz .LBB8_3
1050 ; GCN-IR-NEXT: .LBB8_4: ; %Flow5
1051 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[6:7], 1
1052 ; GCN-IR-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3]
1053 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
1054 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s3
1055 ; GCN-IR-NEXT: s_branch .LBB8_6
1056 ; GCN-IR-NEXT: .LBB8_5:
1057 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
1058 ; GCN-IR-NEXT: v_cndmask_b32_e64 v0, 24, 0, s[10:11]
1059 ; GCN-IR-NEXT: .LBB8_6: ; %udiv-end
1060 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
1061 ; GCN-IR-NEXT: s_mov_b32 s2, -1
1062 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1063 ; GCN-IR-NEXT: s_endpgm
1075 ; GCN-LABEL: v_test_udiv_pow2_k_num_i64:
1076 ; GCN: ; %bb.0:
1077 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1078 ; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0
1079 ; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1
1080 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v0
1081 ; GCN-NEXT: v_subb_u32_e32 v5, vcc, 0, v1, vcc
1082 ; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
1083 ; GCN-NEXT: v_rcp_f32_e32 v2, v2
1084 ; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
1085 ; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
1086 ; GCN-NEXT: v_trunc_f32_e32 v3, v3
1087 ; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
1088 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
1089 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
1090 ; GCN-NEXT: v_mul_lo_u32 v6, v4, v3
1091 ; GCN-NEXT: v_mul_hi_u32 v7, v4, v2
1092 ; GCN-NEXT: v_mul_lo_u32 v8, v5, v2
1093 ; GCN-NEXT: v_mul_lo_u32 v9, v4, v2
1094 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
1095 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
1096 ; GCN-NEXT: v_mul_hi_u32 v7, v2, v9
1097 ; GCN-NEXT: v_mul_lo_u32 v8, v2, v6
1098 ; GCN-NEXT: v_mul_hi_u32 v10, v2, v6
1099 ; GCN-NEXT: v_mul_hi_u32 v11, v3, v6
1100 ; GCN-NEXT: v_mul_lo_u32 v6, v3, v6
1101 ; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v8
1102 ; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v10, vcc
1103 ; GCN-NEXT: v_mul_lo_u32 v10, v3, v9
1104 ; GCN-NEXT: v_mul_hi_u32 v9, v3, v9
1105 ; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10
1106 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v8, v9, vcc
1107 ; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v11, vcc
1108 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
1109 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc
1110 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6
1111 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v7, vcc
1112 ; GCN-NEXT: v_mul_lo_u32 v6, v4, v3
1113 ; GCN-NEXT: v_mul_hi_u32 v7, v4, v2
1114 ; GCN-NEXT: v_mul_lo_u32 v5, v5, v2
1115 ; GCN-NEXT: v_mul_lo_u32 v4, v4, v2
1116 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
1117 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
1118 ; GCN-NEXT: v_mul_lo_u32 v8, v2, v5
1119 ; GCN-NEXT: v_mul_hi_u32 v9, v2, v4
1120 ; GCN-NEXT: v_mul_hi_u32 v10, v2, v5
1121 ; GCN-NEXT: v_mul_hi_u32 v7, v3, v4
1122 ; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
1123 ; GCN-NEXT: v_mul_hi_u32 v6, v3, v5
1124 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
1125 ; GCN-NEXT: v_addc_u32_e32 v9, vcc, 0, v10, vcc
1126 ; GCN-NEXT: v_mul_lo_u32 v5, v3, v5
1127 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v8, v4
1128 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, v9, v7, vcc
1129 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc
1130 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
1131 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v6, vcc
1132 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
1133 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, v3, v5, vcc
1134 ; GCN-NEXT: v_lshrrev_b32_e32 v2, 17, v2
1135 ; GCN-NEXT: v_mul_lo_u32 v3, v1, v2
1136 ; GCN-NEXT: v_mul_hi_u32 v4, v0, v2
1137 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
1138 ; GCN-NEXT: v_mul_lo_u32 v4, v0, v2
1139 ; GCN-NEXT: v_sub_i32_e32 v5, vcc, 0, v3
1140 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0x8000, v4
1141 ; GCN-NEXT: v_subb_u32_e64 v5, s[4:5], v5, v1, vcc
1142 ; GCN-NEXT: v_sub_i32_e64 v6, s[4:5], v4, v0
1143 ; GCN-NEXT: v_subbrev_u32_e64 v5, s[4:5], 0, v5, s[4:5]
1144 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v1
1145 ; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1146 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v0
1147 ; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5]
1148 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v5, v1
1149 ; GCN-NEXT: v_cndmask_b32_e64 v5, v7, v6, s[4:5]
1150 ; GCN-NEXT: v_add_i32_e64 v6, s[4:5], 2, v2
1151 ; GCN-NEXT: v_addc_u32_e64 v7, s[4:5], 0, 0, s[4:5]
1152 ; GCN-NEXT: v_add_i32_e64 v8, s[4:5], 1, v2
1153 ; GCN-NEXT: v_addc_u32_e64 v9, s[4:5], 0, 0, s[4:5]
1154 ; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc
1155 ; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5
1156 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v3, v1
1157 ; GCN-NEXT: v_cndmask_b32_e64 v5, v8, v6, s[4:5]
1158 ; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
1159 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v4, v0
1160 ; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
1161 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v3, v1
1162 ; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
1163 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
1164 ; GCN-NEXT: v_cndmask_b32_e64 v1, v9, v7, s[4:5]
1165 ; GCN-NEXT: v_cndmask_b32_e32 v0, v2, v5, vcc
1166 ; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
1167 ; GCN-NEXT: s_setpc_b64 s[30:31]
1169 ; GCN-IR-LABEL: v_test_udiv_pow2_k_num_i64:
1170 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1171 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1172 ; GCN-IR-NEXT: v_ffbh_u32_e32 v2, v0
1173 ; GCN-IR-NEXT: v_add_i32_e32 v2, vcc, 32, v2
1174 ; GCN-IR-NEXT: v_ffbh_u32_e32 v3, v1
1175 ; GCN-IR-NEXT: v_min_u32_e32 v6, v2, v3
1176 ; GCN-IR-NEXT: v_add_i32_e32 v4, vcc, 0xffffffd0, v6
1177 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[6:7], 0, -1, vcc
1178 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1]
1179 ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, 63, v[4:5]
1180 ; GCN-IR-NEXT: v_mov_b32_e32 v3, 0x8000
1181 ; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], vcc
1182 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[4:5]
1183 ; GCN-IR-NEXT: v_cndmask_b32_e64 v3, v3, 0, s[4:5]
1184 ; GCN-IR-NEXT: s_xor_b64 s[4:5], s[4:5], -1
1185 ; GCN-IR-NEXT: v_mov_b32_e32 v2, 0
1186 ; GCN-IR-NEXT: s_mov_b64 s[8:9], 0x8000
1187 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[4:5], vcc
1188 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
1189 ; GCN-IR-NEXT: s_cbranch_execz .LBB9_6
1190 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1191 ; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 1, v4
1192 ; GCN-IR-NEXT: v_addc_u32_e32 v8, vcc, 0, v5, vcc
1193 ; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v4
1194 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[7:8]
1195 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], s[8:9], v2
1196 ; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
1197 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
1198 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
1199 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
1200 ; GCN-IR-NEXT: s_cbranch_execz .LBB9_5
1201 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1202 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0
1203 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000
1204 ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc
1205 ; GCN-IR-NEXT: v_lshr_b64 v[8:9], s[4:5], v7
1206 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 47, v6
1207 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
1208 ; GCN-IR-NEXT: v_subb_u32_e64 v7, s[4:5], 0, 0, vcc
1209 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
1210 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
1211 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
1212 ; GCN-IR-NEXT: .LBB9_3: ; %udiv-do-while
1213 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1214 ; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
1215 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
1216 ; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4
1217 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
1218 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8
1219 ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc
1220 ; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2
1221 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4
1222 ; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 1, v6
1223 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
1224 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10
1225 ; GCN-IR-NEXT: v_and_b32_e32 v11, v10, v1
1226 ; GCN-IR-NEXT: v_and_b32_e32 v10, v10, v0
1227 ; GCN-IR-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc
1228 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[6:7]
1229 ; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v10
1230 ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v11, s[4:5]
1231 ; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
1232 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
1233 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v4
1234 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
1235 ; GCN-IR-NEXT: s_cbranch_execnz .LBB9_3
1236 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
1237 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
1238 ; GCN-IR-NEXT: .LBB9_5: ; %Flow3
1239 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
1240 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1
1241 ; GCN-IR-NEXT: v_or_b32_e32 v2, v5, v1
1242 ; GCN-IR-NEXT: v_or_b32_e32 v3, v4, v0
1243 ; GCN-IR-NEXT: .LBB9_6: ; %Flow4
1244 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
1245 ; GCN-IR-NEXT: v_mov_b32_e32 v0, v3
1246 ; GCN-IR-NEXT: v_mov_b32_e32 v1, v2
1247 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1253 ; GCN-LABEL: v_test_udiv_pow2_k_den_i64:
1254 ; GCN: ; %bb.0:
1255 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1256 ; GCN-NEXT: v_alignbit_b32 v0, v1, v0, 15
1257 ; GCN-NEXT: v_lshrrev_b32_e32 v1, 15, v1
1258 ; GCN-NEXT: s_setpc_b64 s[30:31]
1260 ; GCN-IR-LABEL: v_test_udiv_pow2_k_den_i64:
1261 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1262 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1263 ; GCN-IR-NEXT: v_ffbh_u32_e32 v2, v0
1264 ; GCN-IR-NEXT: v_add_i32_e64 v2, s[4:5], 32, v2
1265 ; GCN-IR-NEXT: v_ffbh_u32_e32 v3, v1
1266 ; GCN-IR-NEXT: v_min_u32_e32 v6, v2, v3
1267 ; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 48, v6
1268 ; GCN-IR-NEXT: v_subb_u32_e64 v5, s[4:5], 0, 0, s[4:5]
1269 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
1270 ; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[4:5]
1271 ; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
1272 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[4:5]
1273 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], -1
1274 ; GCN-IR-NEXT: v_cndmask_b32_e64 v2, v1, 0, s[4:5]
1275 ; GCN-IR-NEXT: v_cndmask_b32_e64 v3, v0, 0, s[4:5]
1276 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[6:7], vcc
1277 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
1278 ; GCN-IR-NEXT: s_cbranch_execz .LBB10_6
1279 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1280 ; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 1, v4
1281 ; GCN-IR-NEXT: v_addc_u32_e32 v8, vcc, 0, v5, vcc
1282 ; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v4
1283 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[7:8]
1284 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[0:1], v2
1285 ; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
1286 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
1287 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
1288 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
1289 ; GCN-IR-NEXT: s_cbranch_execz .LBB10_5
1290 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1291 ; GCN-IR-NEXT: v_lshr_b64 v[7:8], v[0:1], v7
1292 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 0xffffffcf, v6
1293 ; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
1294 ; GCN-IR-NEXT: v_addc_u32_e64 v1, s[4:5], 0, -1, vcc
1295 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
1296 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
1297 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
1298 ; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff
1299 ; GCN-IR-NEXT: .LBB10_3: ; %udiv-do-while
1300 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1301 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1
1302 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
1303 ; GCN-IR-NEXT: v_or_b32_e32 v6, v7, v4
1304 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, s12, v6
1305 ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v8, vcc
1306 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 1, v0
1307 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
1308 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v7, 31, v4
1309 ; GCN-IR-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
1310 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v7
1311 ; GCN-IR-NEXT: v_and_b32_e32 v7, 0x8000, v7
1312 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
1313 ; GCN-IR-NEXT: v_or_b32_e32 v3, v10, v3
1314 ; GCN-IR-NEXT: v_or_b32_e32 v2, v9, v2
1315 ; GCN-IR-NEXT: v_sub_i32_e64 v7, s[4:5], v6, v7
1316 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v5
1317 ; GCN-IR-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v8, s[4:5]
1318 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
1319 ; GCN-IR-NEXT: v_mov_b32_e32 v9, v4
1320 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
1321 ; GCN-IR-NEXT: s_cbranch_execnz .LBB10_3
1322 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
1323 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
1324 ; GCN-IR-NEXT: .LBB10_5: ; %Flow3
1325 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
1326 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1
1327 ; GCN-IR-NEXT: v_or_b32_e32 v2, v5, v1
1328 ; GCN-IR-NEXT: v_or_b32_e32 v3, v4, v0
1329 ; GCN-IR-NEXT: .LBB10_6: ; %Flow4
1330 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
1331 ; GCN-IR-NEXT: v_mov_b32_e32 v0, v3
1332 ; GCN-IR-NEXT: v_mov_b32_e32 v1, v2
1333 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1339 ; GCN-LABEL: s_test_udiv_k_den_i64:
1340 ; GCN: ; %bb.0:
1341 ; GCN-NEXT: v_mov_b32_e32 v0, 0x4f800000
1342 ; GCN-NEXT: v_madak_f32 v0, 0, v0, 0x41c00000
1343 ; GCN-NEXT: v_rcp_f32_e32 v0, v0
1344 ; GCN-NEXT: s_movk_i32 s4, 0xffe8
1345 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1346 ; GCN-NEXT: s_mov_b32 s7, 0xf000
1347 ; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
1348 ; GCN-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
1349 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
1350 ; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
1351 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
1352 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
1353 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1354 ; GCN-NEXT: s_mov_b32 s5, s1
1355 ; GCN-NEXT: s_mov_b32 s6, -1
1356 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s4
1357 ; GCN-NEXT: v_mul_lo_u32 v4, v1, s4
1358 ; GCN-NEXT: v_mul_lo_u32 v3, v0, s4
1359 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v0
1360 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
1361 ; GCN-NEXT: v_mul_hi_u32 v5, v0, v3
1362 ; GCN-NEXT: v_mul_lo_u32 v4, v0, v2
1363 ; GCN-NEXT: v_mul_hi_u32 v6, v0, v2
1364 ; GCN-NEXT: v_mul_hi_u32 v7, v1, v2
1365 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
1366 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
1367 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v6, vcc
1368 ; GCN-NEXT: v_mul_lo_u32 v6, v1, v3
1369 ; GCN-NEXT: v_mul_hi_u32 v3, v1, v3
1370 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
1371 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v5, v3, vcc
1372 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v7, vcc
1373 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
1374 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
1375 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
1376 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc
1377 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s4
1378 ; GCN-NEXT: v_mul_lo_u32 v3, v1, s4
1379 ; GCN-NEXT: v_mul_lo_u32 v4, v0, s4
1380 ; GCN-NEXT: s_mov_b32 s4, s0
1381 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v0
1382 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
1383 ; GCN-NEXT: v_mul_lo_u32 v3, v0, v2
1384 ; GCN-NEXT: v_mul_hi_u32 v5, v0, v4
1385 ; GCN-NEXT: v_mul_hi_u32 v6, v0, v2
1386 ; GCN-NEXT: v_mul_hi_u32 v7, v1, v2
1387 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
1388 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v5, v3
1389 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v6, vcc
1390 ; GCN-NEXT: v_mul_lo_u32 v6, v1, v4
1391 ; GCN-NEXT: v_mul_hi_u32 v4, v1, v4
1392 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v6
1393 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v5, v4, vcc
1394 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v7, vcc
1395 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
1396 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
1397 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
1398 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc
1399 ; GCN-NEXT: v_mul_lo_u32 v2, s2, v1
1400 ; GCN-NEXT: v_mul_hi_u32 v3, s2, v0
1401 ; GCN-NEXT: v_mul_hi_u32 v4, s2, v1
1402 ; GCN-NEXT: v_mul_hi_u32 v5, s3, v1
1403 ; GCN-NEXT: v_mul_lo_u32 v1, s3, v1
1404 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
1405 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
1406 ; GCN-NEXT: v_mul_lo_u32 v4, s3, v0
1407 ; GCN-NEXT: v_mul_hi_u32 v0, s3, v0
1408 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
1409 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, v3, v0, vcc
1410 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc
1411 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
1412 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v2, vcc
1413 ; GCN-NEXT: v_mul_lo_u32 v4, v1, 24
1414 ; GCN-NEXT: v_mul_hi_u32 v5, v0, 24
1415 ; GCN-NEXT: v_add_i32_e32 v2, vcc, 2, v0
1416 ; GCN-NEXT: v_mul_lo_u32 v8, v0, 24
1417 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
1418 ; GCN-NEXT: v_add_i32_e32 v6, vcc, 1, v0
1419 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v1, vcc
1420 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
1421 ; GCN-NEXT: v_mov_b32_e32 v5, s3
1422 ; GCN-NEXT: v_sub_i32_e32 v8, vcc, s2, v8
1423 ; GCN-NEXT: v_subb_u32_e32 v4, vcc, v5, v4, vcc
1424 ; GCN-NEXT: v_subrev_i32_e32 v5, vcc, 24, v8
1425 ; GCN-NEXT: v_subbrev_u32_e32 v9, vcc, 0, v4, vcc
1426 ; GCN-NEXT: v_cmp_lt_u32_e32 vcc, 23, v5
1427 ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
1428 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v9
1429 ; GCN-NEXT: v_cndmask_b32_e32 v5, -1, v5, vcc
1430 ; GCN-NEXT: v_cmp_lt_u32_e64 s[0:1], 23, v8
1431 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
1432 ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
1433 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v4
1434 ; GCN-NEXT: v_cndmask_b32_e64 v4, -1, v5, s[0:1]
1435 ; GCN-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc
1436 ; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v4
1437 ; GCN-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc
1438 ; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
1439 ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
1440 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
1441 ; GCN-NEXT: s_endpgm
1443 ; GCN-IR-LABEL: s_test_udiv_k_den_i64:
1444 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1445 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1446 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
1447 ; GCN-IR-NEXT: s_flbit_i32_b32 s4, s2
1448 ; GCN-IR-NEXT: s_flbit_i32_b32 s5, s3
1449 ; GCN-IR-NEXT: s_add_i32 s4, s4, 32
1450 ; GCN-IR-NEXT: s_min_u32 s10, s4, s5
1451 ; GCN-IR-NEXT: s_sub_u32 s6, 59, s10
1452 ; GCN-IR-NEXT: s_subb_u32 s7, 0, 0
1453 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[8:9], s[2:3], 0
1454 ; GCN-IR-NEXT: v_cmp_gt_u64_e64 s[12:13], s[6:7], 63
1455 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0
1456 ; GCN-IR-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
1457 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[6:7], 63
1458 ; GCN-IR-NEXT: s_xor_b64 s[14:15], s[8:9], -1
1459 ; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13]
1460 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
1461 ; GCN-IR-NEXT: s_cbranch_vccz .LBB11_5
1462 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1463 ; GCN-IR-NEXT: s_add_u32 s8, s6, 1
1464 ; GCN-IR-NEXT: s_addc_u32 s9, s7, 0
1465 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[12:13], s[8:9], 0
1466 ; GCN-IR-NEXT: s_sub_i32 s6, 63, s6
1467 ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, s[12:13]
1468 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[2:3], s6
1469 ; GCN-IR-NEXT: s_cbranch_vccz .LBB11_4
1470 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1471 ; GCN-IR-NEXT: s_lshr_b64 s[8:9], s[2:3], s8
1472 ; GCN-IR-NEXT: s_add_u32 s2, s10, 0xffffffc4
1473 ; GCN-IR-NEXT: s_addc_u32 s3, 0, -1
1474 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
1475 ; GCN-IR-NEXT: s_mov_b32 s5, 0
1476 ; GCN-IR-NEXT: .LBB11_3: ; %udiv-do-while
1477 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1478 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[8:9], 1
1479 ; GCN-IR-NEXT: s_lshr_b32 s4, s7, 31
1480 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[6:7], 1
1481 ; GCN-IR-NEXT: s_or_b64 s[8:9], s[8:9], s[4:5]
1482 ; GCN-IR-NEXT: s_or_b64 s[6:7], s[10:11], s[6:7]
1483 ; GCN-IR-NEXT: s_sub_u32 s4, 23, s8
1484 ; GCN-IR-NEXT: s_subb_u32 s4, 0, s9
1485 ; GCN-IR-NEXT: s_ashr_i32 s10, s4, 31
1486 ; GCN-IR-NEXT: s_and_b32 s4, s10, 1
1487 ; GCN-IR-NEXT: s_and_b32 s10, s10, 24
1488 ; GCN-IR-NEXT: s_sub_u32 s8, s8, s10
1489 ; GCN-IR-NEXT: s_subb_u32 s9, s9, 0
1490 ; GCN-IR-NEXT: s_add_u32 s2, s2, 1
1491 ; GCN-IR-NEXT: s_addc_u32 s3, s3, 0
1492 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[12:13], s[2:3], 0
1493 ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[4:5]
1494 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
1495 ; GCN-IR-NEXT: s_cbranch_vccz .LBB11_3
1496 ; GCN-IR-NEXT: .LBB11_4: ; %Flow5
1497 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[6:7], 1
1498 ; GCN-IR-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3]
1499 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
1500 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s3
1501 ; GCN-IR-NEXT: s_branch .LBB11_6
1502 ; GCN-IR-NEXT: .LBB11_5:
1503 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s3
1504 ; GCN-IR-NEXT: v_cndmask_b32_e64 v1, v0, 0, s[8:9]
1505 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
1506 ; GCN-IR-NEXT: v_cndmask_b32_e64 v0, v0, 0, s[8:9]
1507 ; GCN-IR-NEXT: .LBB11_6: ; %udiv-end
1508 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
1509 ; GCN-IR-NEXT: s_mov_b32 s2, -1
1510 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1511 ; GCN-IR-NEXT: s_endpgm
1518 ; GCN-LABEL: v_test_udiv_k_den_i64:
1519 ; GCN: ; %bb.0:
1520 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1521 ; GCN-NEXT: v_mov_b32_e32 v2, 0x4f800000
1522 ; GCN-NEXT: v_madak_f32 v2, 0, v2, 0x41c00000
1523 ; GCN-NEXT: v_rcp_f32_e32 v2, v2
1524 ; GCN-NEXT: s_movk_i32 s4, 0xffe8
1525 ; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
1526 ; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
1527 ; GCN-NEXT: v_trunc_f32_e32 v3, v3
1528 ; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
1529 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
1530 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
1531 ; GCN-NEXT: v_mul_hi_u32 v4, v2, s4
1532 ; GCN-NEXT: v_mul_lo_u32 v6, v3, s4
1533 ; GCN-NEXT: v_mul_lo_u32 v5, v2, s4
1534 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, v4, v2
1535 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
1536 ; GCN-NEXT: v_mul_hi_u32 v7, v2, v5
1537 ; GCN-NEXT: v_mul_lo_u32 v6, v2, v4
1538 ; GCN-NEXT: v_mul_hi_u32 v8, v2, v4
1539 ; GCN-NEXT: v_mul_hi_u32 v9, v3, v4
1540 ; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
1541 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
1542 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc
1543 ; GCN-NEXT: v_mul_lo_u32 v8, v3, v5
1544 ; GCN-NEXT: v_mul_hi_u32 v5, v3, v5
1545 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
1546 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v5, vcc
1547 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, 0, v9, vcc
1548 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
1549 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v6, vcc
1550 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
1551 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v5, vcc
1552 ; GCN-NEXT: v_mul_hi_u32 v4, v2, s4
1553 ; GCN-NEXT: v_mul_lo_u32 v5, v3, s4
1554 ; GCN-NEXT: v_mul_lo_u32 v6, v2, s4
1555 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, v4, v2
1556 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
1557 ; GCN-NEXT: v_mul_lo_u32 v5, v2, v4
1558 ; GCN-NEXT: v_mul_hi_u32 v7, v2, v6
1559 ; GCN-NEXT: v_mul_hi_u32 v8, v2, v4
1560 ; GCN-NEXT: v_mul_hi_u32 v9, v3, v4
1561 ; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
1562 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5
1563 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v8, vcc
1564 ; GCN-NEXT: v_mul_lo_u32 v8, v3, v6
1565 ; GCN-NEXT: v_mul_hi_u32 v6, v3, v6
1566 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v8
1567 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v6, vcc
1568 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, 0, v9, vcc
1569 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
1570 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v6, vcc
1571 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
1572 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v5, vcc
1573 ; GCN-NEXT: v_mul_lo_u32 v4, v0, v3
1574 ; GCN-NEXT: v_mul_hi_u32 v5, v0, v2
1575 ; GCN-NEXT: v_mul_hi_u32 v6, v0, v3
1576 ; GCN-NEXT: v_mul_hi_u32 v7, v1, v3
1577 ; GCN-NEXT: v_mul_lo_u32 v3, v1, v3
1578 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
1579 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v6, vcc
1580 ; GCN-NEXT: v_mul_lo_u32 v6, v1, v2
1581 ; GCN-NEXT: v_mul_hi_u32 v2, v1, v2
1582 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
1583 ; GCN-NEXT: v_addc_u32_e32 v2, vcc, v5, v2, vcc
1584 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v7, vcc
1585 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3
1586 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
1587 ; GCN-NEXT: v_mul_lo_u32 v4, v3, 24
1588 ; GCN-NEXT: v_mul_hi_u32 v5, v2, 24
1589 ; GCN-NEXT: v_mul_lo_u32 v6, v2, 24
1590 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
1591 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v6
1592 ; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v4, vcc
1593 ; GCN-NEXT: v_subrev_i32_e32 v4, vcc, 24, v0
1594 ; GCN-NEXT: v_subbrev_u32_e32 v5, vcc, 0, v1, vcc
1595 ; GCN-NEXT: v_cmp_lt_u32_e32 vcc, 23, v4
1596 ; GCN-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc
1597 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v5
1598 ; GCN-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
1599 ; GCN-NEXT: v_add_i32_e32 v5, vcc, 2, v2
1600 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, 0, v3, vcc
1601 ; GCN-NEXT: v_add_i32_e32 v7, vcc, 1, v2
1602 ; GCN-NEXT: v_cmp_lt_u32_e64 s[4:5], 23, v0
1603 ; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v3, vcc
1604 ; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, s[4:5]
1605 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v1
1606 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
1607 ; GCN-NEXT: v_cndmask_b32_e64 v0, -1, v0, s[4:5]
1608 ; GCN-NEXT: v_cndmask_b32_e32 v4, v7, v5, vcc
1609 ; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v0
1610 ; GCN-NEXT: v_cndmask_b32_e32 v1, v8, v6, vcc
1611 ; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v4, s[4:5]
1612 ; GCN-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]
1613 ; GCN-NEXT: s_setpc_b64 s[30:31]
1615 ; GCN-IR-LABEL: v_test_udiv_k_den_i64:
1616 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1617 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1618 ; GCN-IR-NEXT: v_ffbh_u32_e32 v2, v0
1619 ; GCN-IR-NEXT: v_add_i32_e64 v2, s[4:5], 32, v2
1620 ; GCN-IR-NEXT: v_ffbh_u32_e32 v3, v1
1621 ; GCN-IR-NEXT: v_min_u32_e32 v6, v2, v3
1622 ; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 59, v6
1623 ; GCN-IR-NEXT: v_subb_u32_e64 v5, s[4:5], 0, 0, s[4:5]
1624 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
1625 ; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[4:5]
1626 ; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
1627 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[4:5]
1628 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], -1
1629 ; GCN-IR-NEXT: v_cndmask_b32_e64 v2, v1, 0, s[4:5]
1630 ; GCN-IR-NEXT: v_cndmask_b32_e64 v3, v0, 0, s[4:5]
1631 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[6:7], vcc
1632 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
1633 ; GCN-IR-NEXT: s_cbranch_execz .LBB12_6
1634 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1635 ; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 1, v4
1636 ; GCN-IR-NEXT: v_addc_u32_e32 v8, vcc, 0, v5, vcc
1637 ; GCN-IR-NEXT: v_sub_i32_e64 v2, s[4:5], 63, v4
1638 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[7:8]
1639 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[0:1], v2
1640 ; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
1641 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
1642 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
1643 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
1644 ; GCN-IR-NEXT: s_cbranch_execz .LBB12_5
1645 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1646 ; GCN-IR-NEXT: v_lshr_b64 v[7:8], v[0:1], v7
1647 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 0xffffffc4, v6
1648 ; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
1649 ; GCN-IR-NEXT: v_addc_u32_e64 v1, s[4:5], 0, -1, vcc
1650 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
1651 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
1652 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
1653 ; GCN-IR-NEXT: .LBB12_3: ; %udiv-do-while
1654 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1655 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1
1656 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
1657 ; GCN-IR-NEXT: v_or_b32_e32 v6, v7, v4
1658 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, 23, v6
1659 ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v8, vcc
1660 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 1, v0
1661 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
1662 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v7, 31, v4
1663 ; GCN-IR-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
1664 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v7
1665 ; GCN-IR-NEXT: v_and_b32_e32 v7, 24, v7
1666 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[0:1]
1667 ; GCN-IR-NEXT: v_or_b32_e32 v3, v10, v3
1668 ; GCN-IR-NEXT: v_or_b32_e32 v2, v9, v2
1669 ; GCN-IR-NEXT: v_sub_i32_e64 v7, s[4:5], v6, v7
1670 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v5
1671 ; GCN-IR-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v8, s[4:5]
1672 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
1673 ; GCN-IR-NEXT: v_mov_b32_e32 v9, v4
1674 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
1675 ; GCN-IR-NEXT: s_cbranch_execnz .LBB12_3
1676 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
1677 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
1678 ; GCN-IR-NEXT: .LBB12_5: ; %Flow3
1679 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
1680 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1
1681 ; GCN-IR-NEXT: v_or_b32_e32 v2, v5, v1
1682 ; GCN-IR-NEXT: v_or_b32_e32 v3, v4, v0
1683 ; GCN-IR-NEXT: .LBB12_6: ; %Flow4
1684 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
1685 ; GCN-IR-NEXT: v_mov_b32_e32 v0, v3
1686 ; GCN-IR-NEXT: v_mov_b32_e32 v1, v2
1687 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1693 ; GCN-LABEL: s_test_udiv24_k_num_i64:
1694 ; GCN: ; %bb.0:
1695 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1696 ; GCN-NEXT: s_mov_b32 s4, 0x41c00000
1697 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1698 ; GCN-NEXT: s_lshr_b32 s2, s3, 8
1699 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2
1700 ; GCN-NEXT: s_mov_b32 s3, 0xf000
1701 ; GCN-NEXT: s_mov_b32 s2, -1
1702 ; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v0
1703 ; GCN-NEXT: v_mul_f32_e32 v1, 0x41c00000, v1
1704 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
1705 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v1
1706 ; GCN-NEXT: v_mad_f32 v1, -v1, v0, s4
1707 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
1708 ; GCN-NEXT: v_mov_b32_e32 v1, 0
1709 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1710 ; GCN-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1711 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1712 ; GCN-NEXT: s_endpgm
1714 ; GCN-IR-LABEL: s_test_udiv24_k_num_i64:
1715 ; GCN-IR: ; %bb.0:
1716 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1717 ; GCN-IR-NEXT: s_mov_b32 s4, 0x41c00000
1718 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
1719 ; GCN-IR-NEXT: s_lshr_b32 s2, s3, 8
1720 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, s2
1721 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
1722 ; GCN-IR-NEXT: s_mov_b32 s2, -1
1723 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v1, v0
1724 ; GCN-IR-NEXT: v_mul_f32_e32 v1, 0x41c00000, v1
1725 ; GCN-IR-NEXT: v_trunc_f32_e32 v1, v1
1726 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v2, v1
1727 ; GCN-IR-NEXT: v_mad_f32 v1, -v1, v0, s4
1728 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
1729 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
1730 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1731 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1732 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1733 ; GCN-IR-NEXT: s_endpgm
1741 ; GCN-LABEL: s_test_udiv24_k_den_i64:
1742 ; GCN: ; %bb.0:
1743 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1744 ; GCN-NEXT: s_mov_b32 s7, 0xf000
1745 ; GCN-NEXT: s_mov_b32 s6, -1
1746 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1747 ; GCN-NEXT: s_lshr_b32 s2, s3, 8
1748 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2
1749 ; GCN-NEXT: s_mov_b32 s2, 0x46b6fe00
1750 ; GCN-NEXT: s_mov_b32 s4, s0
1751 ; GCN-NEXT: s_mov_b32 s5, s1
1752 ; GCN-NEXT: v_mul_f32_e32 v1, 0x38331158, v0
1753 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
1754 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v1
1755 ; GCN-NEXT: v_mad_f32 v0, -v1, s2, v0
1756 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, s2
1757 ; GCN-NEXT: v_mov_b32_e32 v1, 0
1758 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1759 ; GCN-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1760 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
1761 ; GCN-NEXT: s_endpgm
1763 ; GCN-IR-LABEL: s_test_udiv24_k_den_i64:
1764 ; GCN-IR: ; %bb.0:
1765 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1766 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
1767 ; GCN-IR-NEXT: s_mov_b32 s6, -1
1768 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
1769 ; GCN-IR-NEXT: s_lshr_b32 s2, s3, 8
1770 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, s2
1771 ; GCN-IR-NEXT: s_mov_b32 s2, 0x46b6fe00
1772 ; GCN-IR-NEXT: s_mov_b32 s4, s0
1773 ; GCN-IR-NEXT: s_mov_b32 s5, s1
1774 ; GCN-IR-NEXT: v_mul_f32_e32 v1, 0x38331158, v0
1775 ; GCN-IR-NEXT: v_trunc_f32_e32 v1, v1
1776 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v2, v1
1777 ; GCN-IR-NEXT: v_mad_f32 v0, -v1, s2, v0
1778 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, s2
1779 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
1780 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1781 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1782 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
1783 ; GCN-IR-NEXT: s_endpgm
1791 ; GCN-LABEL: v_test_udiv24_k_num_i64:
1792 ; GCN: ; %bb.0:
1793 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1794 ; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1
1795 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, v0
1796 ; GCN-NEXT: s_mov_b32 s4, 0x41c00000
1797 ; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v0
1798 ; GCN-NEXT: v_mul_f32_e32 v1, 0x41c00000, v1
1799 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
1800 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v1
1801 ; GCN-NEXT: v_mad_f32 v1, -v1, v0, s4
1802 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
1803 ; GCN-NEXT: v_mov_b32_e32 v1, 0
1804 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1805 ; GCN-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1806 ; GCN-NEXT: s_setpc_b64 s[30:31]
1808 ; GCN-IR-LABEL: v_test_udiv24_k_num_i64:
1809 ; GCN-IR: ; %bb.0:
1810 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1811 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 8, v1
1812 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, v0
1813 ; GCN-IR-NEXT: s_mov_b32 s4, 0x41c00000
1814 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v1, v0
1815 ; GCN-IR-NEXT: v_mul_f32_e32 v1, 0x41c00000, v1
1816 ; GCN-IR-NEXT: v_trunc_f32_e32 v1, v1
1817 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v2, v1
1818 ; GCN-IR-NEXT: v_mad_f32 v1, -v1, v0, s4
1819 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
1820 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
1821 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1822 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1823 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1830 ; GCN-LABEL: v_test_udiv24_pow2_k_num_i64:
1831 ; GCN: ; %bb.0:
1832 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1833 ; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1
1834 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, v0
1835 ; GCN-NEXT: s_mov_b32 s4, 0x47000000
1836 ; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v0
1837 ; GCN-NEXT: v_mul_f32_e32 v1, 0x47000000, v1
1838 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
1839 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v1
1840 ; GCN-NEXT: v_mad_f32 v1, -v1, v0, s4
1841 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
1842 ; GCN-NEXT: v_mov_b32_e32 v1, 0
1843 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1844 ; GCN-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1845 ; GCN-NEXT: s_setpc_b64 s[30:31]
1847 ; GCN-IR-LABEL: v_test_udiv24_pow2_k_num_i64:
1848 ; GCN-IR: ; %bb.0:
1849 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1850 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 8, v1
1851 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, v0
1852 ; GCN-IR-NEXT: s_mov_b32 s4, 0x47000000
1853 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v1, v0
1854 ; GCN-IR-NEXT: v_mul_f32_e32 v1, 0x47000000, v1
1855 ; GCN-IR-NEXT: v_trunc_f32_e32 v1, v1
1856 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v2, v1
1857 ; GCN-IR-NEXT: v_mad_f32 v1, -v1, v0, s4
1858 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
1859 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
1860 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1861 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1862 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1869 ; GCN-LABEL: v_test_udiv24_pow2_k_den_i64:
1870 ; GCN: ; %bb.0:
1871 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1872 ; GCN-NEXT: v_lshrrev_b32_e32 v0, 23, v1
1873 ; GCN-NEXT: v_mov_b32_e32 v1, 0
1874 ; GCN-NEXT: s_setpc_b64 s[30:31]
1876 ; GCN-IR-LABEL: v_test_udiv24_pow2_k_den_i64:
1877 ; GCN-IR: ; %bb.0:
1878 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1879 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 8, v1
1880 ; GCN-IR-NEXT: v_cvt_f32_u32_e32 v0, v0
1881 ; GCN-IR-NEXT: s_mov_b32 s4, 0x47000000
1882 ; GCN-IR-NEXT: v_mul_f32_e32 v1, 0x38000000, v0
1883 ; GCN-IR-NEXT: v_trunc_f32_e32 v1, v1
1884 ; GCN-IR-NEXT: v_cvt_u32_f32_e32 v2, v1
1885 ; GCN-IR-NEXT: v_mad_f32 v0, -v1, s4, v0
1886 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, s4
1887 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
1888 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc
1889 ; GCN-IR-NEXT: v_and_b32_e32 v0, 0xffffff, v0
1890 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]