Lines Matching refs:sub3
19 ; CHECK-NEXT: undef %2.sub3:sgpr_128 = S_MOV_B32 61440
24 ; CHECK-NEXT: %3.sub1:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub3
26 ; CHECK-NEXT: %3.sub3:sgpr_128 = COPY %2.sub3
37 …undef %57.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET]].sub3, implicit $exec
45 …ndef %77.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET1]].sub3, implicit $exec
51 …ndef %95.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET2]].sub3, implicit $exec
57 …def %106.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET3]].sub3, implicit $exec
63 …def %123.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET4]].sub3, implicit $exec
69 …def %146.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET5]].sub3, implicit $exec
75 …ndef %37.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET6]].sub3, implicit $exec
80 …ndef %42.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET7]].sub3, implicit $exec
90 …].sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET]].sub3, implicit $exec
102 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET1]].sub3, implicit $exec
118 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET2]].sub3, implicit $exec
127 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET3]].sub3, implicit $exec
136 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET4]].sub3, implicit $exec
145 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET5]].sub3, implicit $exec
151 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET6]].sub3, implicit $exec
155 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET7]].sub3, implicit $exec
158 ; CHECK-NEXT: %43.sub3:vreg_128 = COPY %43.sub1
161 ; CHECK-NEXT: %42.sub3:vreg_128 = COPY %43.sub1
164 ; CHECK-NEXT: %41.sub3:vreg_128 = COPY %43.sub1
167 ; CHECK-NEXT: %40.sub3:vreg_128 = COPY %43.sub1
170 ; CHECK-NEXT: %38.sub3:vreg_128 = COPY %43.sub1
173 ; CHECK-NEXT: %37.sub3:vreg_128 = COPY %43.sub1
176 ; CHECK-NEXT: %36.sub3:vreg_128 = COPY %43.sub1
182 ; CHECK-NEXT: %157.sub3:vreg_128 = COPY %43.sub1
189 ; CHECK-NEXT: %149.sub3:vreg_128 = COPY %43.sub1
195 ; CHECK-NEXT: %145.sub3:vreg_128 = COPY %43.sub1
201 ; CHECK-NEXT: %141.sub3:vreg_128 = COPY %43.sub1
207 ; CHECK-NEXT: %137.sub3:vreg_128 = COPY %43.sub1
214 ; CHECK-NEXT: %126.sub3:vreg_128 = COPY %43.sub1
220 ; CHECK-NEXT: %122.sub3:vreg_128 = COPY %43.sub1
226 ; CHECK-NEXT: %118.sub3:vreg_128 = COPY %43.sub1
232 ; CHECK-NEXT: %114.sub3:vreg_128 = COPY %43.sub1
238 ; CHECK-NEXT: %110.sub3:vreg_128 = COPY %43.sub1
245 ; CHECK-NEXT: %105.sub3:vreg_128 = COPY %43.sub1
251 ; CHECK-NEXT: %101.sub3:vreg_128 = COPY %43.sub1
258 ; CHECK-NEXT: %99.sub3:vreg_128 = COPY %43.sub1
261 ; CHECK-NEXT: %19.sub3:vreg_128 = COPY %43.sub1
268 ; CHECK-NEXT: %94.sub3:vreg_128 = COPY %43.sub1
275 ; CHECK-NEXT: %90.sub3:vreg_128 = COPY %43.sub1
282 ; CHECK-NEXT: %86.sub3:vreg_128 = COPY %43.sub1
289 ; CHECK-NEXT: %81.sub3:vreg_128 = COPY %43.sub1
296 ; CHECK-NEXT: %76.sub3:vreg_128 = COPY %43.sub1
303 ; CHECK-NEXT: %71.sub3:vreg_128 = COPY %43.sub1
310 ; CHECK-NEXT: %66.sub3:vreg_128 = COPY %43.sub1
317 ; CHECK-NEXT: %61.sub3:vreg_128 = COPY %43.sub1
324 ; CHECK-NEXT: %56.sub3:vreg_128 = COPY %43.sub1
331 ; CHECK-NEXT: %51.sub3:vreg_128 = COPY %43.sub1
338 ; CHECK-NEXT: %46.sub3:vreg_128 = COPY %43.sub1
343 undef %2.sub3:sgpr_128 = S_MOV_B32 61440
348 %3.sub1:sgpr_128 = COPY %1.sub3
350 %3.sub3:sgpr_128 = COPY %2.sub3
359 undef %10.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %7.sub3, implicit $exec
363 undef %14.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %5.sub3, implicit $exec
367 undef %18.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %4.sub3, implicit $exec
371 undef %22.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %6.sub3, implicit $exec
376 undef %27.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %24.sub3, implicit $exec
381 undef %32.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %29.sub3, implicit $exec
386 undef %37.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %34.sub3, implicit $exec
391 undef %42.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %39.sub3, implicit $exec
396 %10.sub0:vreg_128 = V_AND_B32_e32 %44, %7.sub3, implicit $exec
400 %14.sub0:vreg_128 = V_AND_B32_e32 %44, %5.sub3, implicit $exec
404 %18.sub0:vreg_128 = V_AND_B32_e32 %44, %4.sub3, implicit $exec
408 %22.sub0:vreg_128 = V_AND_B32_e32 %44, %6.sub3, implicit $exec
412 %27.sub0:vreg_128 = V_AND_B32_e32 %44, %24.sub3, implicit $exec
416 %32.sub0:vreg_128 = V_AND_B32_e32 %44, %29.sub3, implicit $exec
420 %37.sub0:vreg_128 = V_AND_B32_e32 %44, %34.sub3, implicit $exec
424 %42.sub0:vreg_128 = V_AND_B32_e32 %44, %39.sub3, implicit $exec
427 %43.sub3:vreg_128 = COPY %43.sub1
430 %42.sub3:vreg_128 = COPY %43.sub1
433 %41.sub3:vreg_128 = COPY %43.sub1
436 %40.sub3:vreg_128 = COPY %43.sub1
439 %38.sub3:vreg_128 = COPY %43.sub1
442 %37.sub3:vreg_128 = COPY %43.sub1
445 %36.sub3:vreg_128 = COPY %43.sub1
448 %35.sub3:vreg_128 = COPY %43.sub1
451 %33.sub3:vreg_128 = COPY %43.sub1
454 %32.sub3:vreg_128 = COPY %43.sub1
457 %31.sub3:vreg_128 = COPY %43.sub1
460 %30.sub3:vreg_128 = COPY %43.sub1
463 %28.sub3:vreg_128 = COPY %43.sub1
466 %27.sub3:vreg_128 = COPY %43.sub1
469 %26.sub3:vreg_128 = COPY %43.sub1
472 %25.sub3:vreg_128 = COPY %43.sub1
475 %23.sub3:vreg_128 = COPY %43.sub1
478 %22.sub3:vreg_128 = COPY %43.sub1
481 %21.sub3:vreg_128 = COPY %43.sub1
484 %20.sub3:vreg_128 = COPY %43.sub1
487 %19.sub3:vreg_128 = COPY %43.sub1
490 %18.sub3:vreg_128 = COPY %43.sub1
493 %17.sub3:vreg_128 = COPY %43.sub1
496 %16.sub3:vreg_128 = COPY %43.sub1
499 %15.sub3:vreg_128 = COPY %43.sub1
502 %14.sub3:vreg_128 = COPY %43.sub1
505 %13.sub3:vreg_128 = COPY %43.sub1
508 %12.sub3:vreg_128 = COPY %43.sub1
511 %11.sub3:vreg_128 = COPY %43.sub1
514 %10.sub3:vreg_128 = COPY %43.sub1
517 %9.sub3:vreg_128 = COPY %43.sub1
520 %8.sub3:vreg_128 = COPY %43.sub1