Lines Matching refs:sub1

22     ; CHECK-NEXT: %2.sub1:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub1
24 ; CHECK-NEXT: %3.sub1:sgpr_128 = COPY [[S_LOAD_DWORDX4_IMM]].sub3
33 …undef %47.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET]].sub1, implicit $exec
41 …ndef %67.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET1]].sub1, implicit $exec
49 …ndef %87.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET2]].sub1, implicit $exec
54 …def %153.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET3]].sub1, implicit $exec
61 …def %115.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET4]].sub1, implicit $exec
67 …def %138.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET5]].sub1, implicit $exec
73 …def %156.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET6]].sub1, implicit $exec
78 …ndef %40.sub2:vreg_128 = V_LSHRREV_B32_e32 16, [[BUFFER_LOAD_DWORDX4_OFFSET7]].sub1, implicit $exec
84 …].sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET]].sub1, implicit $exec
96 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET1]].sub1, implicit $exec
110 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET2]].sub1, implicit $exec
122 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET3]].sub1, implicit $exec
132 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET4]].sub1, implicit $exec
141 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET5]].sub1, implicit $exec
149 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET6]].sub1, implicit $exec
153 ….sub0:vreg_128 = V_AND_B32_e32 [[S_MOV_B32_]], [[BUFFER_LOAD_DWORDX4_OFFSET7]].sub1, implicit $exec
157 ; CHECK-NEXT: %43.sub1:vreg_128 = V_MOV_B32_e32 0, implicit $exec
158 ; CHECK-NEXT: %43.sub3:vreg_128 = COPY %43.sub1
160 ; CHECK-NEXT: %42.sub1:vreg_128 = COPY %43.sub1
161 ; CHECK-NEXT: %42.sub3:vreg_128 = COPY %43.sub1
163 ; CHECK-NEXT: %41.sub1:vreg_128 = COPY %43.sub1
164 ; CHECK-NEXT: %41.sub3:vreg_128 = COPY %43.sub1
166 ; CHECK-NEXT: %40.sub1:vreg_128 = COPY %43.sub1
167 ; CHECK-NEXT: %40.sub3:vreg_128 = COPY %43.sub1
169 ; CHECK-NEXT: %38.sub1:vreg_128 = COPY %43.sub1
170 ; CHECK-NEXT: %38.sub3:vreg_128 = COPY %43.sub1
172 ; CHECK-NEXT: %37.sub1:vreg_128 = COPY %43.sub1
173 ; CHECK-NEXT: %37.sub3:vreg_128 = COPY %43.sub1
175 ; CHECK-NEXT: %36.sub1:vreg_128 = COPY %43.sub1
176 ; CHECK-NEXT: %36.sub3:vreg_128 = COPY %43.sub1
181 ; CHECK-NEXT: %157.sub1:vreg_128 = COPY %43.sub1
182 ; CHECK-NEXT: %157.sub3:vreg_128 = COPY %43.sub1
188 ; CHECK-NEXT: %149.sub1:vreg_128 = COPY %43.sub1
189 ; CHECK-NEXT: %149.sub3:vreg_128 = COPY %43.sub1
194 ; CHECK-NEXT: %145.sub1:vreg_128 = COPY %43.sub1
195 ; CHECK-NEXT: %145.sub3:vreg_128 = COPY %43.sub1
200 ; CHECK-NEXT: %141.sub1:vreg_128 = COPY %43.sub1
201 ; CHECK-NEXT: %141.sub3:vreg_128 = COPY %43.sub1
206 ; CHECK-NEXT: %137.sub1:vreg_128 = COPY %43.sub1
207 ; CHECK-NEXT: %137.sub3:vreg_128 = COPY %43.sub1
213 ; CHECK-NEXT: %126.sub1:vreg_128 = COPY %43.sub1
214 ; CHECK-NEXT: %126.sub3:vreg_128 = COPY %43.sub1
219 ; CHECK-NEXT: %122.sub1:vreg_128 = COPY %43.sub1
220 ; CHECK-NEXT: %122.sub3:vreg_128 = COPY %43.sub1
225 ; CHECK-NEXT: %118.sub1:vreg_128 = COPY %43.sub1
226 ; CHECK-NEXT: %118.sub3:vreg_128 = COPY %43.sub1
231 ; CHECK-NEXT: %114.sub1:vreg_128 = COPY %43.sub1
232 ; CHECK-NEXT: %114.sub3:vreg_128 = COPY %43.sub1
237 ; CHECK-NEXT: %110.sub1:vreg_128 = COPY %43.sub1
238 ; CHECK-NEXT: %110.sub3:vreg_128 = COPY %43.sub1
244 ; CHECK-NEXT: %105.sub1:vreg_128 = COPY %43.sub1
245 ; CHECK-NEXT: %105.sub3:vreg_128 = COPY %43.sub1
250 ; CHECK-NEXT: %101.sub1:vreg_128 = COPY %43.sub1
251 ; CHECK-NEXT: %101.sub3:vreg_128 = COPY %43.sub1
257 ; CHECK-NEXT: %99.sub1:vreg_128 = COPY %43.sub1
258 ; CHECK-NEXT: %99.sub3:vreg_128 = COPY %43.sub1
260 ; CHECK-NEXT: %19.sub1:vreg_128 = COPY %43.sub1
261 ; CHECK-NEXT: %19.sub3:vreg_128 = COPY %43.sub1
267 ; CHECK-NEXT: %94.sub1:vreg_128 = COPY %43.sub1
268 ; CHECK-NEXT: %94.sub3:vreg_128 = COPY %43.sub1
274 ; CHECK-NEXT: %90.sub1:vreg_128 = COPY %43.sub1
275 ; CHECK-NEXT: %90.sub3:vreg_128 = COPY %43.sub1
281 ; CHECK-NEXT: %86.sub1:vreg_128 = COPY %43.sub1
282 ; CHECK-NEXT: %86.sub3:vreg_128 = COPY %43.sub1
288 ; CHECK-NEXT: %81.sub1:vreg_128 = COPY %43.sub1
289 ; CHECK-NEXT: %81.sub3:vreg_128 = COPY %43.sub1
295 ; CHECK-NEXT: %76.sub1:vreg_128 = COPY %43.sub1
296 ; CHECK-NEXT: %76.sub3:vreg_128 = COPY %43.sub1
302 ; CHECK-NEXT: %71.sub1:vreg_128 = COPY %43.sub1
303 ; CHECK-NEXT: %71.sub3:vreg_128 = COPY %43.sub1
309 ; CHECK-NEXT: %66.sub1:vreg_128 = COPY %43.sub1
310 ; CHECK-NEXT: %66.sub3:vreg_128 = COPY %43.sub1
316 ; CHECK-NEXT: %61.sub1:vreg_128 = COPY %43.sub1
317 ; CHECK-NEXT: %61.sub3:vreg_128 = COPY %43.sub1
323 ; CHECK-NEXT: %56.sub1:vreg_128 = COPY %43.sub1
324 ; CHECK-NEXT: %56.sub3:vreg_128 = COPY %43.sub1
330 ; CHECK-NEXT: %51.sub1:vreg_128 = COPY %43.sub1
331 ; CHECK-NEXT: %51.sub3:vreg_128 = COPY %43.sub1
337 ; CHECK-NEXT: %46.sub1:vreg_128 = COPY %43.sub1
338 ; CHECK-NEXT: %46.sub3:vreg_128 = COPY %43.sub1
346 %2.sub1:sgpr_128 = COPY %1.sub1
348 %3.sub1:sgpr_128 = COPY %1.sub3
357 undef %8.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %7.sub1, implicit $exec
361 undef %12.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %5.sub1, implicit $exec
365 undef %16.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %4.sub1, implicit $exec
369 undef %20.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %6.sub1, implicit $exec
374 undef %25.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %24.sub1, implicit $exec
379 undef %30.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %29.sub1, implicit $exec
384 undef %35.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %34.sub1, implicit $exec
389 undef %40.sub2:vreg_128 = V_LSHRREV_B32_e32 16, %39.sub1, implicit $exec
394 %8.sub0:vreg_128 = V_AND_B32_e32 %44, %7.sub1, implicit $exec
398 %12.sub0:vreg_128 = V_AND_B32_e32 %44, %5.sub1, implicit $exec
402 %16.sub0:vreg_128 = V_AND_B32_e32 %44, %4.sub1, implicit $exec
406 %20.sub0:vreg_128 = V_AND_B32_e32 %44, %6.sub1, implicit $exec
410 %25.sub0:vreg_128 = V_AND_B32_e32 %44, %24.sub1, implicit $exec
414 %30.sub0:vreg_128 = V_AND_B32_e32 %44, %29.sub1, implicit $exec
418 %35.sub0:vreg_128 = V_AND_B32_e32 %44, %34.sub1, implicit $exec
422 %40.sub0:vreg_128 = V_AND_B32_e32 %44, %39.sub1, implicit $exec
426 %43.sub1:vreg_128 = V_MOV_B32_e32 0, implicit $exec
427 %43.sub3:vreg_128 = COPY %43.sub1
429 %42.sub1:vreg_128 = COPY %43.sub1
430 %42.sub3:vreg_128 = COPY %43.sub1
432 %41.sub1:vreg_128 = COPY %43.sub1
433 %41.sub3:vreg_128 = COPY %43.sub1
435 %40.sub1:vreg_128 = COPY %43.sub1
436 %40.sub3:vreg_128 = COPY %43.sub1
438 %38.sub1:vreg_128 = COPY %43.sub1
439 %38.sub3:vreg_128 = COPY %43.sub1
441 %37.sub1:vreg_128 = COPY %43.sub1
442 %37.sub3:vreg_128 = COPY %43.sub1
444 %36.sub1:vreg_128 = COPY %43.sub1
445 %36.sub3:vreg_128 = COPY %43.sub1
447 %35.sub1:vreg_128 = COPY %43.sub1
448 %35.sub3:vreg_128 = COPY %43.sub1
450 %33.sub1:vreg_128 = COPY %43.sub1
451 %33.sub3:vreg_128 = COPY %43.sub1
453 %32.sub1:vreg_128 = COPY %43.sub1
454 %32.sub3:vreg_128 = COPY %43.sub1
456 %31.sub1:vreg_128 = COPY %43.sub1
457 %31.sub3:vreg_128 = COPY %43.sub1
459 %30.sub1:vreg_128 = COPY %43.sub1
460 %30.sub3:vreg_128 = COPY %43.sub1
462 %28.sub1:vreg_128 = COPY %43.sub1
463 %28.sub3:vreg_128 = COPY %43.sub1
465 %27.sub1:vreg_128 = COPY %43.sub1
466 %27.sub3:vreg_128 = COPY %43.sub1
468 %26.sub1:vreg_128 = COPY %43.sub1
469 %26.sub3:vreg_128 = COPY %43.sub1
471 %25.sub1:vreg_128 = COPY %43.sub1
472 %25.sub3:vreg_128 = COPY %43.sub1
474 %23.sub1:vreg_128 = COPY %43.sub1
475 %23.sub3:vreg_128 = COPY %43.sub1
477 %22.sub1:vreg_128 = COPY %43.sub1
478 %22.sub3:vreg_128 = COPY %43.sub1
480 %21.sub1:vreg_128 = COPY %43.sub1
481 %21.sub3:vreg_128 = COPY %43.sub1
483 %20.sub1:vreg_128 = COPY %43.sub1
484 %20.sub3:vreg_128 = COPY %43.sub1
486 %19.sub1:vreg_128 = COPY %43.sub1
487 %19.sub3:vreg_128 = COPY %43.sub1
489 %18.sub1:vreg_128 = COPY %43.sub1
490 %18.sub3:vreg_128 = COPY %43.sub1
492 %17.sub1:vreg_128 = COPY %43.sub1
493 %17.sub3:vreg_128 = COPY %43.sub1
495 %16.sub1:vreg_128 = COPY %43.sub1
496 %16.sub3:vreg_128 = COPY %43.sub1
498 %15.sub1:vreg_128 = COPY %43.sub1
499 %15.sub3:vreg_128 = COPY %43.sub1
501 %14.sub1:vreg_128 = COPY %43.sub1
502 %14.sub3:vreg_128 = COPY %43.sub1
504 %13.sub1:vreg_128 = COPY %43.sub1
505 %13.sub3:vreg_128 = COPY %43.sub1
507 %12.sub1:vreg_128 = COPY %43.sub1
508 %12.sub3:vreg_128 = COPY %43.sub1
510 %11.sub1:vreg_128 = COPY %43.sub1
511 %11.sub3:vreg_128 = COPY %43.sub1
513 %10.sub1:vreg_128 = COPY %43.sub1
514 %10.sub3:vreg_128 = COPY %43.sub1
516 %9.sub1:vreg_128 = COPY %43.sub1
517 %9.sub3:vreg_128 = COPY %43.sub1
519 %8.sub1:vreg_128 = COPY %43.sub1
520 %8.sub3:vreg_128 = COPY %43.sub1