Lines Matching refs:m0

11 ; GCN-NEXT: s_mov_b32 m0, 0
13 ; GCN-DAG: s_mov_b32 [[M0_COPY:s[0-9]+]], m0
27 ; TOVGPR: s_mov_b32 m0, [[M0_RESTORE]]
32 ; TOVMEM: s_mov_b32 m0, [[M0_RESTORE]]
34 ; GCN: s_add_i32 s{{[0-9]+}}, m0, 1
37   %m0 = call i32 asm sideeffect "s_mov_b32 m0, 0", "={m0}"() #0
46   %foo = call i32 asm sideeffect "s_add_i32 $0, $1, 1", "=s,{m0}"(i32 %m0) #0
53 ; m0 is killed, so it isn't necessary during the entry block spill to preserve it
56 ; GCN-NOT: v_readlane_b32 m0
57 ; GCN-NOT: s_buffer_store_dword m0
58 ; GCN-NOT: s_buffer_load_dword m0
59 …%arg, <16 x i8> addrspace(4)* inreg %arg1, <32 x i8> addrspace(4)* inreg %arg2, i32 inreg %m0) #0 {
61   %tmp = call float @llvm.amdgcn.interp.mov(i32 2, i32 0, i32 0, i32 %m0)
72   %interp = call float @llvm.amdgcn.interp.mov(i32 2, i32 0, i32 0, i32 %m0)
82 ; Force save and restore of m0 during SMEM spill
86 ; GCN: ; def m0, 1
88 ; GCN: s_mov_b32 m0, [[REG0]]
91 ; GCN: ; clobber m0
93 ; TOSMEM: s_mov_b32 s2, m0
94 ; TOSMEM: s_add_u32 m0, s3, 0x100
95 ; TOSMEM-NEXT: s_buffer_store_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, m0 ; 8-byte F…
96 ; TOSMEM: s_mov_b32 m0, s2
103 ; TOSMEM: s_add_u32 m0, s3, 0x100
104 ; TOSMEM-NEXT: s_buffer_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, m0 ; 8-byte Fo…
106 ; GCN-NOT: v_readlane_b32 m0
107 ; GCN-NOT: s_buffer_store_dword m0
108 ; GCN-NOT: s_buffer_load_dword m0
109 define amdgpu_kernel void @m0_unavailable_spill(i32 %m0.arg) #0 {
111   %m0 = call i32 asm sideeffect "; def $0, 1", "={m0}"() #0
112   %tmp = call float @llvm.amdgcn.interp.mov(i32 2, i32 0, i32 0, i32 %m0.arg)
113   call void asm sideeffect "; clobber $0", "~{m0}"() #0
130 ; FIXME: RegScavenger::isRegUsed() always returns true if m0 is reserved, so we have to save and re…
131 ; FIXME-TOSMEM-NOT: m0
132 ; TOSMEM: s_add_u32 m0, s3, {{0x[0-9]+}}
133 ; TOSMEM: s_buffer_store_dword s1, s[88:91], m0 ; 4-byte Folded Spill
134 ; FIXME-TOSMEM-NOT: m0
136 ; TOSMEM: s_add_u32 m0, s3, {{0x[0-9]+}}
138 ; TOSMEM: s_buffer_store_dwordx2 [[REG]], s[88:91], m0 ; 8-byte Folded Spill
139 ; FIXME-TOSMEM-NOT: m0
143 ; TOSMEM: s_mov_b32 m0, -1
145 ; TOSMEM: s_mov_b32 s2, m0
146 ; TOSMEM: s_add_u32 m0, s3, 0x200
147 ; TOSMEM: s_buffer_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s[88:91], m0 ; 8-byte Folded Reload
148 ; TOSMEM: s_mov_b32 m0, s2
153 ; FIXME-TOSMEM-NOT: m0
154 ; TOSMEM: s_add_u32 m0, s3, 0x100
155 ; TOSMEM: s_buffer_load_dword s2, s[88:91], m0 ; 4-byte Folded Reload
156 ; FIXME-TOSMEM-NOT: m0
158 ; TOSMEM: s_mov_b32 [[REG1:s[0-9]+]], m0
159 ; TOSMEM: s_add_u32 m0, s3, 0x100
160 ; TOSMEM: s_buffer_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s[88:91], m0 ; 8-byte Folded Reload
161 ; TOSMEM: s_mov_b32 m0, [[REG1]]
162 ; TOSMEM: s_mov_b32 m0, -1
165 ; TOSMEM-NOT: m0
166 ; TOSMEM: s_mov_b32 m0, s2
167 ; TOSMEM: ; use m0
172   %m0 = call i32 asm sideeffect "s_mov_b32 m0, 0", "={m0}"() #0
179   call void asm sideeffect "; use $0", "{m0}"(i32 %m0) #0