Lines Matching refs:scc
23 …X10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[V_CMP_NE_U32_e64_]], -1, implicit-def $scc
24 …FX10-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[S_XOR_B32_]], $exec_lo, implicit-def $scc
25 …X10-NEXT: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 $exec_lo, [[S_AND_B32_]], implicit-def $scc
39 ; GFX10-NEXT: $exec_lo = S_OR_B32 $exec_lo, [[S_XOR_B32_1]], implicit-def $scc
43 …0-NEXT: [[S_XOR_B32_2:%[0-9]+]]:sreg_32 = S_XOR_B32 [[V_CMP_NE_U32_e64_1]], -1, implicit-def $scc
44 …10-NEXT: [[S_AND_B32_1:%[0-9]+]]:sreg_32 = S_AND_B32 [[S_XOR_B32_2]], $exec_lo, implicit-def $scc
45 …10-NEXT: [[S_XOR_B32_3:%[0-9]+]]:sreg_32 = S_XOR_B32 $exec_lo, [[S_AND_B32_1]], implicit-def $scc
58 ; GFX10-NEXT: $exec_lo = S_OR_B32 $exec_lo, [[S_XOR_B32_3]], implicit-def $scc
66 ; GFX10-NEXT: $exec_lo = S_OR_B32 $exec_lo, [[DEF2]], implicit-def $scc
79 %21:sreg_32 = S_XOR_B32 %20, -1, implicit-def $scc
80 %22:sreg_32 = S_AND_B32 %21, $exec_lo, implicit-def $scc
81 %23:sreg_32 = S_XOR_B32 $exec_lo, %22, implicit-def $scc
94 $exec_lo = S_OR_B32 $exec_lo, %23, implicit-def $scc
97 %26:sreg_32 = S_XOR_B32 %25, -1, implicit-def $scc
98 %27:sreg_32 = S_AND_B32 %26, $exec_lo, implicit-def $scc
99 %28:sreg_32 = S_XOR_B32 $exec_lo, %27, implicit-def $scc
112 $exec_lo = S_OR_B32 $exec_lo, %28, implicit-def $scc
119 $exec_lo = S_OR_B32 $exec_lo, %14, implicit-def $scc