Lines Matching refs:IR
3 … -amdgpu-codegenprepare-expand-div64 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-IR %s
141 ; GCN-IR-LABEL: s_test_sdiv:
142 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
143 ; GCN-IR-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
144 ; GCN-IR-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd
145 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
146 ; GCN-IR-NEXT: s_ashr_i32 s0, s7, 31
147 ; GCN-IR-NEXT: s_mov_b32 s1, s0
148 ; GCN-IR-NEXT: s_ashr_i32 s2, s9, 31
149 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[0:1], s[6:7]
150 ; GCN-IR-NEXT: s_mov_b32 s3, s2
151 ; GCN-IR-NEXT: s_sub_u32 s12, s6, s0
152 ; GCN-IR-NEXT: s_subb_u32 s13, s7, s0
153 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[2:3], s[8:9]
154 ; GCN-IR-NEXT: s_sub_u32 s6, s6, s2
155 ; GCN-IR-NEXT: s_subb_u32 s7, s7, s2
156 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[10:11], s[6:7], 0
157 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[14:15], s[12:13], 0
158 ; GCN-IR-NEXT: s_mov_b64 s[8:9], 0
159 ; GCN-IR-NEXT: s_or_b64 s[16:17], s[10:11], s[14:15]
160 ; GCN-IR-NEXT: s_flbit_i32_b32 s10, s6
161 ; GCN-IR-NEXT: s_add_i32 s10, s10, 32
162 ; GCN-IR-NEXT: s_flbit_i32_b32 s11, s7
163 ; GCN-IR-NEXT: s_min_u32 s14, s10, s11
164 ; GCN-IR-NEXT: s_flbit_i32_b32 s10, s12
165 ; GCN-IR-NEXT: s_add_i32 s10, s10, 32
166 ; GCN-IR-NEXT: s_flbit_i32_b32 s11, s13
167 ; GCN-IR-NEXT: s_min_u32 s18, s10, s11
168 ; GCN-IR-NEXT: s_sub_u32 s10, s14, s18
169 ; GCN-IR-NEXT: s_subb_u32 s11, 0, 0
170 ; GCN-IR-NEXT: v_cmp_gt_u64_e64 s[20:21], s[10:11], 63
171 ; GCN-IR-NEXT: s_mov_b32 s15, 0
172 ; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[20:21]
173 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[20:21], s[10:11], 63
174 ; GCN-IR-NEXT: s_xor_b64 s[22:23], s[16:17], -1
175 ; GCN-IR-NEXT: s_and_b64 s[20:21], s[22:23], s[20:21]
176 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[20:21]
177 ; GCN-IR-NEXT: s_cbranch_vccz .LBB0_5
178 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
179 ; GCN-IR-NEXT: s_add_u32 s16, s10, 1
180 ; GCN-IR-NEXT: s_addc_u32 s17, s11, 0
181 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[20:21], s[16:17], 0
182 ; GCN-IR-NEXT: s_sub_i32 s10, 63, s10
183 ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, s[20:21]
184 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[12:13], s10
185 ; GCN-IR-NEXT: s_cbranch_vccz .LBB0_4
186 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
187 ; GCN-IR-NEXT: s_lshr_b64 s[16:17], s[12:13], s16
188 ; GCN-IR-NEXT: s_add_u32 s19, s6, -1
189 ; GCN-IR-NEXT: s_addc_u32 s20, s7, -1
190 ; GCN-IR-NEXT: s_not_b64 s[8:9], s[14:15]
191 ; GCN-IR-NEXT: s_add_u32 s12, s8, s18
192 ; GCN-IR-NEXT: s_addc_u32 s13, s9, 0
193 ; GCN-IR-NEXT: s_mov_b64 s[14:15], 0
194 ; GCN-IR-NEXT: s_mov_b32 s9, 0
195 ; GCN-IR-NEXT: .LBB0_3: ; %udiv-do-while
196 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
197 ; GCN-IR-NEXT: s_lshl_b64 s[16:17], s[16:17], 1
198 ; GCN-IR-NEXT: s_lshr_b32 s8, s11, 31
199 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[10:11], 1
200 ; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[8:9]
201 ; GCN-IR-NEXT: s_or_b64 s[10:11], s[14:15], s[10:11]
202 ; GCN-IR-NEXT: s_sub_u32 s8, s19, s16
203 ; GCN-IR-NEXT: s_subb_u32 s8, s20, s17
204 ; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31
205 ; GCN-IR-NEXT: s_mov_b32 s15, s14
206 ; GCN-IR-NEXT: s_and_b32 s8, s14, 1
207 ; GCN-IR-NEXT: s_and_b64 s[14:15], s[14:15], s[6:7]
208 ; GCN-IR-NEXT: s_sub_u32 s16, s16, s14
209 ; GCN-IR-NEXT: s_subb_u32 s17, s17, s15
210 ; GCN-IR-NEXT: s_add_u32 s12, s12, 1
211 ; GCN-IR-NEXT: s_addc_u32 s13, s13, 0
212 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[22:23], s[12:13], 0
213 ; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9]
214 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[22:23]
215 ; GCN-IR-NEXT: s_cbranch_vccz .LBB0_3
216 ; GCN-IR-NEXT: .LBB0_4: ; %Flow6
217 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[10:11], 1
218 ; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7]
219 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
220 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
221 ; GCN-IR-NEXT: s_branch .LBB0_6
222 ; GCN-IR-NEXT: .LBB0_5:
223 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s13
224 ; GCN-IR-NEXT: v_cndmask_b32_e64 v1, v0, 0, s[16:17]
225 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
226 ; GCN-IR-NEXT: v_cndmask_b32_e64 v0, v0, 0, s[16:17]
227 ; GCN-IR-NEXT: .LBB0_6: ; %udiv-end
228 ; GCN-IR-NEXT: s_xor_b64 s[0:1], s[2:3], s[0:1]
229 ; GCN-IR-NEXT: v_xor_b32_e32 v0, s0, v0
230 ; GCN-IR-NEXT: v_xor_b32_e32 v1, s1, v1
231 ; GCN-IR-NEXT: v_mov_b32_e32 v2, s1
232 ; GCN-IR-NEXT: v_subrev_i32_e32 v0, vcc, s0, v0
233 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
234 ; GCN-IR-NEXT: s_mov_b32 s6, -1
235 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc
236 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
237 ; GCN-IR-NEXT: s_endpgm
368 ; GCN-IR-LABEL: v_test_sdiv:
369 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
370 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
371 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v4, 31, v1
372 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v4, v0
373 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v5, 31, v3
374 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v4, v1
375 ; GCN-IR-NEXT: v_sub_i32_e32 v11, vcc, v0, v4
376 ; GCN-IR-NEXT: v_subb_u32_e32 v12, vcc, v1, v4, vcc
377 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v5, v2
378 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v5, v3
379 ; GCN-IR-NEXT: v_sub_i32_e32 v2, vcc, v1, v5
380 ; GCN-IR-NEXT: v_subb_u32_e32 v3, vcc, v0, v5, vcc
381 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3]
382 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[11:12]
383 ; GCN-IR-NEXT: v_ffbh_u32_e32 v0, v2
384 ; GCN-IR-NEXT: s_or_b64 s[6:7], vcc, s[4:5]
385 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 32, v0
386 ; GCN-IR-NEXT: v_ffbh_u32_e32 v7, v3
387 ; GCN-IR-NEXT: v_min_u32_e32 v0, v0, v7
388 ; GCN-IR-NEXT: v_ffbh_u32_e32 v7, v11
389 ; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 32, v7
390 ; GCN-IR-NEXT: v_ffbh_u32_e32 v8, v12
391 ; GCN-IR-NEXT: v_min_u32_e32 v13, v7, v8
392 ; GCN-IR-NEXT: v_sub_i32_e32 v7, vcc, v0, v13
393 ; GCN-IR-NEXT: v_subb_u32_e64 v8, s[4:5], 0, 0, vcc
394 ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, 63, v[7:8]
395 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[4:5], 63, v[7:8]
396 ; GCN-IR-NEXT: s_or_b64 s[6:7], s[6:7], vcc
397 ; GCN-IR-NEXT: s_xor_b64 s[8:9], s[6:7], -1
398 ; GCN-IR-NEXT: v_mov_b32_e32 v6, v4
399 ; GCN-IR-NEXT: v_mov_b32_e32 v1, v5
400 ; GCN-IR-NEXT: v_cndmask_b32_e64 v10, v12, 0, s[6:7]
401 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[8:9], s[4:5]
402 ; GCN-IR-NEXT: v_cndmask_b32_e64 v9, v11, 0, s[6:7]
403 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
404 ; GCN-IR-NEXT: s_cbranch_execz .LBB1_6
405 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
406 ; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, 1, v7
407 ; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, 0, v8, vcc
408 ; GCN-IR-NEXT: v_sub_i32_e64 v7, s[4:5], 63, v7
409 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[14:15]
410 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[11:12], v7
411 ; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
412 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
413 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
414 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
415 ; GCN-IR-NEXT: s_cbranch_execz .LBB1_5
416 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
417 ; GCN-IR-NEXT: v_add_i32_e32 v18, vcc, -1, v2
418 ; GCN-IR-NEXT: v_addc_u32_e32 v19, vcc, -1, v3, vcc
419 ; GCN-IR-NEXT: v_not_b32_e32 v0, v0
420 ; GCN-IR-NEXT: v_lshr_b64 v[14:15], v[11:12], v14
421 ; GCN-IR-NEXT: v_not_b32_e32 v9, 0
422 ; GCN-IR-NEXT: v_add_i32_e32 v11, vcc, v0, v13
423 ; GCN-IR-NEXT: v_mov_b32_e32 v16, 0
424 ; GCN-IR-NEXT: v_addc_u32_e32 v12, vcc, 0, v9, vcc
425 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
426 ; GCN-IR-NEXT: v_mov_b32_e32 v17, 0
427 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
428 ; GCN-IR-NEXT: .LBB1_3: ; %udiv-do-while
429 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
430 ; GCN-IR-NEXT: v_lshl_b64 v[14:15], v[14:15], 1
431 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 31, v8
432 ; GCN-IR-NEXT: v_or_b32_e32 v0, v14, v0
433 ; GCN-IR-NEXT: v_sub_i32_e32 v9, vcc, v18, v0
434 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1
435 ; GCN-IR-NEXT: v_subb_u32_e32 v9, vcc, v19, v15, vcc
436 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v13, 31, v9
437 ; GCN-IR-NEXT: v_add_i32_e32 v11, vcc, 1, v11
438 ; GCN-IR-NEXT: v_or_b32_e32 v7, v16, v7
439 ; GCN-IR-NEXT: v_and_b32_e32 v9, 1, v13
440 ; GCN-IR-NEXT: v_and_b32_e32 v16, v13, v3
441 ; GCN-IR-NEXT: v_and_b32_e32 v13, v13, v2
442 ; GCN-IR-NEXT: v_addc_u32_e32 v12, vcc, 0, v12, vcc
443 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[11:12]
444 ; GCN-IR-NEXT: v_sub_i32_e64 v14, s[4:5], v0, v13
445 ; GCN-IR-NEXT: v_or_b32_e32 v8, v17, v8
446 ; GCN-IR-NEXT: v_subb_u32_e64 v15, s[4:5], v15, v16, s[4:5]
447 ; GCN-IR-NEXT: v_mov_b32_e32 v17, v10
448 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
449 ; GCN-IR-NEXT: v_mov_b32_e32 v16, v9
450 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
451 ; GCN-IR-NEXT: s_cbranch_execnz .LBB1_3
452 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
453 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
454 ; GCN-IR-NEXT: .LBB1_5: ; %Flow3
455 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
456 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[7:8], 1
457 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v3
458 ; GCN-IR-NEXT: v_or_b32_e32 v9, v9, v2
459 ; GCN-IR-NEXT: .LBB1_6: ; %Flow4
460 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
461 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v5, v4
462 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v1, v6
463 ; GCN-IR-NEXT: v_xor_b32_e32 v3, v9, v0
464 ; GCN-IR-NEXT: v_xor_b32_e32 v2, v10, v1
465 ; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v3, v0
466 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v2, v1, vcc
467 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
503 ; GCN-IR-LABEL: s_test_sdiv24_64:
504 ; GCN-IR: ; %bb.0:
505 ; GCN-IR-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
506 ; GCN-IR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
507 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
508 ; GCN-IR-NEXT: s_mov_b32 s2, -1
509 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
510 ; GCN-IR-NEXT: s_mov_b32 s0, s4
511 ; GCN-IR-NEXT: s_ashr_i64 s[8:9], s[0:1], 40
512 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s8
513 ; GCN-IR-NEXT: s_mov_b32 s1, s5
514 ; GCN-IR-NEXT: s_ashr_i64 s[4:5], s[6:7], 40
515 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, s4
516 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
517 ; GCN-IR-NEXT: s_xor_b32 s4, s4, s8
518 ; GCN-IR-NEXT: s_ashr_i32 s4, s4, 30
519 ; GCN-IR-NEXT: s_or_b32 s4, s4, 1
520 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
521 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
522 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
523 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
524 ; GCN-IR-NEXT: v_mov_b32_e32 v3, s4
525 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
526 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
527 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v2, v0
528 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 24
529 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
530 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
531 ; GCN-IR-NEXT: s_endpgm
558 ; GCN-IR-LABEL: v_test_sdiv24_64:
559 ; GCN-IR: ; %bb.0:
560 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
561 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 8, v3
562 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, v0
563 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v1, 8, v1
564 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, v1
565 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
566 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
567 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
568 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v3, v2
569 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
570 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
571 ; GCN-IR-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc
572 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 25
573 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
574 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
609 ; GCN-IR-LABEL: s_test_sdiv32_64:
610 ; GCN-IR: ; %bb.0:
611 ; GCN-IR-NEXT: s_load_dword s8, s[0:1], 0xe
612 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
613 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
614 ; GCN-IR-NEXT: s_mov_b32 s6, -1
615 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
616 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s8
617 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, s3
618 ; GCN-IR-NEXT: s_mov_b32 s4, s0
619 ; GCN-IR-NEXT: s_xor_b32 s0, s3, s8
620 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
621 ; GCN-IR-NEXT: s_ashr_i32 s0, s0, 30
622 ; GCN-IR-NEXT: s_or_b32 s0, s0, 1
623 ; GCN-IR-NEXT: v_mov_b32_e32 v3, s0
624 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
625 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
626 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
627 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
628 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
629 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
630 ; GCN-IR-NEXT: s_mov_b32 s5, s1
631 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v2, v0
632 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
633 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
634 ; GCN-IR-NEXT: s_endpgm
673 ; GCN-IR-LABEL: s_test_sdiv31_64:
674 ; GCN-IR: ; %bb.0:
675 ; GCN-IR-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
676 ; GCN-IR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
677 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
678 ; GCN-IR-NEXT: s_mov_b32 s2, -1
679 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
680 ; GCN-IR-NEXT: s_mov_b32 s0, s4
681 ; GCN-IR-NEXT: s_ashr_i64 s[8:9], s[0:1], 33
682 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s8
683 ; GCN-IR-NEXT: s_mov_b32 s1, s5
684 ; GCN-IR-NEXT: s_ashr_i64 s[4:5], s[6:7], 33
685 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, s4
686 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
687 ; GCN-IR-NEXT: s_xor_b32 s4, s4, s8
688 ; GCN-IR-NEXT: s_ashr_i32 s4, s4, 30
689 ; GCN-IR-NEXT: s_or_b32 s4, s4, 1
690 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
691 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
692 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
693 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
694 ; GCN-IR-NEXT: v_mov_b32_e32 v3, s4
695 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
696 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
697 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v2
698 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 31
699 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
700 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
701 ; GCN-IR-NEXT: s_endpgm
740 ; GCN-IR-LABEL: s_test_sdiv23_64:
741 ; GCN-IR: ; %bb.0:
742 ; GCN-IR-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
743 ; GCN-IR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
744 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
745 ; GCN-IR-NEXT: s_mov_b32 s2, -1
746 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
747 ; GCN-IR-NEXT: s_mov_b32 s0, s4
748 ; GCN-IR-NEXT: s_ashr_i64 s[8:9], s[0:1], 41
749 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s8
750 ; GCN-IR-NEXT: s_mov_b32 s1, s5
751 ; GCN-IR-NEXT: s_ashr_i64 s[4:5], s[6:7], 41
752 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, s4
753 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
754 ; GCN-IR-NEXT: s_xor_b32 s4, s4, s8
755 ; GCN-IR-NEXT: s_ashr_i32 s4, s4, 30
756 ; GCN-IR-NEXT: s_or_b32 s4, s4, 1
757 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
758 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
759 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
760 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
761 ; GCN-IR-NEXT: v_mov_b32_e32 v3, s4
762 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
763 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
764 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v2
765 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 23
766 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
767 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
768 ; GCN-IR-NEXT: s_endpgm
807 ; GCN-IR-LABEL: s_test_sdiv25_64:
808 ; GCN-IR: ; %bb.0:
809 ; GCN-IR-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
810 ; GCN-IR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
811 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
812 ; GCN-IR-NEXT: s_mov_b32 s2, -1
813 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
814 ; GCN-IR-NEXT: s_mov_b32 s0, s4
815 ; GCN-IR-NEXT: s_ashr_i64 s[8:9], s[0:1], 39
816 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s8
817 ; GCN-IR-NEXT: s_mov_b32 s1, s5
818 ; GCN-IR-NEXT: s_ashr_i64 s[4:5], s[6:7], 39
819 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, s4
820 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
821 ; GCN-IR-NEXT: s_xor_b32 s4, s4, s8
822 ; GCN-IR-NEXT: s_ashr_i32 s4, s4, 30
823 ; GCN-IR-NEXT: s_or_b32 s4, s4, 1
824 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
825 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
826 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
827 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
828 ; GCN-IR-NEXT: v_mov_b32_e32 v3, s4
829 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
830 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
831 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v2
832 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 25
833 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
834 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
835 ; GCN-IR-NEXT: s_endpgm
890 ; GCN-IR-LABEL: s_test_sdiv24_v2i64:
891 ; GCN-IR: ; %bb.0:
892 ; GCN-IR-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0xd
893 ; GCN-IR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
894 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
895 ; GCN-IR-NEXT: s_mov_b32 s2, -1
896 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
897 ; GCN-IR-NEXT: s_ashr_i64 s[8:9], s[8:9], 40
898 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s8
899 ; GCN-IR-NEXT: s_ashr_i64 s[4:5], s[4:5], 40
900 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, s4
901 ; GCN-IR-NEXT: s_xor_b32 s4, s4, s8
902 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v0
903 ; GCN-IR-NEXT: s_ashr_i32 s4, s4, 30
904 ; GCN-IR-NEXT: s_or_b32 s4, s4, 1
905 ; GCN-IR-NEXT: v_mov_b32_e32 v3, s4
906 ; GCN-IR-NEXT: v_mul_f32_e32 v2, v1, v2
907 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
908 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, v0, v1
909 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
910 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
911 ; GCN-IR-NEXT: s_ashr_i64 s[10:11], s[10:11], 40
912 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
913 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v2
914 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v2, s10
915 ; GCN-IR-NEXT: s_ashr_i64 s[6:7], s[6:7], 40
916 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v3, s6
917 ; GCN-IR-NEXT: s_xor_b32 s4, s6, s10
918 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v4, v2
919 ; GCN-IR-NEXT: s_ashr_i32 s4, s4, 30
920 ; GCN-IR-NEXT: s_or_b32 s4, s4, 1
921 ; GCN-IR-NEXT: v_mov_b32_e32 v5, s4
922 ; GCN-IR-NEXT: v_mul_f32_e32 v4, v3, v4
923 ; GCN-IR-NEXT: v_trunc_f32_e32 v4, v4
924 ; GCN-IR-NEXT: v_mad_f32 v3, -v4, v2, v3
925 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v4, v4
926 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|
927 ; GCN-IR-NEXT: v_cndmask_b32_e32 v2, 0, v5, vcc
928 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 24
929 ; GCN-IR-NEXT: v_add_i32_e32 v2, vcc, v4, v2
930 ; GCN-IR-NEXT: v_bfe_i32 v2, v2, 0, 24
931 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
932 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v3, 31, v2
933 ; GCN-IR-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
934 ; GCN-IR-NEXT: s_endpgm
978 ; GCN-IR-LABEL: s_test_sdiv24_48:
979 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
980 ; GCN-IR-NEXT: s_load_dword s3, s[0:1], 0xc
981 ; GCN-IR-NEXT: s_load_dword s5, s[0:1], 0xe
982 ; GCN-IR-NEXT: s_load_dword s2, s[0:1], 0xb
983 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xd
984 ; GCN-IR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
985 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
986 ; GCN-IR-NEXT: s_sext_i32_i16 s3, s3
987 ; GCN-IR-NEXT: s_sext_i32_i16 s5, s5
988 ; GCN-IR-NEXT: s_ashr_i64 s[6:7], s[2:3], 24
989 ; GCN-IR-NEXT: s_ashr_i32 s2, s3, 31
990 ; GCN-IR-NEXT: s_mov_b32 s3, s2
991 ; GCN-IR-NEXT: s_ashr_i64 s[8:9], s[4:5], 24
992 ; GCN-IR-NEXT: s_ashr_i32 s4, s5, 31
993 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[2:3], s[6:7]
994 ; GCN-IR-NEXT: s_mov_b32 s5, s4
995 ; GCN-IR-NEXT: s_sub_u32 s12, s6, s2
996 ; GCN-IR-NEXT: s_subb_u32 s13, s7, s2
997 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], s[8:9]
998 ; GCN-IR-NEXT: s_sub_u32 s6, s6, s4
999 ; GCN-IR-NEXT: s_subb_u32 s7, s7, s4
1000 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[10:11], s[6:7], 0
1001 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[14:15], s[12:13], 0
1002 ; GCN-IR-NEXT: s_mov_b64 s[8:9], 0
1003 ; GCN-IR-NEXT: s_or_b64 s[16:17], s[10:11], s[14:15]
1004 ; GCN-IR-NEXT: s_flbit_i32_b32 s10, s6
1005 ; GCN-IR-NEXT: s_add_i32 s10, s10, 32
1006 ; GCN-IR-NEXT: s_flbit_i32_b32 s11, s7
1007 ; GCN-IR-NEXT: s_min_u32 s14, s10, s11
1008 ; GCN-IR-NEXT: s_flbit_i32_b32 s10, s12
1009 ; GCN-IR-NEXT: s_add_i32 s10, s10, 32
1010 ; GCN-IR-NEXT: s_flbit_i32_b32 s11, s13
1011 ; GCN-IR-NEXT: s_min_u32 s18, s10, s11
1012 ; GCN-IR-NEXT: s_sub_u32 s10, s14, s18
1013 ; GCN-IR-NEXT: s_subb_u32 s11, 0, 0
1014 ; GCN-IR-NEXT: v_cmp_gt_u64_e64 s[20:21], s[10:11], 63
1015 ; GCN-IR-NEXT: s_mov_b32 s15, 0
1016 ; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[20:21]
1017 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[20:21], s[10:11], 63
1018 ; GCN-IR-NEXT: s_xor_b64 s[22:23], s[16:17], -1
1019 ; GCN-IR-NEXT: s_and_b64 s[20:21], s[22:23], s[20:21]
1020 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[20:21]
1021 ; GCN-IR-NEXT: s_cbranch_vccz .LBB9_5
1022 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1023 ; GCN-IR-NEXT: s_add_u32 s16, s10, 1
1024 ; GCN-IR-NEXT: s_addc_u32 s17, s11, 0
1025 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[20:21], s[16:17], 0
1026 ; GCN-IR-NEXT: s_sub_i32 s10, 63, s10
1027 ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, s[20:21]
1028 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[12:13], s10
1029 ; GCN-IR-NEXT: s_cbranch_vccz .LBB9_4
1030 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1031 ; GCN-IR-NEXT: s_lshr_b64 s[16:17], s[12:13], s16
1032 ; GCN-IR-NEXT: s_add_u32 s19, s6, -1
1033 ; GCN-IR-NEXT: s_addc_u32 s20, s7, -1
1034 ; GCN-IR-NEXT: s_not_b64 s[8:9], s[14:15]
1035 ; GCN-IR-NEXT: s_add_u32 s12, s8, s18
1036 ; GCN-IR-NEXT: s_addc_u32 s13, s9, 0
1037 ; GCN-IR-NEXT: s_mov_b64 s[14:15], 0
1038 ; GCN-IR-NEXT: s_mov_b32 s9, 0
1039 ; GCN-IR-NEXT: .LBB9_3: ; %udiv-do-while
1040 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1041 ; GCN-IR-NEXT: s_lshl_b64 s[16:17], s[16:17], 1
1042 ; GCN-IR-NEXT: s_lshr_b32 s8, s11, 31
1043 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[10:11], 1
1044 ; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[8:9]
1045 ; GCN-IR-NEXT: s_or_b64 s[10:11], s[14:15], s[10:11]
1046 ; GCN-IR-NEXT: s_sub_u32 s8, s19, s16
1047 ; GCN-IR-NEXT: s_subb_u32 s8, s20, s17
1048 ; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31
1049 ; GCN-IR-NEXT: s_mov_b32 s15, s14
1050 ; GCN-IR-NEXT: s_and_b32 s8, s14, 1
1051 ; GCN-IR-NEXT: s_and_b64 s[14:15], s[14:15], s[6:7]
1052 ; GCN-IR-NEXT: s_sub_u32 s16, s16, s14
1053 ; GCN-IR-NEXT: s_subb_u32 s17, s17, s15
1054 ; GCN-IR-NEXT: s_add_u32 s12, s12, 1
1055 ; GCN-IR-NEXT: s_addc_u32 s13, s13, 0
1056 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[22:23], s[12:13], 0
1057 ; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9]
1058 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[22:23]
1059 ; GCN-IR-NEXT: s_cbranch_vccz .LBB9_3
1060 ; GCN-IR-NEXT: .LBB9_4: ; %Flow3
1061 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[10:11], 1
1062 ; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7]
1063 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
1064 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
1065 ; GCN-IR-NEXT: s_branch .LBB9_6
1066 ; GCN-IR-NEXT: .LBB9_5:
1067 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s13
1068 ; GCN-IR-NEXT: v_cndmask_b32_e64 v1, v0, 0, s[16:17]
1069 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
1070 ; GCN-IR-NEXT: v_cndmask_b32_e64 v0, v0, 0, s[16:17]
1071 ; GCN-IR-NEXT: .LBB9_6: ; %udiv-end
1072 ; GCN-IR-NEXT: s_xor_b64 s[2:3], s[4:5], s[2:3]
1073 ; GCN-IR-NEXT: v_xor_b32_e32 v0, s2, v0
1074 ; GCN-IR-NEXT: v_xor_b32_e32 v1, s3, v1
1075 ; GCN-IR-NEXT: v_mov_b32_e32 v2, s3
1076 ; GCN-IR-NEXT: v_subrev_i32_e32 v0, vcc, s2, v0
1077 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc
1078 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
1079 ; GCN-IR-NEXT: s_mov_b32 s2, -1
1080 ; GCN-IR-NEXT: buffer_store_short v1, off, s[0:3], 0 offset:4
1081 ; GCN-IR-NEXT: buffer_store_dword v0, off, s[0:3], 0
1082 ; GCN-IR-NEXT: s_endpgm
1206 ; GCN-IR-LABEL: s_test_sdiv_k_num_i64:
1207 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1208 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1209 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
1210 ; GCN-IR-NEXT: s_ashr_i32 s4, s3, 31
1211 ; GCN-IR-NEXT: s_mov_b32 s5, s4
1212 ; GCN-IR-NEXT: s_xor_b64 s[2:3], s[4:5], s[2:3]
1213 ; GCN-IR-NEXT: s_sub_u32 s2, s2, s4
1214 ; GCN-IR-NEXT: s_subb_u32 s3, s3, s4
1215 ; GCN-IR-NEXT: s_flbit_i32_b32 s6, s2
1216 ; GCN-IR-NEXT: s_add_i32 s6, s6, 32
1217 ; GCN-IR-NEXT: s_flbit_i32_b32 s7, s3
1218 ; GCN-IR-NEXT: s_min_u32 s10, s6, s7
1219 ; GCN-IR-NEXT: s_add_u32 s8, s10, 0xffffffc5
1220 ; GCN-IR-NEXT: s_addc_u32 s9, 0, -1
1221 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[12:13], s[2:3], 0
1222 ; GCN-IR-NEXT: v_cmp_gt_u64_e64 s[14:15], s[8:9], 63
1223 ; GCN-IR-NEXT: s_mov_b64 s[6:7], 0
1224 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[14:15]
1225 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[14:15], s[8:9], 63
1226 ; GCN-IR-NEXT: s_xor_b64 s[16:17], s[12:13], -1
1227 ; GCN-IR-NEXT: s_and_b64 s[14:15], s[16:17], s[14:15]
1228 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[14:15]
1229 ; GCN-IR-NEXT: s_cbranch_vccz .LBB10_5
1230 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1231 ; GCN-IR-NEXT: s_add_u32 s12, s8, 1
1232 ; GCN-IR-NEXT: s_addc_u32 s13, s9, 0
1233 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[14:15], s[12:13], 0
1234 ; GCN-IR-NEXT: s_sub_i32 s8, 63, s8
1235 ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, s[14:15]
1236 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], 24, s8
1237 ; GCN-IR-NEXT: s_cbranch_vccz .LBB10_4
1238 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1239 ; GCN-IR-NEXT: s_lshr_b64 s[12:13], 24, s12
1240 ; GCN-IR-NEXT: s_add_u32 s16, s2, -1
1241 ; GCN-IR-NEXT: s_addc_u32 s17, s3, -1
1242 ; GCN-IR-NEXT: s_sub_u32 s10, 58, s10
1243 ; GCN-IR-NEXT: s_subb_u32 s11, 0, 0
1244 ; GCN-IR-NEXT: s_mov_b64 s[14:15], 0
1245 ; GCN-IR-NEXT: s_mov_b32 s7, 0
1246 ; GCN-IR-NEXT: .LBB10_3: ; %udiv-do-while
1247 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1248 ; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[12:13], 1
1249 ; GCN-IR-NEXT: s_lshr_b32 s6, s9, 31
1250 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[8:9], 1
1251 ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[6:7]
1252 ; GCN-IR-NEXT: s_or_b64 s[8:9], s[14:15], s[8:9]
1253 ; GCN-IR-NEXT: s_sub_u32 s6, s16, s12
1254 ; GCN-IR-NEXT: s_subb_u32 s6, s17, s13
1255 ; GCN-IR-NEXT: s_ashr_i32 s14, s6, 31
1256 ; GCN-IR-NEXT: s_mov_b32 s15, s14
1257 ; GCN-IR-NEXT: s_and_b32 s6, s14, 1
1258 ; GCN-IR-NEXT: s_and_b64 s[14:15], s[14:15], s[2:3]
1259 ; GCN-IR-NEXT: s_sub_u32 s12, s12, s14
1260 ; GCN-IR-NEXT: s_subb_u32 s13, s13, s15
1261 ; GCN-IR-NEXT: s_add_u32 s10, s10, 1
1262 ; GCN-IR-NEXT: s_addc_u32 s11, s11, 0
1263 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[18:19], s[10:11], 0
1264 ; GCN-IR-NEXT: s_mov_b64 s[14:15], s[6:7]
1265 ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[18:19]
1266 ; GCN-IR-NEXT: s_cbranch_vccz .LBB10_3
1267 ; GCN-IR-NEXT: .LBB10_4: ; %Flow5
1268 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[8:9], 1
1269 ; GCN-IR-NEXT: s_or_b64 s[2:3], s[6:7], s[2:3]
1270 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
1271 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s3
1272 ; GCN-IR-NEXT: s_branch .LBB10_6
1273 ; GCN-IR-NEXT: .LBB10_5:
1274 ; GCN-IR-NEXT: v_mov_b32_e32 v1, 0
1275 ; GCN-IR-NEXT: v_cndmask_b32_e64 v0, 24, 0, s[12:13]
1276 ; GCN-IR-NEXT: .LBB10_6: ; %udiv-end
1277 ; GCN-IR-NEXT: v_xor_b32_e32 v0, s4, v0
1278 ; GCN-IR-NEXT: v_xor_b32_e32 v1, s5, v1
1279 ; GCN-IR-NEXT: v_mov_b32_e32 v2, s5
1280 ; GCN-IR-NEXT: v_subrev_i32_e32 v0, vcc, s4, v0
1281 ; GCN-IR-NEXT: s_mov_b32 s3, 0xf000
1282 ; GCN-IR-NEXT: s_mov_b32 s2, -1
1283 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc
1284 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1285 ; GCN-IR-NEXT: s_endpgm
1399 ; GCN-IR-LABEL: v_test_sdiv_k_num_i64:
1400 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1401 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1402 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v2, 31, v1
1403 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v2, v0
1404 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v2, v1
1405 ; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
1406 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc
1407 ; GCN-IR-NEXT: v_ffbh_u32_e32 v4, v0
1408 ; GCN-IR-NEXT: v_add_i32_e32 v4, vcc, 32, v4
1409 ; GCN-IR-NEXT: v_ffbh_u32_e32 v5, v1
1410 ; GCN-IR-NEXT: v_min_u32_e32 v8, v4, v5
1411 ; GCN-IR-NEXT: s_movk_i32 s6, 0xffc5
1412 ; GCN-IR-NEXT: v_add_i32_e32 v5, vcc, s6, v8
1413 ; GCN-IR-NEXT: v_addc_u32_e64 v6, s[6:7], 0, -1, vcc
1414 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1]
1415 ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, 63, v[5:6]
1416 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[6:7], 63, v[5:6]
1417 ; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], vcc
1418 ; GCN-IR-NEXT: v_cndmask_b32_e64 v7, 24, 0, s[4:5]
1419 ; GCN-IR-NEXT: s_xor_b64 s[4:5], s[4:5], -1
1420 ; GCN-IR-NEXT: v_mov_b32_e32 v3, v2
1421 ; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
1422 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[4:5], s[6:7]
1423 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
1424 ; GCN-IR-NEXT: s_cbranch_execz .LBB11_6
1425 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1426 ; GCN-IR-NEXT: v_add_i32_e32 v9, vcc, 1, v5
1427 ; GCN-IR-NEXT: v_addc_u32_e32 v10, vcc, 0, v6, vcc
1428 ; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 63, v5
1429 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[9:10]
1430 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], 24, v4
1431 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
1432 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
1433 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
1434 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
1435 ; GCN-IR-NEXT: s_cbranch_execz .LBB11_5
1436 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1437 ; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v0
1438 ; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v1, vcc
1439 ; GCN-IR-NEXT: v_lshr_b64 v[10:11], 24, v9
1440 ; GCN-IR-NEXT: v_sub_i32_e32 v8, vcc, 58, v8
1441 ; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
1442 ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], 0, 0, vcc
1443 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
1444 ; GCN-IR-NEXT: v_mov_b32_e32 v13, 0
1445 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
1446 ; GCN-IR-NEXT: .LBB11_3: ; %udiv-do-while
1447 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1448 ; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1
1449 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
1450 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6
1451 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
1452 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10
1453 ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc
1454 ; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4
1455 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6
1456 ; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, 1, v8
1457 ; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5
1458 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12
1459 ; GCN-IR-NEXT: v_and_b32_e32 v13, v12, v1
1460 ; GCN-IR-NEXT: v_and_b32_e32 v12, v12, v0
1461 ; GCN-IR-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc
1462 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9]
1463 ; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v12
1464 ; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v13, s[4:5]
1465 ; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
1466 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
1467 ; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
1468 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
1469 ; GCN-IR-NEXT: s_cbranch_execnz .LBB11_3
1470 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
1471 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
1472 ; GCN-IR-NEXT: .LBB11_5: ; %Flow3
1473 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
1474 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1
1475 ; GCN-IR-NEXT: v_or_b32_e32 v4, v7, v1
1476 ; GCN-IR-NEXT: v_or_b32_e32 v7, v6, v0
1477 ; GCN-IR-NEXT: .LBB11_6: ; %Flow4
1478 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
1479 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v7, v2
1480 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v4, v3
1481 ; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
1482 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
1483 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1592 ; GCN-IR-LABEL: v_test_sdiv_pow2_k_num_i64:
1593 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1594 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1595 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v2, 31, v1
1596 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v2, v0
1597 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v2, v1
1598 ; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
1599 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc
1600 ; GCN-IR-NEXT: v_ffbh_u32_e32 v4, v0
1601 ; GCN-IR-NEXT: v_add_i32_e32 v4, vcc, 32, v4
1602 ; GCN-IR-NEXT: v_ffbh_u32_e32 v5, v1
1603 ; GCN-IR-NEXT: v_min_u32_e32 v8, v4, v5
1604 ; GCN-IR-NEXT: s_movk_i32 s6, 0xffd0
1605 ; GCN-IR-NEXT: v_add_i32_e32 v5, vcc, s6, v8
1606 ; GCN-IR-NEXT: v_addc_u32_e64 v6, s[6:7], 0, -1, vcc
1607 ; GCN-IR-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[0:1]
1608 ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, 63, v[5:6]
1609 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0x8000
1610 ; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], vcc
1611 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[5:6]
1612 ; GCN-IR-NEXT: v_cndmask_b32_e64 v7, v7, 0, s[4:5]
1613 ; GCN-IR-NEXT: s_xor_b64 s[4:5], s[4:5], -1
1614 ; GCN-IR-NEXT: v_mov_b32_e32 v3, v2
1615 ; GCN-IR-NEXT: v_mov_b32_e32 v4, 0
1616 ; GCN-IR-NEXT: s_mov_b64 s[8:9], 0x8000
1617 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[4:5], vcc
1618 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
1619 ; GCN-IR-NEXT: s_cbranch_execz .LBB12_6
1620 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1621 ; GCN-IR-NEXT: v_add_i32_e32 v9, vcc, 1, v5
1622 ; GCN-IR-NEXT: v_addc_u32_e32 v10, vcc, 0, v6, vcc
1623 ; GCN-IR-NEXT: v_sub_i32_e64 v4, s[4:5], 63, v5
1624 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[9:10]
1625 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], s[8:9], v4
1626 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
1627 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
1628 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
1629 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
1630 ; GCN-IR-NEXT: s_cbranch_execz .LBB12_5
1631 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1632 ; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v0
1633 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000
1634 ; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v1, vcc
1635 ; GCN-IR-NEXT: v_lshr_b64 v[10:11], s[4:5], v9
1636 ; GCN-IR-NEXT: v_sub_i32_e32 v8, vcc, 47, v8
1637 ; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
1638 ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], 0, 0, vcc
1639 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
1640 ; GCN-IR-NEXT: v_mov_b32_e32 v13, 0
1641 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
1642 ; GCN-IR-NEXT: .LBB12_3: ; %udiv-do-while
1643 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1644 ; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1
1645 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
1646 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6
1647 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
1648 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10
1649 ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc
1650 ; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4
1651 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6
1652 ; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, 1, v8
1653 ; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5
1654 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12
1655 ; GCN-IR-NEXT: v_and_b32_e32 v13, v12, v1
1656 ; GCN-IR-NEXT: v_and_b32_e32 v12, v12, v0
1657 ; GCN-IR-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc
1658 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9]
1659 ; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v12
1660 ; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v13, s[4:5]
1661 ; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
1662 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
1663 ; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
1664 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
1665 ; GCN-IR-NEXT: s_cbranch_execnz .LBB12_3
1666 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
1667 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
1668 ; GCN-IR-NEXT: .LBB12_5: ; %Flow3
1669 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
1670 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1
1671 ; GCN-IR-NEXT: v_or_b32_e32 v4, v7, v1
1672 ; GCN-IR-NEXT: v_or_b32_e32 v7, v6, v0
1673 ; GCN-IR-NEXT: .LBB12_6: ; %Flow4
1674 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
1675 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v7, v2
1676 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v4, v3
1677 ; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
1678 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
1679 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1695 ; GCN-IR-LABEL: v_test_sdiv_pow2_k_den_i64:
1696 ; GCN-IR: ; %bb.0: ; %_udiv-special-cases
1697 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1698 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v2, 31, v1
1699 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v2, v0
1700 ; GCN-IR-NEXT: v_xor_b32_e32 v1, v2, v1
1701 ; GCN-IR-NEXT: v_sub_i32_e32 v7, vcc, v0, v2
1702 ; GCN-IR-NEXT: v_subb_u32_e32 v8, vcc, v1, v2, vcc
1703 ; GCN-IR-NEXT: v_ffbh_u32_e32 v0, v7
1704 ; GCN-IR-NEXT: v_add_i32_e64 v0, s[4:5], 32, v0
1705 ; GCN-IR-NEXT: v_ffbh_u32_e32 v1, v8
1706 ; GCN-IR-NEXT: v_min_u32_e32 v0, v0, v1
1707 ; GCN-IR-NEXT: v_sub_i32_e64 v3, s[4:5], 48, v0
1708 ; GCN-IR-NEXT: v_subb_u32_e64 v4, s[4:5], 0, 0, s[4:5]
1709 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[7:8]
1710 ; GCN-IR-NEXT: v_cmp_lt_u64_e64 s[4:5], 63, v[3:4]
1711 ; GCN-IR-NEXT: v_mov_b32_e32 v1, v2
1712 ; GCN-IR-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
1713 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 63, v[3:4]
1714 ; GCN-IR-NEXT: s_xor_b64 s[6:7], s[4:5], -1
1715 ; GCN-IR-NEXT: v_cndmask_b32_e64 v6, v8, 0, s[4:5]
1716 ; GCN-IR-NEXT: v_cndmask_b32_e64 v5, v7, 0, s[4:5]
1717 ; GCN-IR-NEXT: s_and_b64 s[4:5], s[6:7], vcc
1718 ; GCN-IR-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
1719 ; GCN-IR-NEXT: s_cbranch_execz .LBB13_6
1720 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
1721 ; GCN-IR-NEXT: v_add_i32_e32 v9, vcc, 1, v3
1722 ; GCN-IR-NEXT: v_addc_u32_e32 v10, vcc, 0, v4, vcc
1723 ; GCN-IR-NEXT: v_sub_i32_e64 v3, s[4:5], 63, v3
1724 ; GCN-IR-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[9:10]
1725 ; GCN-IR-NEXT: v_lshl_b64 v[3:4], v[7:8], v3
1726 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
1727 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
1728 ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
1729 ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
1730 ; GCN-IR-NEXT: s_cbranch_execz .LBB13_5
1731 ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
1732 ; GCN-IR-NEXT: v_lshr_b64 v[9:10], v[7:8], v9
1733 ; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 0xffffffcf, v0
1734 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
1735 ; GCN-IR-NEXT: v_addc_u32_e64 v8, s[4:5], 0, -1, vcc
1736 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
1737 ; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
1738 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
1739 ; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff
1740 ; GCN-IR-NEXT: .LBB13_3: ; %udiv-do-while
1741 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
1742 ; GCN-IR-NEXT: v_lshl_b64 v[9:10], v[9:10], 1
1743 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 31, v4
1744 ; GCN-IR-NEXT: v_or_b32_e32 v0, v9, v0
1745 ; GCN-IR-NEXT: v_sub_i32_e32 v5, vcc, s12, v0
1746 ; GCN-IR-NEXT: v_subb_u32_e32 v5, vcc, 0, v10, vcc
1747 ; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 1, v7
1748 ; GCN-IR-NEXT: v_lshl_b64 v[3:4], v[3:4], 1
1749 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v9, 31, v5
1750 ; GCN-IR-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc
1751 ; GCN-IR-NEXT: v_and_b32_e32 v5, 1, v9
1752 ; GCN-IR-NEXT: v_and_b32_e32 v9, 0x8000, v9
1753 ; GCN-IR-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[7:8]
1754 ; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4
1755 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
1756 ; GCN-IR-NEXT: v_sub_i32_e64 v9, s[4:5], v0, v9
1757 ; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
1758 ; GCN-IR-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v10, s[4:5]
1759 ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
1760 ; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
1761 ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
1762 ; GCN-IR-NEXT: s_cbranch_execnz .LBB13_3
1763 ; GCN-IR-NEXT: ; %bb.4: ; %Flow
1764 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
1765 ; GCN-IR-NEXT: .LBB13_5: ; %Flow3
1766 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
1767 ; GCN-IR-NEXT: v_lshl_b64 v[3:4], v[3:4], 1
1768 ; GCN-IR-NEXT: v_or_b32_e32 v6, v6, v4
1769 ; GCN-IR-NEXT: v_or_b32_e32 v5, v5, v3
1770 ; GCN-IR-NEXT: .LBB13_6: ; %Flow4
1771 ; GCN-IR-NEXT: s_or_b64 exec, exec, s[6:7]
1772 ; GCN-IR-NEXT: v_xor_b32_e32 v0, v5, v2
1773 ; GCN-IR-NEXT: v_xor_b32_e32 v3, v6, v1
1774 ; GCN-IR-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
1775 ; GCN-IR-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc
1776 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1809 ; GCN-IR-LABEL: s_test_sdiv24_k_num_i64:
1810 ; GCN-IR: ; %bb.0:
1811 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1812 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
1813 ; GCN-IR-NEXT: s_mov_b32 s6, -1
1814 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
1815 ; GCN-IR-NEXT: s_ashr_i64 s[2:3], s[2:3], 40
1816 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s2
1817 ; GCN-IR-NEXT: s_mov_b32 s3, 0x41c00000
1818 ; GCN-IR-NEXT: s_mov_b32 s4, s0
1819 ; GCN-IR-NEXT: s_ashr_i32 s0, s2, 30
1820 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v1, v0
1821 ; GCN-IR-NEXT: s_or_b32 s0, s0, 1
1822 ; GCN-IR-NEXT: v_mov_b32_e32 v3, s0
1823 ; GCN-IR-NEXT: s_mov_b32 s5, s1
1824 ; GCN-IR-NEXT: v_mul_f32_e32 v1, 0x41c00000, v1
1825 ; GCN-IR-NEXT: v_trunc_f32_e32 v1, v1
1826 ; GCN-IR-NEXT: v_mad_f32 v2, -v1, v0, s3
1827 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v1, v1
1828 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, |v0|
1829 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
1830 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v1, v0
1831 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 24
1832 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1833 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
1834 ; GCN-IR-NEXT: s_endpgm
1868 ; GCN-IR-LABEL: s_test_sdiv24_k_den_i64:
1869 ; GCN-IR: ; %bb.0:
1870 ; GCN-IR-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1871 ; GCN-IR-NEXT: s_mov_b32 s8, 0x46b6fe00
1872 ; GCN-IR-NEXT: s_mov_b32 s7, 0xf000
1873 ; GCN-IR-NEXT: s_mov_b32 s6, -1
1874 ; GCN-IR-NEXT: s_waitcnt lgkmcnt(0)
1875 ; GCN-IR-NEXT: s_ashr_i64 s[2:3], s[2:3], 40
1876 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v0, s2
1877 ; GCN-IR-NEXT: s_mov_b32 s4, s0
1878 ; GCN-IR-NEXT: s_ashr_i32 s0, s2, 30
1879 ; GCN-IR-NEXT: s_or_b32 s0, s0, 1
1880 ; GCN-IR-NEXT: v_mul_f32_e32 v1, 0x38331158, v0
1881 ; GCN-IR-NEXT: v_trunc_f32_e32 v1, v1
1882 ; GCN-IR-NEXT: v_mad_f32 v0, -v1, s8, v0
1883 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v1, v1
1884 ; GCN-IR-NEXT: v_mov_b32_e32 v2, s0
1885 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, s8
1886 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
1887 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v1
1888 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 24
1889 ; GCN-IR-NEXT: s_mov_b32 s5, s1
1890 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1891 ; GCN-IR-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
1892 ; GCN-IR-NEXT: s_endpgm
1920 ; GCN-IR-LABEL: v_test_sdiv24_k_num_i64:
1921 ; GCN-IR: ; %bb.0:
1922 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1923 ; GCN-IR-NEXT: v_ashr_i64 v[0:1], v[0:1], 40
1924 ; GCN-IR-NEXT: s_mov_b32 s4, 0x41c00000
1925 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, v0
1926 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1927 ; GCN-IR-NEXT: v_or_b32_e32 v0, 1, v0
1928 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v1
1929 ; GCN-IR-NEXT: v_mul_f32_e32 v2, 0x41c00000, v2
1930 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
1931 ; GCN-IR-NEXT: v_mad_f32 v3, -v2, v1, s4
1932 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
1933 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1934 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1935 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v2, v0
1936 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 24
1937 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1938 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
1965 ; GCN-IR-LABEL: v_test_sdiv24_pow2_k_num_i64:
1966 ; GCN-IR: ; %bb.0:
1967 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1968 ; GCN-IR-NEXT: v_ashr_i64 v[0:1], v[0:1], 40
1969 ; GCN-IR-NEXT: s_mov_b32 s4, 0x47000000
1970 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, v0
1971 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1972 ; GCN-IR-NEXT: v_or_b32_e32 v0, 1, v0
1973 ; GCN-IR-NEXT: v_rcp_iflag_f32_e32 v2, v1
1974 ; GCN-IR-NEXT: v_mul_f32_e32 v2, 0x47000000, v2
1975 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
1976 ; GCN-IR-NEXT: v_mad_f32 v3, -v2, v1, s4
1977 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
1978 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1979 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1980 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v2, v0
1981 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 24
1982 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1983 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]
2000 ; GCN-IR-LABEL: v_test_sdiv24_pow2_k_den_i64:
2001 ; GCN-IR: ; %bb.0:
2002 ; GCN-IR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2003 ; GCN-IR-NEXT: v_ashr_i64 v[0:1], v[0:1], 40
2004 ; GCN-IR-NEXT: s_mov_b32 s4, 0x47000000
2005 ; GCN-IR-NEXT: v_cvt_f32_i32_e32 v1, v0
2006 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v0, 30, v0
2007 ; GCN-IR-NEXT: v_or_b32_e32 v0, 1, v0
2008 ; GCN-IR-NEXT: v_mul_f32_e32 v2, 0x38000000, v1
2009 ; GCN-IR-NEXT: v_trunc_f32_e32 v2, v2
2010 ; GCN-IR-NEXT: v_mad_f32 v1, -v2, s4, v1
2011 ; GCN-IR-NEXT: v_cvt_i32_f32_e32 v2, v2
2012 ; GCN-IR-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, s4
2013 ; GCN-IR-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
2014 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v2, v0
2015 ; GCN-IR-NEXT: v_bfe_i32 v0, v0, 0, 24
2016 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v1, 31, v0
2017 ; GCN-IR-NEXT: s_setpc_b64 s[30:31]