Lines Matching refs:pk

5 declare <2 x float> @llvm.amdgcn.cvt.pk.f32.bf8(i32, i1)
6 declare <2 x float> @llvm.amdgcn.cvt.pk.f32.fp8(i32, i1)
7 declare i32 @llvm.amdgcn.cvt.pk.bf8.f32(float, float, i32, i1)
8 declare i32 @llvm.amdgcn.cvt.pk.fp8.f32(float, float, i32, i1)
71   %ret = tail call <2 x float> @llvm.amdgcn.cvt.pk.f32.bf8(i32 %a, i1 false)
78   %ret = tail call <2 x float> @llvm.amdgcn.cvt.pk.f32.bf8(i32 %a, i1 true)
85   %ret = tail call <2 x float> @llvm.amdgcn.cvt.pk.f32.fp8(i32 %a, i1 false)
92   %ret = tail call <2 x float> @llvm.amdgcn.cvt.pk.f32.fp8(i32 %a, i1 true)
100   %ret = tail call i32 @llvm.amdgcn.cvt.pk.bf8.f32(float %x, float %y, i32 %old, i1 false)
108   %ret = tail call i32 @llvm.amdgcn.cvt.pk.bf8.f32(float %x, float %y, i32 %old, i1 true)
116   %ret = tail call i32 @llvm.amdgcn.cvt.pk.fp8.f32(float %x, float %y, i32 %old, i1 false)
124   %ret = tail call i32 @llvm.amdgcn.cvt.pk.fp8.f32(float %x, float %y, i32 %old, i1 true)