Lines Matching refs:fp8

4 declare float @llvm.amdgcn.cvt.f32.fp8(i32, i32)
6 declare <2 x float> @llvm.amdgcn.cvt.pk.f32.fp8(i32, i1)
8 declare i32 @llvm.amdgcn.cvt.pk.fp8.f32(float, float, i32, i1)
10 declare i32 @llvm.amdgcn.cvt.sr.fp8.f32(float, i32, i32, i32)
43   %ret = tail call float @llvm.amdgcn.cvt.f32.fp8(i32 %a, i32 0)
50   %ret = tail call float @llvm.amdgcn.cvt.f32.fp8(i32 %a, i32 1)
57   %ret = tail call float @llvm.amdgcn.cvt.f32.fp8(i32 %a, i32 2)
64   %ret = tail call float @llvm.amdgcn.cvt.f32.fp8(i32 %a, i32 3)
85   %ret = tail call <2 x float> @llvm.amdgcn.cvt.pk.f32.fp8(i32 %a, i1 false)
92   %ret = tail call <2 x float> @llvm.amdgcn.cvt.pk.f32.fp8(i32 %a, i1 true)
116   %ret = tail call i32 @llvm.amdgcn.cvt.pk.fp8.f32(float %x, float %y, i32 %old, i1 false)
124   %ret = tail call i32 @llvm.amdgcn.cvt.pk.fp8.f32(float %x, float %y, i32 %old, i1 true)
164   %ret = tail call i32 @llvm.amdgcn.cvt.sr.fp8.f32(float %x, i32 %r, i32 %old, i32 0)
172   %ret = tail call i32 @llvm.amdgcn.cvt.sr.fp8.f32(float %x, i32 %r, i32 %old, i32 1)
180   %ret = tail call i32 @llvm.amdgcn.cvt.sr.fp8.f32(float %x, i32 %r, i32 %old, i32 2)
188   %ret = tail call i32 @llvm.amdgcn.cvt.sr.fp8.f32(float %x, i32 %r, i32 %old, i32 3)