llvm.amdgcn.class.ll - OpenGrok cross reference for /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll

Lines Matching refs:SI
1 …s=false  -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=SI %s
9 ; SI-LABEL: {{^}}test_class_f32:
10 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
11 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
12 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
13 ; SI: v_cmp_class_f32_e32 vcc, [[SA]], [[VB]]
14 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
15 ; SI-NEXT: buffer_store_dword [[RESULT]]
16 ; SI: s_endpgm
24 ; SI-LABEL: {{^}}test_class_fabs_f32:
25 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
26 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
27 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
28 ; SI: v_cmp_class_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], |[[SA]]|, [[VB]]
29 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
30 ; SI-NEXT: buffer_store_dword [[RESULT]]
31 ; SI: s_endpgm
40 ; SI-LABEL: {{^}}test_class_fneg_f32:
41 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
42 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
43 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
44 ; SI: v_cmp_class_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], -[[SA]], [[VB]]
45 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
46 ; SI-NEXT: buffer_store_dword [[RESULT]]
47 ; SI: s_endpgm
56 ; SI-LABEL: {{^}}test_class_fneg_fabs_f32:
57 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
58 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
59 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
60 ; SI: v_cmp_class_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], -|[[SA]]|, [[VB]]
61 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
62 ; SI-NEXT: buffer_store_dword [[RESULT]]
63 ; SI: s_endpgm
73 ; SI-LABEL: {{^}}test_class_1_f32:
74 ; SI: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
75 ; SI: v_cmp_class_f32_e64 [[COND:s\[[0-9]+:[0-9]+\]]], [[SA]], 1{{$}}
76 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[COND]]
77 ; SI-NEXT: buffer_store_dword [[RESULT]]
78 ; SI: s_endpgm
86 ; SI-LABEL: {{^}}test_class_64_f32:
87 ; SI: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
88 ; SI: v_cmp_class_f32_e64 [[COND:s\[[0-9]+:[0-9]+\]]], [[SA]], 64{{$}}
89 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[COND]]
90 ; SI-NEXT: buffer_store_dword [[RESULT]]
91 ; SI: s_endpgm
100 ; SI-LABEL: {{^}}test_class_full_mask_f32:
101 ; SI: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
102 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x3ff{{$}}
103 ; SI: v_cmp_class_f32_e32 vcc, [[SA]], [[MASK]]
104 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
105 ; SI-NEXT: buffer_store_dword [[RESULT]]
106 ; SI: s_endpgm
114 ; SI-LABEL: {{^}}test_class_9bit_mask_f32:
115 ; SI: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
116 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x1ff{{$}}
117 ; SI: v_cmp_class_f32_e32 vcc, [[SA]], [[MASK]]
118 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
119 ; SI-NEXT: buffer_store_dword [[RESULT]]
120 ; SI: s_endpgm
128 ; SI-LABEL: {{^}}v_test_class_full_mask_f32:
129 ; SI-DAG: buffer_load_dword [[VA:v[0-9]+]]
130 ; SI-DAG: s_movk_i32 [[MASK:s[0-9]+]], 0x1ff{{$}}
131 ; SI: v_cmp_class_f32_e64 s[{{[0-9]}}:{{[0-9]}}], [[VA]], [[MASK]]
132 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, s[{{[0-9]}}:{{[0-9]}}]
133 ; SI: buffer_store_dword [[RESULT]]
134 ; SI: s_endpgm
147 ; SI-LABEL: {{^}}test_class_inline_imm_constant_dynamic_mask_f32:
148 ; SI-DAG: buffer_load_dword [[VB:v[0-9]+]]
149 ; SI: v_cmp_class_f32_e32 vcc, 1.0, [[VB]]
150 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
151 ; SI: buffer_store_dword [[RESULT]]
152 ; SI: s_endpgm
166 ; SI-LABEL: {{^}}test_class_lit_constant_dynamic_mask_f32:
167 ; SI-DAG: buffer_load_dword [[VB:v[0-9]+]]
168 ; SI-DAG: s_mov_b32 [[VK:s[0-9]+]], 0x44800000
169 ; SI: v_cmp_class_f32_e32 vcc, [[VK]], [[VB]]
170 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
171 ; SI: buffer_store_dword [[RESULT]]
172 ; SI: s_endpgm
185 ; SI-LABEL: {{^}}test_class_f64:
186 ; SI-DAG: s_load_dwordx2 [[SA:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
187 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1d
188 ; SI-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
189 ; SI: v_cmp_class_f64_e32 vcc, [[SA]], [[VB]]
190 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
191 ; SI-NEXT: buffer_store_dword [[RESULT]]
192 ; SI: s_endpgm
200 ; SI-LABEL: {{^}}test_class_fabs_f64:
201 ; SI-DAG: s_load_dwordx2 [[SA:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
202 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1d
203 ; SI-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
204 ; SI: v_cmp_class_f64_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], |[[SA]]|, [[VB]]
205 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
206 ; SI-NEXT: buffer_store_dword [[RESULT]]
207 ; SI: s_endpgm
216 ; SI-LABEL: {{^}}test_class_fneg_f64:
217 ; SI-DAG: s_load_dwordx2 [[SA:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
218 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1d
219 ; SI-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
220 ; SI: v_cmp_class_f64_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], -[[SA]], [[VB]]
221 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
222 ; SI-NEXT: buffer_store_dword [[RESULT]]
223 ; SI: s_endpgm
232 ; SI-LABEL: {{^}}test_class_fneg_fabs_f64:
233 ; SI-DAG: s_load_dwordx2 [[SA:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
234 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1d
235 ; SI-DAG: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]]
236 ; SI: v_cmp_class_f64_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], -|[[SA]]|, [[VB]]
237 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
238 ; SI-NEXT: buffer_store_dword [[RESULT]]
239 ; SI: s_endpgm
249 ; SI-LABEL: {{^}}test_class_1_f64:
250 ; SI: v_cmp_class_f64_e64 {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 1{{$}}
251 ; SI: s_endpgm
259 ; SI-LABEL: {{^}}test_class_64_f64:
260 ; SI: v_cmp_class_f64_e64 {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 64{{$}}
261 ; SI: s_endpgm
270 ; SI-LABEL: {{^}}test_class_full_mask_f64:
271 ; SI-DAG: s_load_dwordx2 [[SA:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
272 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x1ff{{$}}
273 ; SI: v_cmp_class_f64_e32 vcc, [[SA]], [[MASK]]
274 ; SI-NOT: vcc
275 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
276 ; SI-NEXT: buffer_store_dword [[RESULT]]
277 ; SI: s_endpgm
285 ; SI-LABEL: {{^}}v_test_class_full_mask_f64:
286 ; SI-DAG: buffer_load_dwordx2 [[VA:v\[[0-9]+:[0-9]+\]]]
287 ; SI-DAG: s_movk_i32 [[MASK:s[0-9]+]], 0x1ff{{$}}
288 ; SI: v_cmp_class_f64_e64 s[{{[0-9]}}:{{[0-9]}}], [[VA]], [[MASK]]
289 ; SI-NOT: vcc
290 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, s[{{[0-9]}}:{{[0-9]}}]
291 ; SI: buffer_store_dword [[RESULT]]
292 ; SI: s_endpgm
305 ; SI-LABEL: {{^}}test_class_inline_imm_constant_dynamic_mask_f64:
307 ; SI: v_cmp_class_f64_e32 vcc,
308 ; SI: s_endpgm
321 ; SI-LABEL: {{^}}test_class_lit_constant_dynamic_mask_f64:
322 ; SI: v_cmp_class_f64_e32 vcc, s{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}
323 ; SI: s_endpgm
336 ; SI-LABEL: {{^}}test_fold_or_class_f32_0:
337 ; SI-NOT: v_cmp_class
338 ; SI: v_cmp_class_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 3{{$}}
339 ; SI-NOT: v_cmp_class
340 ; SI: s_endpgm
356 ; SI-LABEL: {{^}}test_fold_or3_class_f32_0:
357 ; SI-NOT: v_cmp_class
358 ; SI: v_cmp_class_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 7{{$}}
359 ; SI-NOT: v_cmp_class
360 ; SI: s_endpgm
378 ; SI-LABEL: {{^}}test_fold_or_all_tests_class_f32_0:
379 ; SI-NOT: v_cmp_class
380 ; SI: s_movk_i32 [[MASK:s[0-9]+]], 0x3ff{{$}}
381 ; SI: v_cmp_class_f32_e64 s[0:1], v{{[0-9]+}}, [[MASK]]{{$}}
382 ; SI-NOT: v_cmp_class
383 ; SI: s_endpgm
414 ; SI-LABEL: {{^}}test_fold_or_class_f32_1:
415 ; SI-NOT: v_cmp_class
416 ; SI: v_cmp_class_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 12{{$}}
417 ; SI-NOT: v_cmp_class
418 ; SI: s_endpgm
434 ; SI-LABEL: {{^}}test_fold_or_class_f32_2:
435 ; SI-NOT: v_cmp_class
436 ; SI: v_cmp_class_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 7{{$}}
437 ; SI-NOT: v_cmp_class
438 ; SI: s_endpgm
454 ; SI-LABEL: {{^}}test_no_fold_or_class_f32_0:
455 ; SI-DAG: v_cmp_class_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 4{{$}}
456 ; SI-DAG: v_cmp_class_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}, 8{{$}}
457 ; SI: s_or_b64
458 ; SI: s_endpgm
474 ; SI-LABEL: {{^}}test_class_0_f32:
475 ; SI-NOT: v_cmp_class
476 ; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
477 ; SI: buffer_store_dword [[RESULT]]
478 ; SI: s_endpgm
486 ; SI-LABEL: {{^}}test_class_0_f64:
487 ; SI-NOT: v_cmp_class
488 ; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
489 ; SI: buffer_store_dword [[RESULT]]
490 ; SI: s_endpgm
498 ; SI-LABEL: {{^}}test_class_undef_f32:
499 ; SI-NOT: v_cmp_class
500 ; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0
501 ; SI: buffer_store_dword [[RESULT]]
502 ; SI: s_endpgm
510 ; SI-LABEL: {{^}}test_fold_and_ord:
511 ; SI: s_waitcnt
512 ; SI-NEXT: v_cmp_class_f32_e64 [[COND:s\[[0-9]+:[0-9]+\]]], v0, 32{{$}}
513 ; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, [[COND]]
514 ; SI-NEXT: s_setpc_b64
522 ; SI-LABEL: {{^}}test_fold_and_unord:
523 ; SI: s_waitcnt
524 ; SI-NEXT: v_cmp_class_f32_e64 [[COND:s\[[0-9]+:[0-9]+\]]], v0, 3{{$}}
525 ; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, [[COND]]
526 ; SI-NEXT: s_setpc_b64
534 ; SI-LABEL: {{^}}test_fold_and_ord_multi_use:
535 ; SI: v_cmp_class
536 ; SI-NOT: v_cmp_class
537 ; SI: v_cmp_o
538 ; SI: s_and_b64