Lines Matching refs:out2
21 …_kernel void @atomic_add_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
25 store i64 %tmp0, i64 addrspace(1)* %out2
47 …omic_add_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
52 store i64 %tmp0, i64 addrspace(1)* %out2
70 define amdgpu_kernel void @atomic_add_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 …
73 store i64 %tmp0, i64 addrspace(1)* %out2
94 …oid @atomic_add_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
98 store i64 %tmp0, i64 addrspace(1)* %out2
117 …_kernel void @atomic_and_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
121 store i64 %tmp0, i64 addrspace(1)* %out2
143 …omic_and_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
148 store i64 %tmp0, i64 addrspace(1)* %out2
166 define amdgpu_kernel void @atomic_and_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 …
169 store i64 %tmp0, i64 addrspace(1)* %out2
190 …oid @atomic_and_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
194 store i64 %tmp0, i64 addrspace(1)* %out2
213 …_kernel void @atomic_sub_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
217 store i64 %tmp0, i64 addrspace(1)* %out2
239 …omic_sub_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
244 store i64 %tmp0, i64 addrspace(1)* %out2
262 define amdgpu_kernel void @atomic_sub_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 …
265 store i64 %tmp0, i64 addrspace(1)* %out2
286 …oid @atomic_sub_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
290 store i64 %tmp0, i64 addrspace(1)* %out2
309 …_kernel void @atomic_max_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
313 store i64 %tmp0, i64 addrspace(1)* %out2
335 …omic_max_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
340 store i64 %tmp0, i64 addrspace(1)* %out2
358 define amdgpu_kernel void @atomic_max_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 …
361 store i64 %tmp0, i64 addrspace(1)* %out2
382 …oid @atomic_max_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
386 store i64 %tmp0, i64 addrspace(1)* %out2
405 …kernel void @atomic_umax_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
409 store i64 %tmp0, i64 addrspace(1)* %out2
431 …mic_umax_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
436 store i64 %tmp0, i64 addrspace(1)* %out2
454 define amdgpu_kernel void @atomic_umax_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64…
457 store i64 %tmp0, i64 addrspace(1)* %out2
478 …id @atomic_umax_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
482 store i64 %tmp0, i64 addrspace(1)* %out2
501 …_kernel void @atomic_min_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
505 store i64 %tmp0, i64 addrspace(1)* %out2
527 …omic_min_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
532 store i64 %tmp0, i64 addrspace(1)* %out2
550 define amdgpu_kernel void @atomic_min_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 …
553 store i64 %tmp0, i64 addrspace(1)* %out2
574 …oid @atomic_min_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
578 store i64 %tmp0, i64 addrspace(1)* %out2
598 …kernel void @atomic_umin_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
602 store i64 %tmp0, i64 addrspace(1)* %out2
624 …mic_umin_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
629 store i64 %tmp0, i64 addrspace(1)* %out2
647 define amdgpu_kernel void @atomic_umin_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64…
650 store i64 %tmp0, i64 addrspace(1)* %out2
671 …id @atomic_umin_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
675 store i64 %tmp0, i64 addrspace(1)* %out2
694 define amdgpu_kernel void @atomic_or_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2…
698 store i64 %tmp0, i64 addrspace(1)* %out2
720 …tomic_or_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
725 store i64 %tmp0, i64 addrspace(1)* %out2
743 define amdgpu_kernel void @atomic_or_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %…
746 store i64 %tmp0, i64 addrspace(1)* %out2
767 define amdgpu_kernel void @atomic_or_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2…
771 store i64 %tmp0, i64 addrspace(1)* %out2
813 …kernel void @atomic_xchg_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
817 store i64 %tmp0, i64 addrspace(1)* %out2
839 …mic_xchg_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
844 store i64 %tmp0, i64 addrspace(1)* %out2
862 define amdgpu_kernel void @atomic_xchg_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64…
865 store i64 %tmp0, i64 addrspace(1)* %out2
886 …id @atomic_xchg_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
890 store i64 %tmp0, i64 addrspace(1)* %out2
909 …_kernel void @atomic_xor_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) {
913 store i64 %tmp0, i64 addrspace(1)* %out2
935 …omic_xor_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
940 store i64 %tmp0, i64 addrspace(1)* %out2
958 define amdgpu_kernel void @atomic_xor_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 …
961 store i64 %tmp0, i64 addrspace(1)* %out2
982 …oid @atomic_xor_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
986 store i64 %tmp0, i64 addrspace(1)* %out2
1019 …@atomic_cmpxchg_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %old)…
1024 store i64 %extract0, i64 addrspace(1)* %out2
1046 …_cmpxchg_i64_ret_addr64_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
1052 store i64 %extract0, i64 addrspace(1)* %out2
1070 define amdgpu_kernel void @atomic_cmpxchg_i64_ret(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, …
1074 store i64 %extract0, i64 addrspace(1)* %out2
1095 …@atomic_cmpxchg_i64_ret_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in, i64 %inde…
1100 store i64 %extract0, i64 addrspace(1)* %out2