Lines Matching refs:src1

24 define amdgpu_kernel void @dotproduct_f16(<2 x half> addrspace(1)* %src1,
28   %src1.vec = load <2 x half>, <2 x half> addrspace(1)* %src1
31   %src1.el1 = extractelement <2 x half> %src1.vec, i64 0
34   %src1.el2 = extractelement <2 x half> %src1.vec, i64 1
37   %mul2 = fmul half %src1.el2, %src2.el2
38   %mul1 = fmul half %src1.el1, %src2.el1
62 define amdgpu_kernel void @dotproduct_f16_f32(<2 x half> addrspace(1)* %src1,
66   %src1.vec = load <2 x half>, <2 x half> addrspace(1)* %src1
69   %src1.el1 = extractelement <2 x half> %src1.vec, i64 0
70   %csrc1.el1 = fpext half %src1.el1 to float
74   %src1.el2 = extractelement <2 x half> %src1.vec, i64 1
75   %csrc1.el2 = fpext half %src1.el2 to float
102 define amdgpu_kernel void @dotproduct_diffvecorder(<2 x half> addrspace(1)* %src1,
106   %src1.vec = load <2 x half>, <2 x half> addrspace(1)* %src1
109   %src1.el1 = extractelement <2 x half> %src1.vec, i64 0
110   %csrc1.el1 = fpext half %src1.el1 to float
114   %src1.el2 = extractelement <2 x half> %src1.vec, i64 1
115   %csrc1.el2 = fpext half %src1.el2 to float
139 define amdgpu_kernel void @dotproduct_v4f16(<4 x half> addrspace(1)* %src1,
143   %src1.vec = load <4 x half>, <4 x half> addrspace(1)* %src1
146   %src1.el1 = extractelement <4 x half> %src1.vec, i64 0
147   %csrc1.el1 = fpext half %src1.el1 to float
151   %src1.el2 = extractelement <4 x half> %src1.vec, i64 1
152   %csrc1.el2 = fpext half %src1.el2 to float
176 define amdgpu_kernel void @NotAdotproduct(<2 x half> addrspace(1)* %src1,
180   %src1.vec = load <2 x half>, <2 x half> addrspace(1)* %src1
183   %src1.el1 = extractelement <2 x half> %src1.vec, i64 0
184   %csrc1.el1 = fpext half %src1.el1 to float
188   %src1.el2 = extractelement <2 x half> %src1.vec, i64 1
189   %csrc1.el2 = fpext half %src1.el2 to float
213 define amdgpu_kernel void @Diff_Idx_NotAdotproduct(<2 x half> addrspace(1)* %src1,
217   %src1.vec = load <2 x half>, <2 x half> addrspace(1)* %src1
220   %src1.el1 = extractelement <2 x half> %src1.vec, i64 0
221   %csrc1.el1 = fpext half %src1.el1 to float
225   %src1.el2 = extractelement <2 x half> %src1.vec, i64 1
226   %csrc1.el2 = fpext half %src1.el2 to float