Lines Matching refs:SI

2 …: llc -march=amdgcn -mtriple=amdgcn-- -verify-machineinstrs -o - %s | FileCheck -check-prefix=SI %s
6 ; SI-LABEL: vec_8xi16_extract_4xi16:
7 ; SI:       ; %bb.0:
8 ; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9 ; SI-NEXT:    s_cbranch_scc0 .LBB0_2
10 ; SI-NEXT:  ; %bb.1: ; %F
11 ; SI-NEXT:    s_mov_b32 s6, 0
12 ; SI-NEXT:    s_mov_b32 s7, 0xf000
13 ; SI-NEXT:    s_mov_b32 s4, s6
14 ; SI-NEXT:    s_mov_b32 s5, s6
15 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 glc
16 ; SI-NEXT:    s_waitcnt vmcnt(0)
17 ; SI-NEXT:    buffer_load_ushort v5, v[2:3], s[4:7], 0 addr64 offset:2 glc
18 ; SI-NEXT:    s_waitcnt vmcnt(0)
19 ; SI-NEXT:    buffer_load_ushort v6, v[2:3], s[4:7], 0 addr64 offset:4 glc
20 ; SI-NEXT:    s_waitcnt vmcnt(0)
21 ; SI-NEXT:    buffer_load_ushort v7, v[2:3], s[4:7], 0 addr64 offset:6 glc
22 ; SI-NEXT:    s_waitcnt vmcnt(0)
23 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:8 glc
24 ; SI-NEXT:    s_waitcnt vmcnt(0)
25 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:10 glc
26 ; SI-NEXT:    s_waitcnt vmcnt(0)
27 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:12 glc
28 ; SI-NEXT:    s_waitcnt vmcnt(0)
29 ; SI-NEXT:    buffer_load_ushort v2, v[2:3], s[4:7], 0 addr64 offset:14 glc
30 ; SI-NEXT:    s_waitcnt vmcnt(0)
31 ; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v7
32 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v5
33 ; SI-NEXT:    v_or_b32_e32 v2, v6, v2
34 ; SI-NEXT:    v_or_b32_e32 v3, v4, v3
35 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v3
36 ; SI-NEXT:    s_mov_b64 vcc, exec
37 ; SI-NEXT:    s_cbranch_execz .LBB0_3
38 ; SI-NEXT:    s_branch .LBB0_4
39 ; SI-NEXT:  .LBB0_2:
40 ; SI-NEXT:    ; implicit-def: $vgpr3
41 ; SI-NEXT:    ; implicit-def: $vgpr4
42 ; SI-NEXT:    ; implicit-def: $vgpr2
43 ; SI-NEXT:    s_mov_b64 vcc, 0
44 ; SI-NEXT:  .LBB0_3: ; %T
45 ; SI-NEXT:    s_mov_b32 s6, 0
46 ; SI-NEXT:    s_mov_b32 s7, 0xf000
47 ; SI-NEXT:    s_mov_b32 s4, s6
48 ; SI-NEXT:    s_mov_b32 s5, s6
49 ; SI-NEXT:    buffer_load_ushort v3, v[0:1], s[4:7], 0 addr64 glc
50 ; SI-NEXT:    s_waitcnt vmcnt(0)
51 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:2 glc
52 ; SI-NEXT:    s_waitcnt vmcnt(0)
53 ; SI-NEXT:    buffer_load_ushort v4, v[0:1], s[4:7], 0 addr64 offset:4 glc
54 ; SI-NEXT:    s_waitcnt vmcnt(0)
55 ; SI-NEXT:    buffer_load_ushort v5, v[0:1], s[4:7], 0 addr64 offset:6 glc
56 ; SI-NEXT:    s_waitcnt vmcnt(0)
57 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:8 glc
58 ; SI-NEXT:    s_waitcnt vmcnt(0)
59 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:10 glc
60 ; SI-NEXT:    s_waitcnt vmcnt(0)
61 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:12 glc
62 ; SI-NEXT:    s_waitcnt vmcnt(0)
63 ; SI-NEXT:    buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64 offset:14 glc
64 ; SI-NEXT:    s_waitcnt vmcnt(0)
65 ; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v5
66 ; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v2
67 ; SI-NEXT:    v_or_b32_e32 v2, v4, v0
68 ; SI-NEXT:    v_or_b32_e32 v3, v3, v1
69 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v3
70 ; SI-NEXT:  .LBB0_4: ; %exit
71 ; SI-NEXT:    v_bfe_i32 v0, v3, 0, 16
72 ; SI-NEXT:    v_bfe_i32 v1, v4, 0, 16
73 ; SI-NEXT:    v_bfe_i32 v2, v2, 0, 16
74 ; SI-NEXT:    v_mov_b32_e32 v3, 0xffff
75 ; SI-NEXT:    v_mov_b32_e32 v4, 0x8000
76 ; SI-NEXT:    v_mov_b32_e32 v5, 0xffff0000
77 ; SI-NEXT:    v_bfrev_b32_e32 v6, 1
78 ; SI-NEXT:    v_mov_b32_e32 v7, 0xffff8000
79 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v0
80 ; SI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
81 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v1
82 ; SI-NEXT:    v_cndmask_b32_e32 v1, v5, v6, vcc
83 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v2
84 ; SI-NEXT:    v_cndmask_b32_e32 v2, -1, v7, vcc
85 ; SI-NEXT:    v_or_b32_e32 v0, v0, v1
86 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v2
87 ; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
88 ; SI-NEXT:    v_or_b32_e32 v2, v2, v3
89 ; SI-NEXT:    v_alignbit_b32 v1, v2, v1, 16
90 ; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
91 ; SI-NEXT:    s_setpc_b64 s[30:31]
140 ; SI-LABEL: vec_8xi16_extract_4xi16_2:
141 ; SI:       ; %bb.0:
142 ; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
143 ; SI-NEXT:    s_cbranch_scc0 .LBB1_2
144 ; SI-NEXT:  ; %bb.1: ; %F
145 ; SI-NEXT:    s_mov_b32 s6, 0
146 ; SI-NEXT:    s_mov_b32 s7, 0xf000
147 ; SI-NEXT:    s_mov_b32 s4, s6
148 ; SI-NEXT:    s_mov_b32 s5, s6
149 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 glc
150 ; SI-NEXT:    s_waitcnt vmcnt(0)
151 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:2 glc
152 ; SI-NEXT:    s_waitcnt vmcnt(0)
153 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:4 glc
154 ; SI-NEXT:    s_waitcnt vmcnt(0)
155 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:6 glc
156 ; SI-NEXT:    s_waitcnt vmcnt(0)
157 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:8 glc
158 ; SI-NEXT:    s_waitcnt vmcnt(0)
159 ; SI-NEXT:    buffer_load_ushort v5, v[2:3], s[4:7], 0 addr64 offset:10 glc
160 ; SI-NEXT:    s_waitcnt vmcnt(0)
161 ; SI-NEXT:    buffer_load_ushort v6, v[2:3], s[4:7], 0 addr64 offset:12 glc
162 ; SI-NEXT:    s_waitcnt vmcnt(0)
163 ; SI-NEXT:    buffer_load_ushort v2, v[2:3], s[4:7], 0 addr64 offset:14 glc
164 ; SI-NEXT:    s_waitcnt vmcnt(0)
165 ; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
166 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v5
167 ; SI-NEXT:    v_or_b32_e32 v2, v6, v2
168 ; SI-NEXT:    v_or_b32_e32 v3, v4, v3
169 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v2
170 ; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v3
171 ; SI-NEXT:    s_mov_b64 vcc, exec
172 ; SI-NEXT:    s_cbranch_execz .LBB1_3
173 ; SI-NEXT:    s_branch .LBB1_4
174 ; SI-NEXT:  .LBB1_2:
175 ; SI-NEXT:    ; implicit-def: $vgpr3
176 ; SI-NEXT:    ; implicit-def: $vgpr5
177 ; SI-NEXT:    ; implicit-def: $vgpr2
178 ; SI-NEXT:    ; implicit-def: $vgpr4
179 ; SI-NEXT:    s_mov_b64 vcc, 0
180 ; SI-NEXT:  .LBB1_3: ; %T
181 ; SI-NEXT:    s_mov_b32 s6, 0
182 ; SI-NEXT:    s_mov_b32 s7, 0xf000
183 ; SI-NEXT:    s_mov_b32 s4, s6
184 ; SI-NEXT:    s_mov_b32 s5, s6
185 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 glc
186 ; SI-NEXT:    s_waitcnt vmcnt(0)
187 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:2 glc
188 ; SI-NEXT:    s_waitcnt vmcnt(0)
189 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:4 glc
190 ; SI-NEXT:    s_waitcnt vmcnt(0)
191 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:6 glc
192 ; SI-NEXT:    s_waitcnt vmcnt(0)
193 ; SI-NEXT:    buffer_load_ushort v3, v[0:1], s[4:7], 0 addr64 offset:8 glc
194 ; SI-NEXT:    s_waitcnt vmcnt(0)
195 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:10 glc
196 ; SI-NEXT:    s_waitcnt vmcnt(0)
197 ; SI-NEXT:    buffer_load_ushort v4, v[0:1], s[4:7], 0 addr64 offset:12 glc
198 ; SI-NEXT:    s_waitcnt vmcnt(0)
199 ; SI-NEXT:    buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64 offset:14 glc
200 ; SI-NEXT:    s_waitcnt vmcnt(0)
201 ; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
202 ; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v2
203 ; SI-NEXT:    v_or_b32_e32 v2, v4, v0
204 ; SI-NEXT:    v_or_b32_e32 v3, v3, v1
205 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v2
206 ; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v3
207 ; SI-NEXT:  .LBB1_4: ; %exit
208 ; SI-NEXT:    v_bfe_i32 v0, v3, 0, 16
209 ; SI-NEXT:    v_bfe_i32 v1, v5, 0, 16
210 ; SI-NEXT:    v_bfe_i32 v2, v2, 0, 16
211 ; SI-NEXT:    v_bfe_i32 v3, v4, 0, 16
212 ; SI-NEXT:    v_mov_b32_e32 v4, 0xffff
213 ; SI-NEXT:    v_mov_b32_e32 v5, 0x8000
214 ; SI-NEXT:    v_mov_b32_e32 v6, 0xffff0000
215 ; SI-NEXT:    v_bfrev_b32_e32 v7, 1
216 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v0
217 ; SI-NEXT:    v_cndmask_b32_e32 v0, v4, v5, vcc
218 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v1
219 ; SI-NEXT:    v_cndmask_b32_e32 v1, v6, v7, vcc
220 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v2
221 ; SI-NEXT:    v_cndmask_b32_e32 v2, v4, v5, vcc
222 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v3
223 ; SI-NEXT:    v_cndmask_b32_e32 v3, v6, v7, vcc
224 ; SI-NEXT:    v_or_b32_e32 v0, v0, v1
225 ; SI-NEXT:    v_or_b32_e32 v2, v2, v3
226 ; SI-NEXT:    v_alignbit_b32 v1, v2, v1, 16
227 ; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
228 ; SI-NEXT:    s_setpc_b64 s[30:31]
277 ; SI-LABEL: vec_8xf16_extract_4xf16:
278 ; SI:       ; %bb.0:
279 ; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
280 ; SI-NEXT:    s_cbranch_scc0 .LBB2_2
281 ; SI-NEXT:  ; %bb.1: ; %F
282 ; SI-NEXT:    s_mov_b32 s6, 0
283 ; SI-NEXT:    s_mov_b32 s7, 0xf000
284 ; SI-NEXT:    s_mov_b32 s4, s6
285 ; SI-NEXT:    s_mov_b32 s5, s6
286 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 glc
287 ; SI-NEXT:    s_waitcnt vmcnt(0)
288 ; SI-NEXT:    buffer_load_ushort v5, v[2:3], s[4:7], 0 addr64 offset:2 glc
289 ; SI-NEXT:    s_waitcnt vmcnt(0)
290 ; SI-NEXT:    buffer_load_ushort v6, v[2:3], s[4:7], 0 addr64 offset:4 glc
291 ; SI-NEXT:    s_waitcnt vmcnt(0)
292 ; SI-NEXT:    buffer_load_ushort v7, v[2:3], s[4:7], 0 addr64 offset:6 glc
293 ; SI-NEXT:    s_waitcnt vmcnt(0)
294 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:8 glc
295 ; SI-NEXT:    s_waitcnt vmcnt(0)
296 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:10 glc
297 ; SI-NEXT:    s_waitcnt vmcnt(0)
298 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:12 glc
299 ; SI-NEXT:    s_waitcnt vmcnt(0)
300 ; SI-NEXT:    buffer_load_ushort v2, v[2:3], s[4:7], 0 addr64 offset:14 glc
301 ; SI-NEXT:    s_waitcnt vmcnt(0)
302 ; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v7
303 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v5
304 ; SI-NEXT:    v_or_b32_e32 v2, v6, v2
305 ; SI-NEXT:    v_or_b32_e32 v4, v4, v3
306 ; SI-NEXT:    v_cvt_f32_f16_e32 v2, v2
307 ; SI-NEXT:    v_cvt_f32_f16_e32 v3, v4
308 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v4
309 ; SI-NEXT:    v_cvt_f32_f16_e32 v4, v4
310 ; SI-NEXT:    s_mov_b64 vcc, exec
311 ; SI-NEXT:    s_cbranch_execz .LBB2_3
312 ; SI-NEXT:    s_branch .LBB2_4
313 ; SI-NEXT:  .LBB2_2:
314 ; SI-NEXT:    ; implicit-def: $vgpr3
315 ; SI-NEXT:    ; implicit-def: $vgpr4
316 ; SI-NEXT:    ; implicit-def: $vgpr2
317 ; SI-NEXT:    s_mov_b64 vcc, 0
318 ; SI-NEXT:  .LBB2_3: ; %T
319 ; SI-NEXT:    s_mov_b32 s6, 0
320 ; SI-NEXT:    s_mov_b32 s7, 0xf000
321 ; SI-NEXT:    s_mov_b32 s4, s6
322 ; SI-NEXT:    s_mov_b32 s5, s6
323 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 glc
324 ; SI-NEXT:    s_waitcnt vmcnt(0)
325 ; SI-NEXT:    buffer_load_ushort v3, v[0:1], s[4:7], 0 addr64 offset:2 glc
326 ; SI-NEXT:    s_waitcnt vmcnt(0)
327 ; SI-NEXT:    buffer_load_ushort v4, v[0:1], s[4:7], 0 addr64 offset:4 glc
328 ; SI-NEXT:    s_waitcnt vmcnt(0)
329 ; SI-NEXT:    buffer_load_ushort v5, v[0:1], s[4:7], 0 addr64 offset:6 glc
330 ; SI-NEXT:    s_waitcnt vmcnt(0)
331 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:8 glc
332 ; SI-NEXT:    s_waitcnt vmcnt(0)
333 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:10 glc
334 ; SI-NEXT:    s_waitcnt vmcnt(0)
335 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:12 glc
336 ; SI-NEXT:    s_waitcnt vmcnt(0)
337 ; SI-NEXT:    buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64 offset:14 glc
338 ; SI-NEXT:    s_waitcnt vmcnt(0)
339 ; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v5
340 ; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v3
341 ; SI-NEXT:    v_or_b32_e32 v0, v4, v0
342 ; SI-NEXT:    v_or_b32_e32 v1, v2, v1
343 ; SI-NEXT:    v_cvt_f32_f16_e32 v2, v0
344 ; SI-NEXT:    v_cvt_f32_f16_e32 v3, v1
345 ; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v1
346 ; SI-NEXT:    v_cvt_f32_f16_e32 v4, v0
347 ; SI-NEXT:  .LBB2_4: ; %exit
348 ; SI-NEXT:    v_cvt_f16_f32_e32 v0, v3
349 ; SI-NEXT:    v_cvt_f16_f32_e32 v1, v4
350 ; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
351 ; SI-NEXT:    v_mov_b32_e32 v3, 0x3fa00000
352 ; SI-NEXT:    v_mov_b32_e32 v4, 0x3f200000
353 ; SI-NEXT:    v_cvt_f32_f16_e32 v0, v0
354 ; SI-NEXT:    v_cvt_f32_f16_e32 v1, v1
355 ; SI-NEXT:    v_cvt_f32_f16_e32 v2, v2
356 ; SI-NEXT:    v_cmp_nge_f32_e32 vcc, 0.5, v0
357 ; SI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
358 ; SI-NEXT:    v_cmp_nge_f32_e32 vcc, 0.5, v1
359 ; SI-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
360 ; SI-NEXT:    v_cmp_nge_f32_e32 vcc, 0.5, v2
361 ; SI-NEXT:    v_cndmask_b32_e32 v2, v3, v4, vcc
362 ; SI-NEXT:    v_mov_b32_e32 v3, v2
363 ; SI-NEXT:    s_setpc_b64 s[30:31]
417 ; SI-LABEL: vec_16xi16_extract_4xi16:
418 ; SI:       ; %bb.0:
419 ; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
420 ; SI-NEXT:    s_cbranch_scc0 .LBB3_2
421 ; SI-NEXT:  ; %bb.1: ; %F
422 ; SI-NEXT:    s_mov_b32 s6, 0
423 ; SI-NEXT:    s_mov_b32 s7, 0xf000
424 ; SI-NEXT:    s_mov_b32 s4, s6
425 ; SI-NEXT:    s_mov_b32 s5, s6
426 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 glc
427 ; SI-NEXT:    s_waitcnt vmcnt(0)
428 ; SI-NEXT:    buffer_load_ushort v5, v[2:3], s[4:7], 0 addr64 offset:2 glc
429 ; SI-NEXT:    s_waitcnt vmcnt(0)
430 ; SI-NEXT:    buffer_load_ushort v6, v[2:3], s[4:7], 0 addr64 offset:4 glc
431 ; SI-NEXT:    s_waitcnt vmcnt(0)
432 ; SI-NEXT:    buffer_load_ushort v7, v[2:3], s[4:7], 0 addr64 offset:6 glc
433 ; SI-NEXT:    s_waitcnt vmcnt(0)
434 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:8 glc
435 ; SI-NEXT:    s_waitcnt vmcnt(0)
436 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:10 glc
437 ; SI-NEXT:    s_waitcnt vmcnt(0)
438 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:12 glc
439 ; SI-NEXT:    s_waitcnt vmcnt(0)
440 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:14 glc
441 ; SI-NEXT:    s_waitcnt vmcnt(0)
442 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:16 glc
443 ; SI-NEXT:    s_waitcnt vmcnt(0)
444 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:18 glc
445 ; SI-NEXT:    s_waitcnt vmcnt(0)
446 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:20 glc
447 ; SI-NEXT:    s_waitcnt vmcnt(0)
448 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:22 glc
449 ; SI-NEXT:    s_waitcnt vmcnt(0)
450 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:24 glc
451 ; SI-NEXT:    s_waitcnt vmcnt(0)
452 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:26 glc
453 ; SI-NEXT:    s_waitcnt vmcnt(0)
454 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:28 glc
455 ; SI-NEXT:    s_waitcnt vmcnt(0)
456 ; SI-NEXT:    buffer_load_ushort v2, v[2:3], s[4:7], 0 addr64 offset:30 glc
457 ; SI-NEXT:    s_waitcnt vmcnt(0)
458 ; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v7
459 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v5
460 ; SI-NEXT:    v_or_b32_e32 v2, v6, v2
461 ; SI-NEXT:    v_or_b32_e32 v3, v4, v3
462 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v3
463 ; SI-NEXT:    s_mov_b64 vcc, exec
464 ; SI-NEXT:    s_cbranch_execz .LBB3_3
465 ; SI-NEXT:    s_branch .LBB3_4
466 ; SI-NEXT:  .LBB3_2:
467 ; SI-NEXT:    ; implicit-def: $vgpr3
468 ; SI-NEXT:    ; implicit-def: $vgpr4
469 ; SI-NEXT:    ; implicit-def: $vgpr2
470 ; SI-NEXT:    s_mov_b64 vcc, 0
471 ; SI-NEXT:  .LBB3_3: ; %T
472 ; SI-NEXT:    s_mov_b32 s6, 0
473 ; SI-NEXT:    s_mov_b32 s7, 0xf000
474 ; SI-NEXT:    s_mov_b32 s4, s6
475 ; SI-NEXT:    s_mov_b32 s5, s6
476 ; SI-NEXT:    buffer_load_ushort v3, v[0:1], s[4:7], 0 addr64 glc
477 ; SI-NEXT:    s_waitcnt vmcnt(0)
478 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:2 glc
479 ; SI-NEXT:    s_waitcnt vmcnt(0)
480 ; SI-NEXT:    buffer_load_ushort v4, v[0:1], s[4:7], 0 addr64 offset:4 glc
481 ; SI-NEXT:    s_waitcnt vmcnt(0)
482 ; SI-NEXT:    buffer_load_ushort v5, v[0:1], s[4:7], 0 addr64 offset:6 glc
483 ; SI-NEXT:    s_waitcnt vmcnt(0)
484 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:8 glc
485 ; SI-NEXT:    s_waitcnt vmcnt(0)
486 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:10 glc
487 ; SI-NEXT:    s_waitcnt vmcnt(0)
488 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:12 glc
489 ; SI-NEXT:    s_waitcnt vmcnt(0)
490 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:14 glc
491 ; SI-NEXT:    s_waitcnt vmcnt(0)
492 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:16 glc
493 ; SI-NEXT:    s_waitcnt vmcnt(0)
494 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:18 glc
495 ; SI-NEXT:    s_waitcnt vmcnt(0)
496 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:20 glc
497 ; SI-NEXT:    s_waitcnt vmcnt(0)
498 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:22 glc
499 ; SI-NEXT:    s_waitcnt vmcnt(0)
500 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:24 glc
501 ; SI-NEXT:    s_waitcnt vmcnt(0)
502 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:26 glc
503 ; SI-NEXT:    s_waitcnt vmcnt(0)
504 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:28 glc
505 ; SI-NEXT:    s_waitcnt vmcnt(0)
506 ; SI-NEXT:    buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64 offset:30 glc
507 ; SI-NEXT:    s_waitcnt vmcnt(0)
508 ; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v5
509 ; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v2
510 ; SI-NEXT:    v_or_b32_e32 v2, v4, v0
511 ; SI-NEXT:    v_or_b32_e32 v3, v3, v1
512 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v3
513 ; SI-NEXT:  .LBB3_4: ; %exit
514 ; SI-NEXT:    v_bfe_i32 v0, v3, 0, 16
515 ; SI-NEXT:    v_bfe_i32 v1, v4, 0, 16
516 ; SI-NEXT:    v_bfe_i32 v2, v2, 0, 16
517 ; SI-NEXT:    v_mov_b32_e32 v3, 0xffff
518 ; SI-NEXT:    v_mov_b32_e32 v4, 0x8000
519 ; SI-NEXT:    v_mov_b32_e32 v5, 0xffff0000
520 ; SI-NEXT:    v_bfrev_b32_e32 v6, 1
521 ; SI-NEXT:    v_mov_b32_e32 v7, 0xffff8000
522 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v0
523 ; SI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
524 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v1
525 ; SI-NEXT:    v_cndmask_b32_e32 v1, v5, v6, vcc
526 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v2
527 ; SI-NEXT:    v_cndmask_b32_e32 v2, -1, v7, vcc
528 ; SI-NEXT:    v_or_b32_e32 v0, v0, v1
529 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v2
530 ; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
531 ; SI-NEXT:    v_or_b32_e32 v2, v2, v3
532 ; SI-NEXT:    v_alignbit_b32 v1, v2, v1, 16
533 ; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
534 ; SI-NEXT:    s_setpc_b64 s[30:31]
591 ; SI-LABEL: vec_16xi16_extract_4xi16_2:
592 ; SI:       ; %bb.0:
593 ; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
594 ; SI-NEXT:    s_cbranch_scc0 .LBB4_2
595 ; SI-NEXT:  ; %bb.1: ; %F
596 ; SI-NEXT:    s_mov_b32 s6, 0
597 ; SI-NEXT:    s_mov_b32 s7, 0xf000
598 ; SI-NEXT:    s_mov_b32 s4, s6
599 ; SI-NEXT:    s_mov_b32 s5, s6
600 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 glc
601 ; SI-NEXT:    s_waitcnt vmcnt(0)
602 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:2 glc
603 ; SI-NEXT:    s_waitcnt vmcnt(0)
604 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:4 glc
605 ; SI-NEXT:    s_waitcnt vmcnt(0)
606 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:6 glc
607 ; SI-NEXT:    s_waitcnt vmcnt(0)
608 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 offset:8 glc
609 ; SI-NEXT:    s_waitcnt vmcnt(0)
610 ; SI-NEXT:    buffer_load_ushort v5, v[2:3], s[4:7], 0 addr64 offset:10 glc
611 ; SI-NEXT:    s_waitcnt vmcnt(0)
612 ; SI-NEXT:    buffer_load_ushort v6, v[2:3], s[4:7], 0 addr64 offset:12 glc
613 ; SI-NEXT:    s_waitcnt vmcnt(0)
614 ; SI-NEXT:    buffer_load_ushort v7, v[2:3], s[4:7], 0 addr64 offset:14 glc
615 ; SI-NEXT:    s_waitcnt vmcnt(0)
616 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:16 glc
617 ; SI-NEXT:    s_waitcnt vmcnt(0)
618 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:18 glc
619 ; SI-NEXT:    s_waitcnt vmcnt(0)
620 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:20 glc
621 ; SI-NEXT:    s_waitcnt vmcnt(0)
622 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:22 glc
623 ; SI-NEXT:    s_waitcnt vmcnt(0)
624 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:24 glc
625 ; SI-NEXT:    s_waitcnt vmcnt(0)
626 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:26 glc
627 ; SI-NEXT:    s_waitcnt vmcnt(0)
628 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:28 glc
629 ; SI-NEXT:    s_waitcnt vmcnt(0)
630 ; SI-NEXT:    buffer_load_ushort v2, v[2:3], s[4:7], 0 addr64 offset:30 glc
631 ; SI-NEXT:    s_waitcnt vmcnt(0)
632 ; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v7
633 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v5
634 ; SI-NEXT:    v_or_b32_e32 v2, v6, v2
635 ; SI-NEXT:    v_or_b32_e32 v3, v4, v3
636 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v2
637 ; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v3
638 ; SI-NEXT:    s_mov_b64 vcc, exec
639 ; SI-NEXT:    s_cbranch_execz .LBB4_3
640 ; SI-NEXT:    s_branch .LBB4_4
641 ; SI-NEXT:  .LBB4_2:
642 ; SI-NEXT:    ; implicit-def: $vgpr3
643 ; SI-NEXT:    ; implicit-def: $vgpr5
644 ; SI-NEXT:    ; implicit-def: $vgpr2
645 ; SI-NEXT:    ; implicit-def: $vgpr4
646 ; SI-NEXT:    s_mov_b64 vcc, 0
647 ; SI-NEXT:  .LBB4_3: ; %T
648 ; SI-NEXT:    s_mov_b32 s6, 0
649 ; SI-NEXT:    s_mov_b32 s7, 0xf000
650 ; SI-NEXT:    s_mov_b32 s4, s6
651 ; SI-NEXT:    s_mov_b32 s5, s6
652 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 glc
653 ; SI-NEXT:    s_waitcnt vmcnt(0)
654 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:2 glc
655 ; SI-NEXT:    s_waitcnt vmcnt(0)
656 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:4 glc
657 ; SI-NEXT:    s_waitcnt vmcnt(0)
658 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:6 glc
659 ; SI-NEXT:    s_waitcnt vmcnt(0)
660 ; SI-NEXT:    buffer_load_ushort v3, v[0:1], s[4:7], 0 addr64 offset:8 glc
661 ; SI-NEXT:    s_waitcnt vmcnt(0)
662 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 offset:10 glc
663 ; SI-NEXT:    s_waitcnt vmcnt(0)
664 ; SI-NEXT:    buffer_load_ushort v4, v[0:1], s[4:7], 0 addr64 offset:12 glc
665 ; SI-NEXT:    s_waitcnt vmcnt(0)
666 ; SI-NEXT:    buffer_load_ushort v5, v[0:1], s[4:7], 0 addr64 offset:14 glc
667 ; SI-NEXT:    s_waitcnt vmcnt(0)
668 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:16 glc
669 ; SI-NEXT:    s_waitcnt vmcnt(0)
670 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:18 glc
671 ; SI-NEXT:    s_waitcnt vmcnt(0)
672 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:20 glc
673 ; SI-NEXT:    s_waitcnt vmcnt(0)
674 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:22 glc
675 ; SI-NEXT:    s_waitcnt vmcnt(0)
676 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:24 glc
677 ; SI-NEXT:    s_waitcnt vmcnt(0)
678 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:26 glc
679 ; SI-NEXT:    s_waitcnt vmcnt(0)
680 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:28 glc
681 ; SI-NEXT:    s_waitcnt vmcnt(0)
682 ; SI-NEXT:    buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64 offset:30 glc
683 ; SI-NEXT:    s_waitcnt vmcnt(0)
684 ; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v5
685 ; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v2
686 ; SI-NEXT:    v_or_b32_e32 v2, v4, v0
687 ; SI-NEXT:    v_or_b32_e32 v3, v3, v1
688 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v2
689 ; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v3
690 ; SI-NEXT:  .LBB4_4: ; %exit
691 ; SI-NEXT:    v_bfe_i32 v0, v3, 0, 16
692 ; SI-NEXT:    v_bfe_i32 v1, v5, 0, 16
693 ; SI-NEXT:    v_bfe_i32 v2, v2, 0, 16
694 ; SI-NEXT:    v_bfe_i32 v3, v4, 0, 16
695 ; SI-NEXT:    v_mov_b32_e32 v4, 0xffff
696 ; SI-NEXT:    v_mov_b32_e32 v5, 0x8000
697 ; SI-NEXT:    v_mov_b32_e32 v6, 0xffff0000
698 ; SI-NEXT:    v_bfrev_b32_e32 v7, 1
699 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v0
700 ; SI-NEXT:    v_cndmask_b32_e32 v0, v4, v5, vcc
701 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v1
702 ; SI-NEXT:    v_cndmask_b32_e32 v1, v6, v7, vcc
703 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v2
704 ; SI-NEXT:    v_cndmask_b32_e32 v2, v4, v5, vcc
705 ; SI-NEXT:    v_cmp_lt_i32_e32 vcc, -1, v3
706 ; SI-NEXT:    v_cndmask_b32_e32 v3, v6, v7, vcc
707 ; SI-NEXT:    v_or_b32_e32 v0, v0, v1
708 ; SI-NEXT:    v_or_b32_e32 v2, v2, v3
709 ; SI-NEXT:    v_alignbit_b32 v1, v2, v1, 16
710 ; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
711 ; SI-NEXT:    s_setpc_b64 s[30:31]
768 ; SI-LABEL: vec_16xf16_extract_4xf16:
769 ; SI:       ; %bb.0:
770 ; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
771 ; SI-NEXT:    s_cbranch_scc0 .LBB5_2
772 ; SI-NEXT:  ; %bb.1: ; %F
773 ; SI-NEXT:    s_mov_b32 s6, 0
774 ; SI-NEXT:    s_mov_b32 s7, 0xf000
775 ; SI-NEXT:    s_mov_b32 s4, s6
776 ; SI-NEXT:    s_mov_b32 s5, s6
777 ; SI-NEXT:    buffer_load_ushort v4, v[2:3], s[4:7], 0 addr64 glc
778 ; SI-NEXT:    s_waitcnt vmcnt(0)
779 ; SI-NEXT:    buffer_load_ushort v5, v[2:3], s[4:7], 0 addr64 offset:2 glc
780 ; SI-NEXT:    s_waitcnt vmcnt(0)
781 ; SI-NEXT:    buffer_load_ushort v6, v[2:3], s[4:7], 0 addr64 offset:4 glc
782 ; SI-NEXT:    s_waitcnt vmcnt(0)
783 ; SI-NEXT:    buffer_load_ushort v7, v[2:3], s[4:7], 0 addr64 offset:6 glc
784 ; SI-NEXT:    s_waitcnt vmcnt(0)
785 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:8 glc
786 ; SI-NEXT:    s_waitcnt vmcnt(0)
787 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:10 glc
788 ; SI-NEXT:    s_waitcnt vmcnt(0)
789 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:12 glc
790 ; SI-NEXT:    s_waitcnt vmcnt(0)
791 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:14 glc
792 ; SI-NEXT:    s_waitcnt vmcnt(0)
793 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:16 glc
794 ; SI-NEXT:    s_waitcnt vmcnt(0)
795 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:18 glc
796 ; SI-NEXT:    s_waitcnt vmcnt(0)
797 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:20 glc
798 ; SI-NEXT:    s_waitcnt vmcnt(0)
799 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:22 glc
800 ; SI-NEXT:    s_waitcnt vmcnt(0)
801 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:24 glc
802 ; SI-NEXT:    s_waitcnt vmcnt(0)
803 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:26 glc
804 ; SI-NEXT:    s_waitcnt vmcnt(0)
805 ; SI-NEXT:    buffer_load_ushort v8, v[2:3], s[4:7], 0 addr64 offset:28 glc
806 ; SI-NEXT:    s_waitcnt vmcnt(0)
807 ; SI-NEXT:    buffer_load_ushort v2, v[2:3], s[4:7], 0 addr64 offset:30 glc
808 ; SI-NEXT:    s_waitcnt vmcnt(0)
809 ; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v7
810 ; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v5
811 ; SI-NEXT:    v_or_b32_e32 v2, v6, v2
812 ; SI-NEXT:    v_or_b32_e32 v4, v4, v3
813 ; SI-NEXT:    v_cvt_f32_f16_e32 v2, v2
814 ; SI-NEXT:    v_cvt_f32_f16_e32 v3, v4
815 ; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v4
816 ; SI-NEXT:    v_cvt_f32_f16_e32 v4, v4
817 ; SI-NEXT:    s_mov_b64 vcc, exec
818 ; SI-NEXT:    s_cbranch_execz .LBB5_3
819 ; SI-NEXT:    s_branch .LBB5_4
820 ; SI-NEXT:  .LBB5_2:
821 ; SI-NEXT:    ; implicit-def: $vgpr3
822 ; SI-NEXT:    ; implicit-def: $vgpr4
823 ; SI-NEXT:    ; implicit-def: $vgpr2
824 ; SI-NEXT:    s_mov_b64 vcc, 0
825 ; SI-NEXT:  .LBB5_3: ; %T
826 ; SI-NEXT:    s_mov_b32 s6, 0
827 ; SI-NEXT:    s_mov_b32 s7, 0xf000
828 ; SI-NEXT:    s_mov_b32 s4, s6
829 ; SI-NEXT:    s_mov_b32 s5, s6
830 ; SI-NEXT:    buffer_load_ushort v2, v[0:1], s[4:7], 0 addr64 glc
831 ; SI-NEXT:    s_waitcnt vmcnt(0)
832 ; SI-NEXT:    buffer_load_ushort v3, v[0:1], s[4:7], 0 addr64 offset:2 glc
833 ; SI-NEXT:    s_waitcnt vmcnt(0)
834 ; SI-NEXT:    buffer_load_ushort v4, v[0:1], s[4:7], 0 addr64 offset:4 glc
835 ; SI-NEXT:    s_waitcnt vmcnt(0)
836 ; SI-NEXT:    buffer_load_ushort v5, v[0:1], s[4:7], 0 addr64 offset:6 glc
837 ; SI-NEXT:    s_waitcnt vmcnt(0)
838 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:8 glc
839 ; SI-NEXT:    s_waitcnt vmcnt(0)
840 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:10 glc
841 ; SI-NEXT:    s_waitcnt vmcnt(0)
842 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:12 glc
843 ; SI-NEXT:    s_waitcnt vmcnt(0)
844 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:14 glc
845 ; SI-NEXT:    s_waitcnt vmcnt(0)
846 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:16 glc
847 ; SI-NEXT:    s_waitcnt vmcnt(0)
848 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:18 glc
849 ; SI-NEXT:    s_waitcnt vmcnt(0)
850 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:20 glc
851 ; SI-NEXT:    s_waitcnt vmcnt(0)
852 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:22 glc
853 ; SI-NEXT:    s_waitcnt vmcnt(0)
854 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:24 glc
855 ; SI-NEXT:    s_waitcnt vmcnt(0)
856 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:26 glc
857 ; SI-NEXT:    s_waitcnt vmcnt(0)
858 ; SI-NEXT:    buffer_load_ushort v6, v[0:1], s[4:7], 0 addr64 offset:28 glc
859 ; SI-NEXT:    s_waitcnt vmcnt(0)
860 ; SI-NEXT:    buffer_load_ushort v0, v[0:1], s[4:7], 0 addr64 offset:30 glc
861 ; SI-NEXT:    s_waitcnt vmcnt(0)
862 ; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v5
863 ; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v3
864 ; SI-NEXT:    v_or_b32_e32 v0, v4, v0
865 ; SI-NEXT:    v_or_b32_e32 v1, v2, v1
866 ; SI-NEXT:    v_cvt_f32_f16_e32 v2, v0
867 ; SI-NEXT:    v_cvt_f32_f16_e32 v3, v1
868 ; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v1
869 ; SI-NEXT:    v_cvt_f32_f16_e32 v4, v0
870 ; SI-NEXT:  .LBB5_4: ; %exit
871 ; SI-NEXT:    v_cvt_f16_f32_e32 v0, v3
872 ; SI-NEXT:    v_cvt_f16_f32_e32 v1, v4
873 ; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
874 ; SI-NEXT:    v_mov_b32_e32 v3, 0x3fa00000
875 ; SI-NEXT:    v_mov_b32_e32 v4, 0x3f200000
876 ; SI-NEXT:    v_cvt_f32_f16_e32 v0, v0
877 ; SI-NEXT:    v_cvt_f32_f16_e32 v1, v1
878 ; SI-NEXT:    v_cvt_f32_f16_e32 v2, v2
879 ; SI-NEXT:    v_cmp_nge_f32_e32 vcc, 0.5, v0
880 ; SI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
881 ; SI-NEXT:    v_cmp_nge_f32_e32 vcc, 0.5, v1
882 ; SI-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
883 ; SI-NEXT:    v_cmp_nge_f32_e32 vcc, 0.5, v2
884 ; SI-NEXT:    v_cndmask_b32_e32 v2, v3, v4, vcc
885 ; SI-NEXT:    v_mov_b32_e32 v3, v2
886 ; SI-NEXT:    s_setpc_b64 s[30:31]