Lines Matching refs:rel32

85 ; GFX803-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
86 ; GFX803-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
104 ; GFX900-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
105 ; GFX900-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
125 ; GFX1010-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
126 ; GFX1010-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
142 ; GFX1100-NEXT:    s_add_u32 s16, s16, ex@rel32@lo+4
143 ; GFX1100-NEXT:    s_addc_u32 s17, s17, ex@rel32@hi+12
172 ; GFX803-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
173 ; GFX803-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
194 ; GFX900-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
195 ; GFX900-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
218 ; GFX1010-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
219 ; GFX1010-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
238 ; GFX1100-NEXT:    s_add_u32 s16, s16, ex@rel32@lo+4
239 ; GFX1100-NEXT:    s_addc_u32 s17, s17, ex@rel32@hi+12
339 ; GFX803-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
340 ; GFX803-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
359 ; GFX900-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
360 ; GFX900-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
381 ; GFX1010-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
382 ; GFX1010-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
399 ; GFX1100-NEXT:    s_add_u32 s16, s16, ex@rel32@lo+4
400 ; GFX1100-NEXT:    s_addc_u32 s17, s17, ex@rel32@hi+12
418 ; GFX1010-NEXT    s_add_u32 s18, s18, ex@rel32@lo+4
419 ; GFX1010-NEXT    s_addc_u32 s19, s19, ex@rel32@hi+12
448 ; GFX803-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
449 ; GFX803-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
471 ; GFX900-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
472 ; GFX900-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
496 ; GFX1010-NEXT:    s_add_u32 s18, s18, ex@rel32@lo+4
497 ; GFX1010-NEXT:    s_addc_u32 s19, s19, ex@rel32@hi+12
517 ; GFX1100-NEXT:    s_add_u32 s16, s16, ex@rel32@lo+4
518 ; GFX1100-NEXT:    s_addc_u32 s17, s17, ex@rel32@hi+12