Lines Matching refs:SI
2 ; RUN: llc < %s -mtriple=amdgcn-- -verify-machineinstrs | FileCheck %s --check-prefix=SI
19 ; SI-LABEL: test_bswap_i32:
20 ; SI: ; %bb.0:
21 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
22 ; SI-NEXT: s_waitcnt lgkmcnt(0)
23 ; SI-NEXT: s_load_dword s4, s[2:3], 0x0
24 ; SI-NEXT: s_mov_b32 s3, 0xf000
25 ; SI-NEXT: s_mov_b32 s2, -1
26 ; SI-NEXT: s_waitcnt lgkmcnt(0)
27 ; SI-NEXT: v_alignbit_b32 v0, s4, s4, 8
28 ; SI-NEXT: v_alignbit_b32 v1, s4, s4, 24
29 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
30 ; SI-NEXT: v_bfi_b32 v0, s4, v1, v0
31 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
32 ; SI-NEXT: s_endpgm
55 ; SI-LABEL: test_bswap_v2i32:
56 ; SI: ; %bb.0:
57 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
58 ; SI-NEXT: s_waitcnt lgkmcnt(0)
59 ; SI-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
60 ; SI-NEXT: s_mov_b32 s3, 0xf000
61 ; SI-NEXT: s_mov_b32 s2, -1
62 ; SI-NEXT: s_mov_b32 s6, 0xff00ff
63 ; SI-NEXT: s_waitcnt lgkmcnt(0)
64 ; SI-NEXT: v_alignbit_b32 v0, s5, s5, 8
65 ; SI-NEXT: v_alignbit_b32 v1, s5, s5, 24
66 ; SI-NEXT: v_alignbit_b32 v2, s4, s4, 8
67 ; SI-NEXT: v_alignbit_b32 v3, s4, s4, 24
68 ; SI-NEXT: v_bfi_b32 v1, s6, v1, v0
69 ; SI-NEXT: v_bfi_b32 v0, s6, v3, v2
70 ; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
71 ; SI-NEXT: s_endpgm
95 ; SI-LABEL: test_bswap_v4i32:
96 ; SI: ; %bb.0:
97 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
98 ; SI-NEXT: s_waitcnt lgkmcnt(0)
99 ; SI-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
100 ; SI-NEXT: s_mov_b32 s3, 0xf000
101 ; SI-NEXT: s_mov_b32 s2, -1
102 ; SI-NEXT: s_mov_b32 s8, 0xff00ff
103 ; SI-NEXT: s_waitcnt lgkmcnt(0)
104 ; SI-NEXT: v_alignbit_b32 v0, s7, s7, 8
105 ; SI-NEXT: v_alignbit_b32 v1, s7, s7, 24
106 ; SI-NEXT: v_alignbit_b32 v2, s6, s6, 8
107 ; SI-NEXT: v_alignbit_b32 v4, s6, s6, 24
108 ; SI-NEXT: v_alignbit_b32 v5, s5, s5, 8
109 ; SI-NEXT: v_alignbit_b32 v6, s5, s5, 24
110 ; SI-NEXT: v_alignbit_b32 v7, s4, s4, 8
111 ; SI-NEXT: v_alignbit_b32 v8, s4, s4, 24
112 ; SI-NEXT: v_bfi_b32 v3, s8, v1, v0
113 ; SI-NEXT: v_bfi_b32 v2, s8, v4, v2
114 ; SI-NEXT: v_bfi_b32 v1, s8, v6, v5
115 ; SI-NEXT: v_bfi_b32 v0, s8, v8, v7
116 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
117 ; SI-NEXT: s_endpgm
143 ; SI-LABEL: test_bswap_v8i32:
144 ; SI: ; %bb.0:
145 ; SI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
146 ; SI-NEXT: s_waitcnt lgkmcnt(0)
147 ; SI-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
148 ; SI-NEXT: s_mov_b32 s11, 0xf000
149 ; SI-NEXT: s_mov_b32 s10, -1
150 ; SI-NEXT: s_mov_b32 s12, 0xff00ff
151 ; SI-NEXT: s_waitcnt lgkmcnt(0)
152 ; SI-NEXT: v_alignbit_b32 v0, s3, s3, 8
153 ; SI-NEXT: v_alignbit_b32 v1, s3, s3, 24
154 ; SI-NEXT: v_alignbit_b32 v2, s2, s2, 8
155 ; SI-NEXT: v_alignbit_b32 v4, s2, s2, 24
156 ; SI-NEXT: v_alignbit_b32 v5, s1, s1, 8
157 ; SI-NEXT: v_alignbit_b32 v6, s1, s1, 24
158 ; SI-NEXT: v_alignbit_b32 v7, s0, s0, 8
159 ; SI-NEXT: v_alignbit_b32 v8, s0, s0, 24
160 ; SI-NEXT: v_alignbit_b32 v9, s7, s7, 8
161 ; SI-NEXT: v_alignbit_b32 v10, s7, s7, 24
162 ; SI-NEXT: v_alignbit_b32 v11, s6, s6, 8
163 ; SI-NEXT: v_alignbit_b32 v12, s6, s6, 24
164 ; SI-NEXT: v_alignbit_b32 v13, s5, s5, 8
165 ; SI-NEXT: v_alignbit_b32 v14, s5, s5, 24
166 ; SI-NEXT: v_alignbit_b32 v15, s4, s4, 8
167 ; SI-NEXT: v_alignbit_b32 v16, s4, s4, 24
168 ; SI-NEXT: v_bfi_b32 v3, s12, v1, v0
169 ; SI-NEXT: v_bfi_b32 v2, s12, v4, v2
170 ; SI-NEXT: v_bfi_b32 v1, s12, v6, v5
171 ; SI-NEXT: v_bfi_b32 v0, s12, v8, v7
172 ; SI-NEXT: v_bfi_b32 v7, s12, v10, v9
173 ; SI-NEXT: v_bfi_b32 v6, s12, v12, v11
174 ; SI-NEXT: v_bfi_b32 v5, s12, v14, v13
175 ; SI-NEXT: v_bfi_b32 v4, s12, v16, v15
176 ; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[8:11], 0 offset:16
177 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
178 ; SI-NEXT: s_endpgm
209 ; SI-LABEL: test_bswap_i64:
210 ; SI: ; %bb.0:
211 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
212 ; SI-NEXT: s_waitcnt lgkmcnt(0)
213 ; SI-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
214 ; SI-NEXT: s_mov_b32 s3, 0xf000
215 ; SI-NEXT: s_mov_b32 s2, -1
216 ; SI-NEXT: s_mov_b32 s6, 0xff00ff
217 ; SI-NEXT: s_waitcnt lgkmcnt(0)
218 ; SI-NEXT: v_alignbit_b32 v0, s4, s4, 8
219 ; SI-NEXT: v_alignbit_b32 v1, s4, s4, 24
220 ; SI-NEXT: v_alignbit_b32 v2, s5, s5, 8
221 ; SI-NEXT: v_alignbit_b32 v3, s5, s5, 24
222 ; SI-NEXT: v_bfi_b32 v1, s6, v1, v0
223 ; SI-NEXT: v_bfi_b32 v0, s6, v3, v2
224 ; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
225 ; SI-NEXT: s_endpgm
249 ; SI-LABEL: test_bswap_v2i64:
250 ; SI: ; %bb.0:
251 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
252 ; SI-NEXT: s_waitcnt lgkmcnt(0)
253 ; SI-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
254 ; SI-NEXT: s_mov_b32 s3, 0xf000
255 ; SI-NEXT: s_mov_b32 s2, -1
256 ; SI-NEXT: s_mov_b32 s8, 0xff00ff
257 ; SI-NEXT: s_waitcnt lgkmcnt(0)
258 ; SI-NEXT: v_alignbit_b32 v0, s6, s6, 8
259 ; SI-NEXT: v_alignbit_b32 v1, s6, s6, 24
260 ; SI-NEXT: v_alignbit_b32 v2, s7, s7, 8
261 ; SI-NEXT: v_alignbit_b32 v4, s7, s7, 24
262 ; SI-NEXT: v_alignbit_b32 v5, s4, s4, 8
263 ; SI-NEXT: v_alignbit_b32 v6, s4, s4, 24
264 ; SI-NEXT: v_alignbit_b32 v7, s5, s5, 8
265 ; SI-NEXT: v_alignbit_b32 v8, s5, s5, 24
266 ; SI-NEXT: v_bfi_b32 v3, s8, v1, v0
267 ; SI-NEXT: v_bfi_b32 v2, s8, v4, v2
268 ; SI-NEXT: v_bfi_b32 v1, s8, v6, v5
269 ; SI-NEXT: v_bfi_b32 v0, s8, v8, v7
270 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
271 ; SI-NEXT: s_endpgm
297 ; SI-LABEL: test_bswap_v4i64:
298 ; SI: ; %bb.0:
299 ; SI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
300 ; SI-NEXT: s_waitcnt lgkmcnt(0)
301 ; SI-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
302 ; SI-NEXT: s_mov_b32 s11, 0xf000
303 ; SI-NEXT: s_mov_b32 s10, -1
304 ; SI-NEXT: s_mov_b32 s12, 0xff00ff
305 ; SI-NEXT: s_waitcnt lgkmcnt(0)
306 ; SI-NEXT: v_alignbit_b32 v0, s2, s2, 8
307 ; SI-NEXT: v_alignbit_b32 v1, s2, s2, 24
308 ; SI-NEXT: v_alignbit_b32 v2, s3, s3, 8
309 ; SI-NEXT: v_alignbit_b32 v4, s3, s3, 24
310 ; SI-NEXT: v_alignbit_b32 v5, s0, s0, 8
311 ; SI-NEXT: v_alignbit_b32 v6, s0, s0, 24
312 ; SI-NEXT: v_alignbit_b32 v7, s1, s1, 8
313 ; SI-NEXT: v_alignbit_b32 v8, s1, s1, 24
314 ; SI-NEXT: v_alignbit_b32 v9, s6, s6, 8
315 ; SI-NEXT: v_alignbit_b32 v10, s6, s6, 24
316 ; SI-NEXT: v_alignbit_b32 v11, s7, s7, 8
317 ; SI-NEXT: v_alignbit_b32 v12, s7, s7, 24
318 ; SI-NEXT: v_alignbit_b32 v13, s4, s4, 8
319 ; SI-NEXT: v_alignbit_b32 v14, s4, s4, 24
320 ; SI-NEXT: v_alignbit_b32 v15, s5, s5, 8
321 ; SI-NEXT: v_alignbit_b32 v16, s5, s5, 24
322 ; SI-NEXT: v_bfi_b32 v3, s12, v1, v0
323 ; SI-NEXT: v_bfi_b32 v2, s12, v4, v2
324 ; SI-NEXT: v_bfi_b32 v1, s12, v6, v5
325 ; SI-NEXT: v_bfi_b32 v0, s12, v8, v7
326 ; SI-NEXT: v_bfi_b32 v7, s12, v10, v9
327 ; SI-NEXT: v_bfi_b32 v6, s12, v12, v11
328 ; SI-NEXT: v_bfi_b32 v5, s12, v14, v13
329 ; SI-NEXT: v_bfi_b32 v4, s12, v16, v15
330 ; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[8:11], 0 offset:16
331 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
332 ; SI-NEXT: s_endpgm
363 ; SI-LABEL: missing_truncate_promote_bswap:
364 ; SI: ; %bb.0: ; %bb
365 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
366 ; SI-NEXT: v_alignbit_b32 v1, v0, v0, 8
367 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
368 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
369 ; SI-NEXT: v_bfi_b32 v0, s4, v0, v1
370 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
371 ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
372 ; SI-NEXT: s_setpc_b64 s[30:31]
390 ; SI-LABEL: v_bswap_i16:
391 ; SI: ; %bb.0:
392 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
393 ; SI-NEXT: v_alignbit_b32 v1, v0, v0, 8
394 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
395 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
396 ; SI-NEXT: v_bfi_b32 v0, s4, v0, v1
397 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
398 ; SI-NEXT: s_setpc_b64 s[30:31]
411 ; SI-LABEL: v_bswap_i16_zext_to_i32:
412 ; SI: ; %bb.0:
413 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
414 ; SI-NEXT: v_alignbit_b32 v1, v0, v0, 8
415 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
416 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
417 ; SI-NEXT: v_bfi_b32 v0, s4, v0, v1
418 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
419 ; SI-NEXT: s_setpc_b64 s[30:31]
433 ; SI-LABEL: v_bswap_i16_sext_to_i32:
434 ; SI: ; %bb.0:
435 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
436 ; SI-NEXT: v_alignbit_b32 v1, v0, v0, 8
437 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
438 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
439 ; SI-NEXT: v_bfi_b32 v0, s4, v0, v1
440 ; SI-NEXT: v_ashrrev_i32_e32 v0, 16, v0
441 ; SI-NEXT: s_setpc_b64 s[30:31]
456 ; SI-LABEL: v_bswap_v2i16:
457 ; SI: ; %bb.0:
458 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
459 ; SI-NEXT: v_alignbit_b32 v2, v1, v1, 8
460 ; SI-NEXT: v_alignbit_b32 v1, v1, v1, 24
461 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
462 ; SI-NEXT: v_alignbit_b32 v3, v0, v0, 8
463 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
464 ; SI-NEXT: v_bfi_b32 v1, s4, v1, v2
465 ; SI-NEXT: v_bfi_b32 v0, s4, v0, v3
466 ; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
467 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
468 ; SI-NEXT: v_or_b32_e32 v0, v0, v1
469 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0
470 ; SI-NEXT: s_setpc_b64 s[30:31]
483 ; SI-LABEL: v_bswap_v3i16:
484 ; SI: ; %bb.0:
485 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
486 ; SI-NEXT: v_alignbit_b32 v3, v1, v1, 8
487 ; SI-NEXT: v_alignbit_b32 v1, v1, v1, 24
488 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
489 ; SI-NEXT: v_alignbit_b32 v4, v0, v0, 8
490 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
491 ; SI-NEXT: v_alignbit_b32 v5, v2, v2, 8
492 ; SI-NEXT: v_alignbit_b32 v2, v2, v2, 24
493 ; SI-NEXT: v_bfi_b32 v1, s4, v1, v3
494 ; SI-NEXT: v_bfi_b32 v0, s4, v0, v4
495 ; SI-NEXT: v_bfi_b32 v2, s4, v2, v5
496 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
497 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
498 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
499 ; SI-NEXT: v_or_b32_e32 v0, v0, v3
500 ; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16
501 ; SI-NEXT: s_setpc_b64 s[30:31]
515 ; SI-LABEL: v_bswap_v4i16:
516 ; SI: ; %bb.0:
517 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
518 ; SI-NEXT: v_alignbit_b32 v4, v1, v1, 8
519 ; SI-NEXT: v_alignbit_b32 v1, v1, v1, 24
520 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
521 ; SI-NEXT: v_alignbit_b32 v5, v0, v0, 8
522 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
523 ; SI-NEXT: v_alignbit_b32 v6, v3, v3, 8
524 ; SI-NEXT: v_alignbit_b32 v3, v3, v3, 24
525 ; SI-NEXT: v_alignbit_b32 v7, v2, v2, 8
526 ; SI-NEXT: v_alignbit_b32 v2, v2, v2, 24
527 ; SI-NEXT: v_bfi_b32 v1, s4, v1, v4
528 ; SI-NEXT: v_bfi_b32 v0, s4, v0, v5
529 ; SI-NEXT: v_bfi_b32 v3, s4, v3, v6
530 ; SI-NEXT: v_bfi_b32 v2, s4, v2, v7
531 ; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v1
532 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
533 ; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
534 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
535 ; SI-NEXT: v_or_b32_e32 v0, v0, v4
536 ; SI-NEXT: v_or_b32_e32 v2, v2, v3
537 ; SI-NEXT: v_alignbit_b32 v1, v2, v1, 16
538 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
539 ; SI-NEXT: s_setpc_b64 s[30:31]
553 ; SI-LABEL: v_bswap_i48:
554 ; SI: ; %bb.0:
555 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
556 ; SI-NEXT: v_alignbit_b32 v2, v0, v0, 8
557 ; SI-NEXT: v_alignbit_b32 v0, v0, v0, 24
558 ; SI-NEXT: s_mov_b32 s4, 0xff00ff
559 ; SI-NEXT: v_alignbit_b32 v3, v1, v1, 8
560 ; SI-NEXT: v_alignbit_b32 v1, v1, v1, 24
561 ; SI-NEXT: v_bfi_b32 v2, s4, v0, v2
562 ; SI-NEXT: v_bfi_b32 v0, s4, v1, v3
563 ; SI-NEXT: v_alignbit_b32 v0, v2, v0, 16
564 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
565 ; SI-NEXT: s_setpc_b64 s[30:31]