Lines Matching refs:i33
586 define i33 @smul24_i33(i33 %lhs, i33 %rhs) {
588 ; SI-NEXT: [[SHL_LHS:%.*]] = shl i33 [[LHS:%.*]], 9
589 ; SI-NEXT: [[LHS24:%.*]] = ashr i33 [[SHL_LHS]], 9
590 ; SI-NEXT: [[SHL_RHS:%.*]] = shl i33 [[RHS:%.*]], 9
591 ; SI-NEXT: [[RHS24:%.*]] = ashr i33 [[SHL_RHS]], 9
592 ; SI-NEXT: [[TMP1:%.*]] = trunc i33 [[LHS24]] to i32
593 ; SI-NEXT: [[TMP2:%.*]] = trunc i33 [[RHS24]] to i32
600 ; SI-NEXT: [[MUL:%.*]] = trunc i64 [[TMP8]] to i33
601 ; SI-NEXT: ret i33 [[MUL]]
604 ; VI-NEXT: [[SHL_LHS:%.*]] = shl i33 [[LHS:%.*]], 9
605 ; VI-NEXT: [[LHS24:%.*]] = ashr i33 [[SHL_LHS]], 9
606 ; VI-NEXT: [[SHL_RHS:%.*]] = shl i33 [[RHS:%.*]], 9
607 ; VI-NEXT: [[RHS24:%.*]] = ashr i33 [[SHL_RHS]], 9
608 ; VI-NEXT: [[TMP1:%.*]] = trunc i33 [[LHS24]] to i32
609 ; VI-NEXT: [[TMP2:%.*]] = trunc i33 [[RHS24]] to i32
616 ; VI-NEXT: [[MUL:%.*]] = trunc i64 [[TMP8]] to i33
617 ; VI-NEXT: ret i33 [[MUL]]
620 ; DISABLED-NEXT: [[SHL_LHS:%.*]] = shl i33 [[LHS:%.*]], 9
621 ; DISABLED-NEXT: [[LHS24:%.*]] = ashr i33 [[SHL_LHS]], 9
622 ; DISABLED-NEXT: [[SHL_RHS:%.*]] = shl i33 [[RHS:%.*]], 9
623 ; DISABLED-NEXT: [[RHS24:%.*]] = ashr i33 [[SHL_RHS]], 9
624 ; DISABLED-NEXT: [[MUL:%.*]] = mul i33 [[LHS24]], [[RHS24]]
625 ; DISABLED-NEXT: ret i33 [[MUL]]
627 %shl.lhs = shl i33 %lhs, 9
628 %lhs24 = ashr i33 %shl.lhs, 9
629 %shl.rhs = shl i33 %rhs, 9
630 %rhs24 = ashr i33 %shl.rhs, 9
631 %mul = mul i33 %lhs24, %rhs24
632 ret i33 %mul
635 define i33 @umul24_i33(i33 %lhs, i33 %rhs) {
637 ; SI-NEXT: [[LHS24:%.*]] = and i33 [[LHS:%.*]], 16777215
638 ; SI-NEXT: [[RHS24:%.*]] = and i33 [[RHS:%.*]], 16777215
639 ; SI-NEXT: [[TMP1:%.*]] = trunc i33 [[LHS24]] to i32
640 ; SI-NEXT: [[TMP2:%.*]] = trunc i33 [[RHS24]] to i32
647 ; SI-NEXT: [[MUL:%.*]] = trunc i64 [[TMP8]] to i33
648 ; SI-NEXT: ret i33 [[MUL]]
651 ; VI-NEXT: [[LHS24:%.*]] = and i33 [[LHS:%.*]], 16777215
652 ; VI-NEXT: [[RHS24:%.*]] = and i33 [[RHS:%.*]], 16777215
653 ; VI-NEXT: [[TMP1:%.*]] = trunc i33 [[LHS24]] to i32
654 ; VI-NEXT: [[TMP2:%.*]] = trunc i33 [[RHS24]] to i32
661 ; VI-NEXT: [[MUL:%.*]] = trunc i64 [[TMP8]] to i33
662 ; VI-NEXT: ret i33 [[MUL]]
665 ; DISABLED-NEXT: [[LHS24:%.*]] = and i33 [[LHS:%.*]], 16777215
666 ; DISABLED-NEXT: [[RHS24:%.*]] = and i33 [[RHS:%.*]], 16777215
667 ; DISABLED-NEXT: [[MUL:%.*]] = mul i33 [[LHS24]], [[RHS24]]
668 ; DISABLED-NEXT: ret i33 [[MUL]]
670 %lhs24 = and i33 %lhs, 16777215
671 %rhs24 = and i33 %rhs, 16777215
672 %mul = mul i33 %lhs24, %rhs24
673 ret i33 %mul
734 define <2 x i33> @smul24_v2i33(<2 x i33> %lhs, <2 x i33> %rhs) {
736 ; SI-NEXT: [[SHL_LHS:%.*]] = shl <2 x i33> [[LHS:%.*]], <i33 9, i33 9>
737 ; SI-NEXT: [[LHS24:%.*]] = ashr <2 x i33> [[SHL_LHS]], <i33 9, i33 9>
738 ; SI-NEXT: [[SHL_RHS:%.*]] = shl <2 x i33> [[RHS:%.*]], <i33 9, i33 9>
739 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i33> [[SHL_RHS]], <i33 9, i33 9>
740 ; SI-NEXT: [[TMP1:%.*]] = extractelement <2 x i33> [[LHS24]], i64 0
741 ; SI-NEXT: [[TMP2:%.*]] = extractelement <2 x i33> [[LHS24]], i64 1
742 ; SI-NEXT: [[TMP3:%.*]] = extractelement <2 x i33> [[RHS24]], i64 0
743 ; SI-NEXT: [[TMP4:%.*]] = extractelement <2 x i33> [[RHS24]], i64 1
744 ; SI-NEXT: [[TMP5:%.*]] = trunc i33 [[TMP1]] to i32
745 ; SI-NEXT: [[TMP6:%.*]] = trunc i33 [[TMP3]] to i32
752 ; SI-NEXT: [[TMP13:%.*]] = trunc i64 [[TMP12]] to i33
753 ; SI-NEXT: [[TMP14:%.*]] = trunc i33 [[TMP2]] to i32
754 ; SI-NEXT: [[TMP15:%.*]] = trunc i33 [[TMP4]] to i32
761 ; SI-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i33
762 ; SI-NEXT: [[TMP23:%.*]] = insertelement <2 x i33> undef, i33 [[TMP13]], i64 0
763 ; SI-NEXT: [[MUL:%.*]] = insertelement <2 x i33> [[TMP23]], i33 [[TMP22]], i64 1
764 ; SI-NEXT: ret <2 x i33> [[MUL]]
767 ; VI-NEXT: [[SHL_LHS:%.*]] = shl <2 x i33> [[LHS:%.*]], <i33 9, i33 9>
768 ; VI-NEXT: [[LHS24:%.*]] = ashr <2 x i33> [[SHL_LHS]], <i33 9, i33 9>
769 ; VI-NEXT: [[SHL_RHS:%.*]] = shl <2 x i33> [[RHS:%.*]], <i33 9, i33 9>
770 ; VI-NEXT: [[RHS24:%.*]] = ashr <2 x i33> [[SHL_RHS]], <i33 9, i33 9>
771 ; VI-NEXT: [[TMP1:%.*]] = extractelement <2 x i33> [[LHS24]], i64 0
772 ; VI-NEXT: [[TMP2:%.*]] = extractelement <2 x i33> [[LHS24]], i64 1
773 ; VI-NEXT: [[TMP3:%.*]] = extractelement <2 x i33> [[RHS24]], i64 0
774 ; VI-NEXT: [[TMP4:%.*]] = extractelement <2 x i33> [[RHS24]], i64 1
775 ; VI-NEXT: [[TMP5:%.*]] = trunc i33 [[TMP1]] to i32
776 ; VI-NEXT: [[TMP6:%.*]] = trunc i33 [[TMP3]] to i32
783 ; VI-NEXT: [[TMP13:%.*]] = trunc i64 [[TMP12]] to i33
784 ; VI-NEXT: [[TMP14:%.*]] = trunc i33 [[TMP2]] to i32
785 ; VI-NEXT: [[TMP15:%.*]] = trunc i33 [[TMP4]] to i32
792 ; VI-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i33
793 ; VI-NEXT: [[TMP23:%.*]] = insertelement <2 x i33> undef, i33 [[TMP13]], i64 0
794 ; VI-NEXT: [[MUL:%.*]] = insertelement <2 x i33> [[TMP23]], i33 [[TMP22]], i64 1
795 ; VI-NEXT: ret <2 x i33> [[MUL]]
798 ; DISABLED-NEXT: [[SHL_LHS:%.*]] = shl <2 x i33> [[LHS:%.*]], <i33 9, i33 9>
799 ; DISABLED-NEXT: [[LHS24:%.*]] = ashr <2 x i33> [[SHL_LHS]], <i33 9, i33 9>
800 ; DISABLED-NEXT: [[SHL_RHS:%.*]] = shl <2 x i33> [[RHS:%.*]], <i33 9, i33 9>
801 ; DISABLED-NEXT: [[RHS24:%.*]] = ashr <2 x i33> [[SHL_RHS]], <i33 9, i33 9>
802 ; DISABLED-NEXT: [[MUL:%.*]] = mul <2 x i33> [[LHS24]], [[RHS24]]
803 ; DISABLED-NEXT: ret <2 x i33> [[MUL]]
805 %shl.lhs = shl <2 x i33> %lhs, <i33 9, i33 9>
806 %lhs24 = ashr <2 x i33> %shl.lhs, <i33 9, i33 9>
807 %shl.rhs = shl <2 x i33> %rhs, <i33 9, i33 9>
808 %rhs24 = ashr <2 x i33> %shl.rhs, <i33 9, i33 9>
809 %mul = mul <2 x i33> %lhs24, %rhs24
810 ret <2 x i33> %mul