Lines Matching refs:GFX9
4 …llc -mtriple=amdgcn-- -mcpu=gfx900 -amdgpu-bypass-slow-div=0 < %s | FileCheck -check-prefix=GFX9 %s
70 ; GFX9-LABEL: udiv_i32:
71 ; GFX9: ; %bb.0:
72 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
73 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
74 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
75 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
76 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
77 ; GFX9-NEXT: s_sub_i32 s4, 0, s3
78 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
79 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
80 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
81 ; GFX9-NEXT: v_mul_lo_u32 v1, s4, v0
82 ; GFX9-NEXT: v_mul_hi_u32 v1, v0, v1
83 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
84 ; GFX9-NEXT: v_mul_hi_u32 v0, s2, v0
85 ; GFX9-NEXT: v_mul_lo_u32 v1, v0, s3
86 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
87 ; GFX9-NEXT: v_sub_u32_e32 v1, s2, v1
88 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v1
89 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
90 ; GFX9-NEXT: v_subrev_u32_e32 v3, s3, v1
91 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
92 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
93 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v1
94 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
95 ; GFX9-NEXT: global_store_dword v2, v0, s[0:1]
96 ; GFX9-NEXT: s_endpgm
161 ; GFX9-LABEL: urem_i32:
162 ; GFX9: ; %bb.0:
163 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
164 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
165 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
166 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
167 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
168 ; GFX9-NEXT: s_sub_i32 s4, 0, s3
169 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
170 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
171 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
172 ; GFX9-NEXT: v_readfirstlane_b32 s5, v0
173 ; GFX9-NEXT: s_mul_i32 s4, s4, s5
174 ; GFX9-NEXT: s_mul_hi_u32 s4, s5, s4
175 ; GFX9-NEXT: s_add_i32 s5, s5, s4
176 ; GFX9-NEXT: s_mul_hi_u32 s4, s2, s5
177 ; GFX9-NEXT: s_mul_i32 s4, s4, s3
178 ; GFX9-NEXT: s_sub_i32 s2, s2, s4
179 ; GFX9-NEXT: s_sub_i32 s4, s2, s3
180 ; GFX9-NEXT: s_cmp_ge_u32 s2, s3
181 ; GFX9-NEXT: s_cselect_b32 s2, s4, s2
182 ; GFX9-NEXT: s_sub_i32 s4, s2, s3
183 ; GFX9-NEXT: s_cmp_ge_u32 s2, s3
184 ; GFX9-NEXT: s_cselect_b32 s2, s4, s2
185 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
186 ; GFX9-NEXT: global_store_dword v1, v0, s[0:1]
187 ; GFX9-NEXT: s_endpgm
275 ; GFX9-LABEL: sdiv_i32:
276 ; GFX9: ; %bb.0:
277 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
278 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
279 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
280 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
281 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
282 ; GFX9-NEXT: s_add_i32 s3, s3, s4
283 ; GFX9-NEXT: s_xor_b32 s3, s3, s4
284 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
285 ; GFX9-NEXT: s_sub_i32 s5, 0, s3
286 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
287 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
288 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
289 ; GFX9-NEXT: v_mul_lo_u32 v1, s5, v0
290 ; GFX9-NEXT: s_ashr_i32 s5, s2, 31
291 ; GFX9-NEXT: s_add_i32 s2, s2, s5
292 ; GFX9-NEXT: s_xor_b32 s2, s2, s5
293 ; GFX9-NEXT: v_mul_hi_u32 v1, v0, v1
294 ; GFX9-NEXT: s_xor_b32 s4, s5, s4
295 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
296 ; GFX9-NEXT: v_mul_hi_u32 v0, s2, v0
297 ; GFX9-NEXT: v_mul_lo_u32 v1, v0, s3
298 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
299 ; GFX9-NEXT: v_sub_u32_e32 v1, s2, v1
300 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v1
301 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
302 ; GFX9-NEXT: v_subrev_u32_e32 v3, s3, v1
303 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
304 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
305 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v1
306 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
307 ; GFX9-NEXT: v_xor_b32_e32 v0, s4, v0
308 ; GFX9-NEXT: v_subrev_u32_e32 v0, s4, v0
309 ; GFX9-NEXT: global_store_dword v2, v0, s[0:1]
310 ; GFX9-NEXT: s_endpgm
391 ; GFX9-LABEL: srem_i32:
392 ; GFX9: ; %bb.0:
393 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
394 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
395 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
396 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
397 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
398 ; GFX9-NEXT: s_add_i32 s3, s3, s4
399 ; GFX9-NEXT: s_xor_b32 s3, s3, s4
400 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
401 ; GFX9-NEXT: s_sub_i32 s5, 0, s3
402 ; GFX9-NEXT: s_ashr_i32 s4, s2, 31
403 ; GFX9-NEXT: s_add_i32 s2, s2, s4
404 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
405 ; GFX9-NEXT: s_xor_b32 s2, s2, s4
406 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
407 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
408 ; GFX9-NEXT: v_readfirstlane_b32 s6, v0
409 ; GFX9-NEXT: s_mul_i32 s5, s5, s6
410 ; GFX9-NEXT: s_mul_hi_u32 s5, s6, s5
411 ; GFX9-NEXT: s_add_i32 s6, s6, s5
412 ; GFX9-NEXT: s_mul_hi_u32 s5, s2, s6
413 ; GFX9-NEXT: s_mul_i32 s5, s5, s3
414 ; GFX9-NEXT: s_sub_i32 s2, s2, s5
415 ; GFX9-NEXT: s_sub_i32 s5, s2, s3
416 ; GFX9-NEXT: s_cmp_ge_u32 s2, s3
417 ; GFX9-NEXT: s_cselect_b32 s2, s5, s2
418 ; GFX9-NEXT: s_sub_i32 s5, s2, s3
419 ; GFX9-NEXT: s_cmp_ge_u32 s2, s3
420 ; GFX9-NEXT: s_cselect_b32 s2, s5, s2
421 ; GFX9-NEXT: s_xor_b32 s2, s2, s4
422 ; GFX9-NEXT: s_sub_i32 s2, s2, s4
423 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
424 ; GFX9-NEXT: global_store_dword v1, v0, s[0:1]
425 ; GFX9-NEXT: s_endpgm
474 ; GFX9-LABEL: udiv_i16:
475 ; GFX9: ; %bb.0:
476 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c
477 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
478 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
479 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
480 ; GFX9-NEXT: s_lshr_b32 s3, s2, 16
481 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
482 ; GFX9-NEXT: s_and_b32 s2, s2, 0xffff
483 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s2
484 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v0
485 ; GFX9-NEXT: v_mul_f32_e32 v2, v1, v2
486 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
487 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v2
488 ; GFX9-NEXT: v_mad_f32 v1, -v2, v0, v1
489 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
490 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v4, vcc
491 ; GFX9-NEXT: global_store_short v3, v0, s[0:1]
492 ; GFX9-NEXT: s_endpgm
545 ; GFX9-LABEL: urem_i16:
546 ; GFX9: ; %bb.0:
547 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c
548 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
549 ; GFX9-NEXT: s_lshr_b32 s3, s2, 16
550 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
551 ; GFX9-NEXT: s_and_b32 s4, s2, 0xffff
552 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s4
553 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
554 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v0
555 ; GFX9-NEXT: v_mul_f32_e32 v2, v1, v2
556 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
557 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v2
558 ; GFX9-NEXT: v_mad_f32 v1, -v2, v0, v1
559 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
560 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
561 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v3, vcc
562 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s3
563 ; GFX9-NEXT: v_sub_u32_e32 v0, s2, v0
564 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
565 ; GFX9-NEXT: global_store_short v1, v0, s[0:1]
566 ; GFX9-NEXT: s_endpgm
624 ; GFX9-LABEL: sdiv_i16:
625 ; GFX9: ; %bb.0:
626 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
627 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
628 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
629 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
630 ; GFX9-NEXT: s_ashr_i32 s0, s4, 16
631 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s0
632 ; GFX9-NEXT: s_sext_i32_i16 s1, s4
633 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s1
634 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
635 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v0
636 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
637 ; GFX9-NEXT: s_or_b32 s4, s0, 1
638 ; GFX9-NEXT: v_mul_f32_e32 v3, v2, v3
639 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
640 ; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v2
641 ; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3
642 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v2|, |v0|
643 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
644 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
645 ; GFX9-NEXT: v_add_u32_e32 v0, s0, v3
646 ; GFX9-NEXT: global_store_short v1, v0, s[2:3]
647 ; GFX9-NEXT: s_endpgm
709 ; GFX9-LABEL: srem_i16:
710 ; GFX9: ; %bb.0:
711 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
712 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
713 ; GFX9-NEXT: s_ashr_i32 s5, s4, 16
714 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s5
715 ; GFX9-NEXT: s_sext_i32_i16 s2, s4
716 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s2
717 ; GFX9-NEXT: s_xor_b32 s2, s2, s5
718 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v0
719 ; GFX9-NEXT: s_ashr_i32 s2, s2, 30
720 ; GFX9-NEXT: s_or_b32 s6, s2, 1
721 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
722 ; GFX9-NEXT: v_mul_f32_e32 v2, v1, v2
723 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
724 ; GFX9-NEXT: v_mad_f32 v1, -v2, v0, v1
725 ; GFX9-NEXT: v_cvt_i32_f32_e32 v2, v2
726 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[2:3], |v1|, |v0|
727 ; GFX9-NEXT: s_and_b64 s[2:3], s[2:3], exec
728 ; GFX9-NEXT: s_cselect_b32 s2, s6, 0
729 ; GFX9-NEXT: v_add_u32_e32 v0, s2, v2
730 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s5
731 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
732 ; GFX9-NEXT: v_sub_u32_e32 v0, s4, v0
733 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
734 ; GFX9-NEXT: global_store_short v1, v0, s[0:1]
735 ; GFX9-NEXT: s_endpgm
782 ; GFX9-LABEL: udiv_i8:
783 ; GFX9: ; %bb.0:
784 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c
785 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
786 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
787 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
788 ; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v0, s2
789 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0
790 ; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, s2
791 ; GFX9-NEXT: v_mul_f32_e32 v1, v3, v1
792 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
793 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v1
794 ; GFX9-NEXT: v_mad_f32 v1, -v1, v0, v3
795 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
796 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v4, vcc
797 ; GFX9-NEXT: global_store_byte v2, v0, s[0:1]
798 ; GFX9-NEXT: s_endpgm
850 ; GFX9-LABEL: urem_i8:
851 ; GFX9: ; %bb.0:
852 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c
853 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
854 ; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v0, s2
855 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0
856 ; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, s2
857 ; GFX9-NEXT: s_lshr_b32 s3, s2, 8
858 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
859 ; GFX9-NEXT: v_mul_f32_e32 v1, v2, v1
860 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
861 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v1
862 ; GFX9-NEXT: v_mad_f32 v1, -v1, v0, v2
863 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
864 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
865 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v3, vcc
866 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s3
867 ; GFX9-NEXT: v_sub_u32_e32 v0, s2, v0
868 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
869 ; GFX9-NEXT: global_store_byte v1, v0, s[0:1]
870 ; GFX9-NEXT: s_endpgm
928 ; GFX9-LABEL: sdiv_i8:
929 ; GFX9: ; %bb.0:
930 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
931 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
932 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
933 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
934 ; GFX9-NEXT: s_bfe_i32 s0, s4, 0x80008
935 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s0
936 ; GFX9-NEXT: s_sext_i32_i8 s1, s4
937 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s1
938 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
939 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v0
940 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
941 ; GFX9-NEXT: s_or_b32 s4, s0, 1
942 ; GFX9-NEXT: v_mul_f32_e32 v3, v2, v3
943 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
944 ; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v2
945 ; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3
946 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v2|, |v0|
947 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
948 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
949 ; GFX9-NEXT: v_add_u32_e32 v0, s0, v3
950 ; GFX9-NEXT: global_store_byte v1, v0, s[2:3]
951 ; GFX9-NEXT: s_endpgm
1014 ; GFX9-LABEL: srem_i8:
1015 ; GFX9: ; %bb.0:
1016 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
1017 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
1018 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1019 ; GFX9-NEXT: s_bfe_i32 s0, s4, 0x80008
1020 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s0
1021 ; GFX9-NEXT: s_sext_i32_i8 s1, s4
1022 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s1
1023 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
1024 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v0
1025 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
1026 ; GFX9-NEXT: s_lshr_b32 s5, s4, 8
1027 ; GFX9-NEXT: s_or_b32 s6, s0, 1
1028 ; GFX9-NEXT: v_mul_f32_e32 v2, v1, v2
1029 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
1030 ; GFX9-NEXT: v_mad_f32 v1, -v2, v0, v1
1031 ; GFX9-NEXT: v_cvt_i32_f32_e32 v2, v2
1032 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v1|, |v0|
1033 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
1034 ; GFX9-NEXT: s_cselect_b32 s0, s6, 0
1035 ; GFX9-NEXT: v_add_u32_e32 v0, s0, v2
1036 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s5
1037 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
1038 ; GFX9-NEXT: v_sub_u32_e32 v0, s4, v0
1039 ; GFX9-NEXT: global_store_byte v1, v0, s[2:3]
1040 ; GFX9-NEXT: s_endpgm
1265 ; GFX9-LABEL: udiv_v4i32:
1266 ; GFX9: ; %bb.0:
1267 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
1268 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
1269 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
1270 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1271 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s8
1272 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s9
1273 ; GFX9-NEXT: s_sub_i32 s2, 0, s8
1274 ; GFX9-NEXT: s_sub_i32 s3, 0, s9
1275 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
1276 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v1
1277 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s10
1278 ; GFX9-NEXT: v_cvt_f32_u32_e32 v6, s11
1279 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
1280 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
1281 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1
1282 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
1283 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v5
1284 ; GFX9-NEXT: v_mul_lo_u32 v2, s2, v0
1285 ; GFX9-NEXT: s_sub_i32 s2, 0, s10
1286 ; GFX9-NEXT: v_mul_lo_u32 v3, s3, v1
1287 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v6, v6
1288 ; GFX9-NEXT: v_mul_hi_u32 v2, v0, v2
1289 ; GFX9-NEXT: v_mul_hi_u32 v3, v1, v3
1290 ; GFX9-NEXT: v_mul_f32_e32 v6, 0x4f7ffffe, v6
1291 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v2
1292 ; GFX9-NEXT: v_mul_hi_u32 v0, s4, v0
1293 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
1294 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v5
1295 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
1296 ; GFX9-NEXT: v_mul_lo_u32 v3, v0, s8
1297 ; GFX9-NEXT: v_add_u32_e32 v7, 1, v0
1298 ; GFX9-NEXT: v_cvt_u32_f32_e32 v6, v6
1299 ; GFX9-NEXT: v_mul_hi_u32 v1, s5, v1
1300 ; GFX9-NEXT: v_sub_u32_e32 v3, s4, v3
1301 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s8, v3
1302 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc
1303 ; GFX9-NEXT: v_subrev_u32_e32 v7, s8, v3
1304 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc
1305 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s8, v3
1306 ; GFX9-NEXT: v_mul_lo_u32 v3, s2, v2
1307 ; GFX9-NEXT: s_sub_i32 s2, 0, s11
1308 ; GFX9-NEXT: v_mul_lo_u32 v5, v1, s9
1309 ; GFX9-NEXT: v_add_u32_e32 v7, 1, v0
1310 ; GFX9-NEXT: v_mul_hi_u32 v3, v2, v3
1311 ; GFX9-NEXT: v_add_u32_e32 v8, 1, v1
1312 ; GFX9-NEXT: v_sub_u32_e32 v5, s5, v5
1313 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc
1314 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v3
1315 ; GFX9-NEXT: v_mul_lo_u32 v3, s2, v6
1316 ; GFX9-NEXT: v_mul_hi_u32 v2, s6, v2
1317 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s9, v5
1318 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc
1319 ; GFX9-NEXT: v_mul_hi_u32 v3, v6, v3
1320 ; GFX9-NEXT: v_mul_lo_u32 v8, v2, s10
1321 ; GFX9-NEXT: v_subrev_u32_e32 v7, s9, v5
1322 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc
1323 ; GFX9-NEXT: v_add_u32_e32 v3, v6, v3
1324 ; GFX9-NEXT: v_mul_hi_u32 v3, s7, v3
1325 ; GFX9-NEXT: v_add_u32_e32 v7, 1, v1
1326 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s9, v5
1327 ; GFX9-NEXT: v_sub_u32_e32 v5, s6, v8
1328 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc
1329 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s10, v5
1330 ; GFX9-NEXT: v_subrev_u32_e32 v6, s10, v5
1331 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc
1332 ; GFX9-NEXT: v_mul_lo_u32 v6, v3, s11
1333 ; GFX9-NEXT: v_add_u32_e32 v7, 1, v2
1334 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc
1335 ; GFX9-NEXT: v_add_u32_e32 v7, 1, v2
1336 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s10, v5
1337 ; GFX9-NEXT: v_sub_u32_e32 v5, s7, v6
1338 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc
1339 ; GFX9-NEXT: v_add_u32_e32 v6, 1, v3
1340 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s11, v5
1341 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc
1342 ; GFX9-NEXT: v_subrev_u32_e32 v6, s11, v5
1343 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc
1344 ; GFX9-NEXT: v_add_u32_e32 v6, 1, v3
1345 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s11, v5
1346 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc
1347 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
1348 ; GFX9-NEXT: s_endpgm
1557 ; GFX9-LABEL: urem_v4i32:
1558 ; GFX9: ; %bb.0:
1559 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
1560 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
1561 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
1562 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1563 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s8
1564 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s9
1565 ; GFX9-NEXT: s_sub_i32 s2, 0, s8
1566 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s10
1567 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
1568 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v1
1569 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v2
1570 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
1571 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
1572 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1
1573 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
1574 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2
1575 ; GFX9-NEXT: v_readfirstlane_b32 s3, v0
1576 ; GFX9-NEXT: s_mul_i32 s2, s2, s3
1577 ; GFX9-NEXT: s_mul_hi_u32 s2, s3, s2
1578 ; GFX9-NEXT: s_add_i32 s3, s3, s2
1579 ; GFX9-NEXT: s_mul_hi_u32 s2, s4, s3
1580 ; GFX9-NEXT: s_mul_i32 s2, s2, s8
1581 ; GFX9-NEXT: s_sub_i32 s2, s4, s2
1582 ; GFX9-NEXT: s_sub_i32 s3, s2, s8
1583 ; GFX9-NEXT: s_cmp_ge_u32 s2, s8
1584 ; GFX9-NEXT: s_cselect_b32 s2, s3, s2
1585 ; GFX9-NEXT: s_sub_i32 s3, s2, s8
1586 ; GFX9-NEXT: s_cmp_ge_u32 s2, s8
1587 ; GFX9-NEXT: v_readfirstlane_b32 s12, v1
1588 ; GFX9-NEXT: s_cselect_b32 s2, s3, s2
1589 ; GFX9-NEXT: s_sub_i32 s3, 0, s9
1590 ; GFX9-NEXT: s_mul_i32 s3, s3, s12
1591 ; GFX9-NEXT: s_mul_hi_u32 s3, s12, s3
1592 ; GFX9-NEXT: s_add_i32 s12, s12, s3
1593 ; GFX9-NEXT: s_mul_hi_u32 s3, s5, s12
1594 ; GFX9-NEXT: s_mul_i32 s3, s3, s9
1595 ; GFX9-NEXT: s_sub_i32 s3, s5, s3
1596 ; GFX9-NEXT: s_sub_i32 s4, s3, s9
1597 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
1598 ; GFX9-NEXT: s_cmp_ge_u32 s3, s9
1599 ; GFX9-NEXT: s_cselect_b32 s3, s4, s3
1600 ; GFX9-NEXT: s_sub_i32 s4, s3, s9
1601 ; GFX9-NEXT: s_cmp_ge_u32 s3, s9
1602 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s11
1603 ; GFX9-NEXT: s_cselect_b32 s3, s4, s3
1604 ; GFX9-NEXT: s_sub_i32 s4, 0, s10
1605 ; GFX9-NEXT: v_readfirstlane_b32 s5, v2
1606 ; GFX9-NEXT: s_mul_i32 s4, s4, s5
1607 ; GFX9-NEXT: s_mul_hi_u32 s4, s5, s4
1608 ; GFX9-NEXT: s_add_i32 s5, s5, s4
1609 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
1610 ; GFX9-NEXT: s_mul_hi_u32 s4, s6, s5
1611 ; GFX9-NEXT: s_mul_i32 s4, s4, s10
1612 ; GFX9-NEXT: s_sub_i32 s4, s6, s4
1613 ; GFX9-NEXT: s_sub_i32 s5, s4, s10
1614 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
1615 ; GFX9-NEXT: s_cmp_ge_u32 s4, s10
1616 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
1617 ; GFX9-NEXT: s_cselect_b32 s4, s5, s4
1618 ; GFX9-NEXT: s_sub_i32 s5, s4, s10
1619 ; GFX9-NEXT: s_cmp_ge_u32 s4, s10
1620 ; GFX9-NEXT: s_cselect_b32 s4, s5, s4
1621 ; GFX9-NEXT: s_sub_i32 s5, 0, s11
1622 ; GFX9-NEXT: v_readfirstlane_b32 s6, v0
1623 ; GFX9-NEXT: s_mul_i32 s5, s5, s6
1624 ; GFX9-NEXT: s_mul_hi_u32 s5, s6, s5
1625 ; GFX9-NEXT: s_add_i32 s6, s6, s5
1626 ; GFX9-NEXT: s_mul_hi_u32 s5, s7, s6
1627 ; GFX9-NEXT: s_mul_i32 s5, s5, s11
1628 ; GFX9-NEXT: s_sub_i32 s5, s7, s5
1629 ; GFX9-NEXT: s_sub_i32 s6, s5, s11
1630 ; GFX9-NEXT: s_cmp_ge_u32 s5, s11
1631 ; GFX9-NEXT: s_cselect_b32 s5, s6, s5
1632 ; GFX9-NEXT: s_sub_i32 s6, s5, s11
1633 ; GFX9-NEXT: s_cmp_ge_u32 s5, s11
1634 ; GFX9-NEXT: s_cselect_b32 s5, s6, s5
1635 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
1636 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
1637 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
1638 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
1639 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
1640 ; GFX9-NEXT: s_endpgm
1937 ; GFX9-LABEL: sdiv_v4i32:
1938 ; GFX9: ; %bb.0:
1939 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
1940 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
1941 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
1942 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1943 ; GFX9-NEXT: s_ashr_i32 s2, s8, 31
1944 ; GFX9-NEXT: s_add_i32 s3, s8, s2
1945 ; GFX9-NEXT: s_xor_b32 s3, s3, s2
1946 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
1947 ; GFX9-NEXT: s_ashr_i32 s12, s9, 31
1948 ; GFX9-NEXT: s_add_i32 s9, s9, s12
1949 ; GFX9-NEXT: s_xor_b32 s9, s9, s12
1950 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
1951 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s9
1952 ; GFX9-NEXT: s_sub_i32 s14, 0, s3
1953 ; GFX9-NEXT: s_ashr_i32 s8, s4, 31
1954 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
1955 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
1956 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v1
1957 ; GFX9-NEXT: s_add_i32 s4, s4, s8
1958 ; GFX9-NEXT: s_xor_b32 s4, s4, s8
1959 ; GFX9-NEXT: v_mul_lo_u32 v2, s14, v0
1960 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1
1961 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
1962 ; GFX9-NEXT: s_sub_i32 s14, 0, s9
1963 ; GFX9-NEXT: v_mul_hi_u32 v2, v0, v2
1964 ; GFX9-NEXT: s_ashr_i32 s13, s5, 31
1965 ; GFX9-NEXT: v_mul_lo_u32 v3, s14, v1
1966 ; GFX9-NEXT: s_add_i32 s5, s5, s13
1967 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v2
1968 ; GFX9-NEXT: v_mul_hi_u32 v0, s4, v0
1969 ; GFX9-NEXT: v_mul_hi_u32 v2, v1, v3
1970 ; GFX9-NEXT: s_xor_b32 s5, s5, s13
1971 ; GFX9-NEXT: s_xor_b32 s2, s8, s2
1972 ; GFX9-NEXT: v_mul_lo_u32 v3, v0, s3
1973 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v2
1974 ; GFX9-NEXT: v_add_u32_e32 v2, 1, v0
1975 ; GFX9-NEXT: v_mul_hi_u32 v1, s5, v1
1976 ; GFX9-NEXT: v_sub_u32_e32 v3, s4, v3
1977 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v3
1978 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
1979 ; GFX9-NEXT: v_subrev_u32_e32 v2, s3, v3
1980 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
1981 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v2
1982 ; GFX9-NEXT: s_ashr_i32 s3, s10, 31
1983 ; GFX9-NEXT: s_add_i32 s4, s10, s3
1984 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
1985 ; GFX9-NEXT: s_xor_b32 s4, s4, s3
1986 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
1987 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s4
1988 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, s9
1989 ; GFX9-NEXT: v_add_u32_e32 v5, 1, v1
1990 ; GFX9-NEXT: s_ashr_i32 s8, s11, 31
1991 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v3
1992 ; GFX9-NEXT: v_sub_u32_e32 v2, s5, v2
1993 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s9, v2
1994 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
1995 ; GFX9-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3
1996 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v3
1997 ; GFX9-NEXT: v_subrev_u32_e32 v5, s9, v2
1998 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc
1999 ; GFX9-NEXT: s_sub_i32 s5, 0, s4
2000 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s9, v2
2001 ; GFX9-NEXT: v_mul_lo_u32 v2, s5, v3
2002 ; GFX9-NEXT: s_add_i32 s9, s11, s8
2003 ; GFX9-NEXT: v_add_u32_e32 v5, 1, v1
2004 ; GFX9-NEXT: s_xor_b32 s9, s9, s8
2005 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
2006 ; GFX9-NEXT: v_mul_hi_u32 v2, v3, v2
2007 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s9
2008 ; GFX9-NEXT: s_ashr_i32 s5, s6, 31
2009 ; GFX9-NEXT: s_add_i32 s6, s6, s5
2010 ; GFX9-NEXT: v_add_u32_e32 v2, v3, v2
2011 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v5
2012 ; GFX9-NEXT: s_xor_b32 s6, s6, s5
2013 ; GFX9-NEXT: v_mul_hi_u32 v2, s6, v2
2014 ; GFX9-NEXT: v_xor_b32_e32 v0, s2, v0
2015 ; GFX9-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3
2016 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v3
2017 ; GFX9-NEXT: v_subrev_u32_e32 v0, s2, v0
2018 ; GFX9-NEXT: s_xor_b32 s2, s13, s12
2019 ; GFX9-NEXT: v_mul_lo_u32 v5, v2, s4
2020 ; GFX9-NEXT: v_xor_b32_e32 v1, s2, v1
2021 ; GFX9-NEXT: v_subrev_u32_e32 v1, s2, v1
2022 ; GFX9-NEXT: s_xor_b32 s2, s5, s3
2023 ; GFX9-NEXT: s_sub_i32 s3, 0, s9
2024 ; GFX9-NEXT: v_mul_lo_u32 v7, s3, v3
2025 ; GFX9-NEXT: v_sub_u32_e32 v5, s6, v5
2026 ; GFX9-NEXT: v_add_u32_e32 v6, 1, v2
2027 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s4, v5
2028 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc
2029 ; GFX9-NEXT: v_subrev_u32_e32 v6, s4, v5
2030 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc
2031 ; GFX9-NEXT: v_mul_hi_u32 v6, v3, v7
2032 ; GFX9-NEXT: s_ashr_i32 s3, s7, 31
2033 ; GFX9-NEXT: s_add_i32 s5, s7, s3
2034 ; GFX9-NEXT: s_xor_b32 s5, s5, s3
2035 ; GFX9-NEXT: v_add_u32_e32 v3, v3, v6
2036 ; GFX9-NEXT: v_mul_hi_u32 v3, s5, v3
2037 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s4, v5
2038 ; GFX9-NEXT: v_add_u32_e32 v6, 1, v2
2039 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc
2040 ; GFX9-NEXT: v_mul_lo_u32 v5, v3, s9
2041 ; GFX9-NEXT: v_add_u32_e32 v6, 1, v3
2042 ; GFX9-NEXT: v_xor_b32_e32 v2, s2, v2
2043 ; GFX9-NEXT: v_subrev_u32_e32 v2, s2, v2
2044 ; GFX9-NEXT: v_sub_u32_e32 v5, s5, v5
2045 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s9, v5
2046 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc
2047 ; GFX9-NEXT: v_subrev_u32_e32 v6, s9, v5
2048 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v5, v6, vcc
2049 ; GFX9-NEXT: v_add_u32_e32 v6, 1, v3
2050 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s9, v5
2051 ; GFX9-NEXT: s_xor_b32 s2, s3, s8
2052 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc
2053 ; GFX9-NEXT: v_xor_b32_e32 v3, s2, v3
2054 ; GFX9-NEXT: v_subrev_u32_e32 v3, s2, v3
2055 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
2056 ; GFX9-NEXT: s_endpgm
2329 ; GFX9-LABEL: srem_v4i32:
2330 ; GFX9: ; %bb.0:
2331 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
2332 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
2333 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
2334 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
2335 ; GFX9-NEXT: s_ashr_i32 s2, s8, 31
2336 ; GFX9-NEXT: s_add_i32 s3, s8, s2
2337 ; GFX9-NEXT: s_xor_b32 s2, s3, s2
2338 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s2
2339 ; GFX9-NEXT: s_sub_i32 s8, 0, s2
2340 ; GFX9-NEXT: s_ashr_i32 s3, s4, 31
2341 ; GFX9-NEXT: s_add_i32 s4, s4, s3
2342 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
2343 ; GFX9-NEXT: s_xor_b32 s4, s4, s3
2344 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
2345 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
2346 ; GFX9-NEXT: v_readfirstlane_b32 s12, v0
2347 ; GFX9-NEXT: s_mul_i32 s8, s8, s12
2348 ; GFX9-NEXT: s_mul_hi_u32 s8, s12, s8
2349 ; GFX9-NEXT: s_add_i32 s12, s12, s8
2350 ; GFX9-NEXT: s_mul_hi_u32 s8, s4, s12
2351 ; GFX9-NEXT: s_mul_i32 s8, s8, s2
2352 ; GFX9-NEXT: s_sub_i32 s4, s4, s8
2353 ; GFX9-NEXT: s_sub_i32 s8, s4, s2
2354 ; GFX9-NEXT: s_cmp_ge_u32 s4, s2
2355 ; GFX9-NEXT: s_cselect_b32 s4, s8, s4
2356 ; GFX9-NEXT: s_sub_i32 s8, s4, s2
2357 ; GFX9-NEXT: s_cmp_ge_u32 s4, s2
2358 ; GFX9-NEXT: s_cselect_b32 s2, s8, s4
2359 ; GFX9-NEXT: s_ashr_i32 s4, s9, 31
2360 ; GFX9-NEXT: s_add_i32 s8, s9, s4
2361 ; GFX9-NEXT: s_xor_b32 s4, s8, s4
2362 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s4
2363 ; GFX9-NEXT: s_ashr_i32 s8, s5, 31
2364 ; GFX9-NEXT: s_xor_b32 s2, s2, s3
2365 ; GFX9-NEXT: s_add_i32 s5, s5, s8
2366 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
2367 ; GFX9-NEXT: s_sub_i32 s2, s2, s3
2368 ; GFX9-NEXT: s_xor_b32 s3, s5, s8
2369 ; GFX9-NEXT: s_sub_i32 s5, 0, s4
2370 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
2371 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
2372 ; GFX9-NEXT: v_readfirstlane_b32 s9, v0
2373 ; GFX9-NEXT: s_mul_i32 s5, s5, s9
2374 ; GFX9-NEXT: s_mul_hi_u32 s5, s9, s5
2375 ; GFX9-NEXT: s_add_i32 s9, s9, s5
2376 ; GFX9-NEXT: s_mul_hi_u32 s5, s3, s9
2377 ; GFX9-NEXT: s_mul_i32 s5, s5, s4
2378 ; GFX9-NEXT: s_sub_i32 s3, s3, s5
2379 ; GFX9-NEXT: s_sub_i32 s5, s3, s4
2380 ; GFX9-NEXT: s_cmp_ge_u32 s3, s4
2381 ; GFX9-NEXT: s_cselect_b32 s3, s5, s3
2382 ; GFX9-NEXT: s_sub_i32 s5, s3, s4
2383 ; GFX9-NEXT: s_cmp_ge_u32 s3, s4
2384 ; GFX9-NEXT: s_cselect_b32 s3, s5, s3
2385 ; GFX9-NEXT: s_ashr_i32 s4, s10, 31
2386 ; GFX9-NEXT: s_add_i32 s5, s10, s4
2387 ; GFX9-NEXT: s_xor_b32 s4, s5, s4
2388 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s4
2389 ; GFX9-NEXT: s_xor_b32 s3, s3, s8
2390 ; GFX9-NEXT: s_sub_i32 s3, s3, s8
2391 ; GFX9-NEXT: s_sub_i32 s8, 0, s4
2392 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
2393 ; GFX9-NEXT: s_ashr_i32 s5, s6, 31
2394 ; GFX9-NEXT: s_add_i32 s6, s6, s5
2395 ; GFX9-NEXT: s_xor_b32 s6, s6, s5
2396 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
2397 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
2398 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
2399 ; GFX9-NEXT: v_readfirstlane_b32 s9, v0
2400 ; GFX9-NEXT: s_mul_i32 s8, s8, s9
2401 ; GFX9-NEXT: s_mul_hi_u32 s8, s9, s8
2402 ; GFX9-NEXT: s_add_i32 s9, s9, s8
2403 ; GFX9-NEXT: s_mul_hi_u32 s8, s6, s9
2404 ; GFX9-NEXT: s_mul_i32 s8, s8, s4
2405 ; GFX9-NEXT: s_sub_i32 s6, s6, s8
2406 ; GFX9-NEXT: s_sub_i32 s8, s6, s4
2407 ; GFX9-NEXT: s_cmp_ge_u32 s6, s4
2408 ; GFX9-NEXT: s_cselect_b32 s6, s8, s6
2409 ; GFX9-NEXT: s_sub_i32 s8, s6, s4
2410 ; GFX9-NEXT: s_cmp_ge_u32 s6, s4
2411 ; GFX9-NEXT: s_cselect_b32 s4, s8, s6
2412 ; GFX9-NEXT: s_ashr_i32 s6, s11, 31
2413 ; GFX9-NEXT: s_add_i32 s8, s11, s6
2414 ; GFX9-NEXT: s_xor_b32 s6, s8, s6
2415 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s6
2416 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
2417 ; GFX9-NEXT: s_ashr_i32 s2, s7, 31
2418 ; GFX9-NEXT: s_xor_b32 s3, s4, s5
2419 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v2
2420 ; GFX9-NEXT: s_add_i32 s4, s7, s2
2421 ; GFX9-NEXT: s_sub_i32 s3, s3, s5
2422 ; GFX9-NEXT: s_sub_i32 s5, 0, s6
2423 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2
2424 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
2425 ; GFX9-NEXT: s_xor_b32 s4, s4, s2
2426 ; GFX9-NEXT: v_readfirstlane_b32 s7, v2
2427 ; GFX9-NEXT: s_mul_i32 s5, s5, s7
2428 ; GFX9-NEXT: s_mul_hi_u32 s5, s7, s5
2429 ; GFX9-NEXT: s_add_i32 s7, s7, s5
2430 ; GFX9-NEXT: s_mul_hi_u32 s5, s4, s7
2431 ; GFX9-NEXT: s_mul_i32 s5, s5, s6
2432 ; GFX9-NEXT: s_sub_i32 s4, s4, s5
2433 ; GFX9-NEXT: s_sub_i32 s5, s4, s6
2434 ; GFX9-NEXT: s_cmp_ge_u32 s4, s6
2435 ; GFX9-NEXT: s_cselect_b32 s4, s5, s4
2436 ; GFX9-NEXT: s_sub_i32 s5, s4, s6
2437 ; GFX9-NEXT: s_cmp_ge_u32 s4, s6
2438 ; GFX9-NEXT: s_cselect_b32 s4, s5, s4
2439 ; GFX9-NEXT: s_xor_b32 s4, s4, s2
2440 ; GFX9-NEXT: s_sub_i32 s2, s4, s2
2441 ; GFX9-NEXT: v_mov_b32_e32 v2, s3
2442 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
2443 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
2444 ; GFX9-NEXT: s_endpgm
2595 ; GFX9-LABEL: udiv_v4i16:
2596 ; GFX9: ; %bb.0:
2597 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
2598 ; GFX9-NEXT: v_mov_b32_e32 v6, 0
2599 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
2600 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
2601 ; GFX9-NEXT: s_and_b32 s3, s6, 0xffff
2602 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
2603 ; GFX9-NEXT: s_and_b32 s2, s4, 0xffff
2604 ; GFX9-NEXT: s_lshr_b32 s6, s6, 16
2605 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s2
2606 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v0
2607 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s6
2608 ; GFX9-NEXT: s_lshr_b32 s4, s4, 16
2609 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s4
2610 ; GFX9-NEXT: v_mul_f32_e32 v4, v2, v4
2611 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v1
2612 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
2613 ; GFX9-NEXT: s_and_b32 s2, s7, 0xffff
2614 ; GFX9-NEXT: v_cvt_u32_f32_e32 v7, v4
2615 ; GFX9-NEXT: v_mad_f32 v2, -v4, v0, v2
2616 ; GFX9-NEXT: v_cvt_f32_u32_e32 v4, s2
2617 ; GFX9-NEXT: v_mul_f32_e32 v5, v3, v5
2618 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v0
2619 ; GFX9-NEXT: s_and_b32 s2, s5, 0xffff
2620 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v7, vcc
2621 ; GFX9-NEXT: v_trunc_f32_e32 v2, v5
2622 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s2
2623 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v7, v4
2624 ; GFX9-NEXT: v_mad_f32 v3, -v2, v1, v3
2625 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v1
2626 ; GFX9-NEXT: s_lshr_b32 s2, s7, 16
2627 ; GFX9-NEXT: v_mul_f32_e32 v1, v5, v7
2628 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
2629 ; GFX9-NEXT: v_mad_f32 v3, -v1, v4, v5
2630 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s2
2631 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
2632 ; GFX9-NEXT: s_lshr_b32 s2, s5, 16
2633 ; GFX9-NEXT: v_cvt_f32_u32_e32 v7, s2
2634 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v8, v5
2635 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v2, vcc
2636 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
2637 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v4
2638 ; GFX9-NEXT: v_mul_f32_e32 v3, v7, v8
2639 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
2640 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v3
2641 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
2642 ; GFX9-NEXT: v_mad_f32 v3, -v3, v5, v7
2643 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v5
2644 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v4, vcc
2645 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
2646 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
2647 ; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v1
2648 ; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0
2649 ; GFX9-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1]
2650 ; GFX9-NEXT: s_endpgm
2821 ; GFX9-LABEL: urem_v4i16:
2822 ; GFX9: ; %bb.0:
2823 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
2824 ; GFX9-NEXT: v_mov_b32_e32 v6, 0
2825 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
2826 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
2827 ; GFX9-NEXT: s_and_b32 s3, s6, 0xffff
2828 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
2829 ; GFX9-NEXT: s_and_b32 s2, s4, 0xffff
2830 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s2
2831 ; GFX9-NEXT: s_lshr_b32 s6, s6, 16
2832 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v0
2833 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s6
2834 ; GFX9-NEXT: s_lshr_b32 s4, s4, 16
2835 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s4
2836 ; GFX9-NEXT: v_mul_f32_e32 v4, v2, v4
2837 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
2838 ; GFX9-NEXT: v_cvt_u32_f32_e32 v7, v4
2839 ; GFX9-NEXT: v_mad_f32 v2, -v4, v0, v2
2840 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v0
2841 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v1
2842 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v7, vcc
2843 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s3
2844 ; GFX9-NEXT: s_and_b32 s3, s7, 0xffff
2845 ; GFX9-NEXT: v_cvt_f32_u32_e32 v4, s3
2846 ; GFX9-NEXT: v_mul_f32_e32 v5, v3, v5
2847 ; GFX9-NEXT: v_trunc_f32_e32 v2, v5
2848 ; GFX9-NEXT: s_and_b32 s8, s5, 0xffff
2849 ; GFX9-NEXT: v_mad_f32 v3, -v2, v1, v3
2850 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
2851 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s8
2852 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v7, v4
2853 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v1
2854 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
2855 ; GFX9-NEXT: v_mul_f32_e32 v2, v5, v7
2856 ; GFX9-NEXT: v_mul_lo_u32 v1, v1, s6
2857 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
2858 ; GFX9-NEXT: s_lshr_b32 s6, s7, 16
2859 ; GFX9-NEXT: v_mad_f32 v3, -v2, v4, v5
2860 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s6
2861 ; GFX9-NEXT: s_lshr_b32 s5, s5, 16
2862 ; GFX9-NEXT: v_cvt_f32_u32_e32 v7, s5
2863 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
2864 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v8, v5
2865 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v4
2866 ; GFX9-NEXT: v_sub_u32_e32 v0, s2, v0
2867 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v2, vcc
2868 ; GFX9-NEXT: v_mul_f32_e32 v3, v7, v8
2869 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
2870 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v3
2871 ; GFX9-NEXT: v_mad_f32 v3, -v3, v5, v7
2872 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v5
2873 ; GFX9-NEXT: v_mul_lo_u32 v2, v2, s3
2874 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v4, vcc
2875 ; GFX9-NEXT: v_mul_lo_u32 v3, v3, s6
2876 ; GFX9-NEXT: v_sub_u32_e32 v4, s4, v1
2877 ; GFX9-NEXT: v_sub_u32_e32 v1, s8, v2
2878 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
2879 ; GFX9-NEXT: v_sub_u32_e32 v2, s5, v3
2880 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
2881 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v1
2882 ; GFX9-NEXT: v_lshl_or_b32 v0, v4, 16, v0
2883 ; GFX9-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1]
2884 ; GFX9-NEXT: s_endpgm
3071 ; GFX9-LABEL: sdiv_v4i16:
3072 ; GFX9: ; %bb.0:
3073 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
3074 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
3075 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
3076 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3077 ; GFX9-NEXT: s_sext_i32_i16 s0, s6
3078 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s0
3079 ; GFX9-NEXT: s_sext_i32_i16 s1, s4
3080 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s1
3081 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
3082 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v0
3083 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3084 ; GFX9-NEXT: s_or_b32 s8, s0, 1
3085 ; GFX9-NEXT: v_mul_f32_e32 v3, v1, v3
3086 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
3087 ; GFX9-NEXT: v_mad_f32 v1, -v3, v0, v1
3088 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v1|, |v0|
3089 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3090 ; GFX9-NEXT: s_cselect_b32 s0, s8, 0
3091 ; GFX9-NEXT: s_ashr_i32 s1, s6, 16
3092 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s1
3093 ; GFX9-NEXT: s_ashr_i32 s4, s4, 16
3094 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s4
3095 ; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3
3096 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v0
3097 ; GFX9-NEXT: v_add_u32_e32 v3, s0, v3
3098 ; GFX9-NEXT: v_mul_f32_e32 v4, v1, v4
3099 ; GFX9-NEXT: s_xor_b32 s0, s4, s1
3100 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
3101 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3102 ; GFX9-NEXT: v_mad_f32 v1, -v4, v0, v1
3103 ; GFX9-NEXT: s_or_b32 s4, s0, 1
3104 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v1|, |v0|
3105 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3106 ; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v4
3107 ; GFX9-NEXT: s_sext_i32_i16 s1, s7
3108 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s1
3109 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
3110 ; GFX9-NEXT: v_add_u32_e32 v4, s0, v4
3111 ; GFX9-NEXT: s_sext_i32_i16 s0, s5
3112 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s0
3113 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v0
3114 ; GFX9-NEXT: s_xor_b32 s0, s0, s1
3115 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3116 ; GFX9-NEXT: s_or_b32 s4, s0, 1
3117 ; GFX9-NEXT: v_mul_f32_e32 v5, v1, v5
3118 ; GFX9-NEXT: v_trunc_f32_e32 v5, v5
3119 ; GFX9-NEXT: v_mad_f32 v1, -v5, v0, v1
3120 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v1|, |v0|
3121 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3122 ; GFX9-NEXT: v_cvt_i32_f32_e32 v5, v5
3123 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
3124 ; GFX9-NEXT: s_ashr_i32 s1, s7, 16
3125 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s1
3126 ; GFX9-NEXT: v_add_u32_e32 v1, s0, v5
3127 ; GFX9-NEXT: s_ashr_i32 s0, s5, 16
3128 ; GFX9-NEXT: v_cvt_f32_i32_e32 v5, s0
3129 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v6, v0
3130 ; GFX9-NEXT: s_xor_b32 s0, s0, s1
3131 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3132 ; GFX9-NEXT: s_or_b32 s4, s0, 1
3133 ; GFX9-NEXT: v_mul_f32_e32 v6, v5, v6
3134 ; GFX9-NEXT: v_trunc_f32_e32 v6, v6
3135 ; GFX9-NEXT: v_mad_f32 v5, -v6, v0, v5
3136 ; GFX9-NEXT: v_cvt_i32_f32_e32 v6, v6
3137 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v5|, |v0|
3138 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3139 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
3140 ; GFX9-NEXT: v_add_u32_e32 v0, s0, v6
3141 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
3142 ; GFX9-NEXT: v_lshl_or_b32 v1, v0, 16, v1
3143 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v3
3144 ; GFX9-NEXT: v_lshl_or_b32 v0, v4, 16, v0
3145 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
3146 ; GFX9-NEXT: s_endpgm
3354 ; GFX9-LABEL: srem_v4i16:
3355 ; GFX9: ; %bb.0:
3356 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
3357 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
3358 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
3359 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3360 ; GFX9-NEXT: s_sext_i32_i16 s8, s6
3361 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s8
3362 ; GFX9-NEXT: s_sext_i32_i16 s9, s4
3363 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s9
3364 ; GFX9-NEXT: s_xor_b32 s0, s9, s8
3365 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v0
3366 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3367 ; GFX9-NEXT: s_or_b32 s10, s0, 1
3368 ; GFX9-NEXT: v_mul_f32_e32 v3, v1, v3
3369 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
3370 ; GFX9-NEXT: v_mad_f32 v1, -v3, v0, v1
3371 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v1|, |v0|
3372 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3373 ; GFX9-NEXT: s_cselect_b32 s0, s10, 0
3374 ; GFX9-NEXT: s_ashr_i32 s6, s6, 16
3375 ; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3
3376 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s6
3377 ; GFX9-NEXT: s_ashr_i32 s4, s4, 16
3378 ; GFX9-NEXT: v_add_u32_e32 v1, s0, v3
3379 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, s4
3380 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v0
3381 ; GFX9-NEXT: s_xor_b32 s0, s4, s6
3382 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3383 ; GFX9-NEXT: v_mul_lo_u32 v1, v1, s8
3384 ; GFX9-NEXT: v_mul_f32_e32 v4, v3, v4
3385 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
3386 ; GFX9-NEXT: v_mad_f32 v3, -v4, v0, v3
3387 ; GFX9-NEXT: s_or_b32 s8, s0, 1
3388 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v3|, |v0|
3389 ; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v4
3390 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3391 ; GFX9-NEXT: s_cselect_b32 s0, s8, 0
3392 ; GFX9-NEXT: s_sext_i32_i16 s8, s7
3393 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, s8
3394 ; GFX9-NEXT: v_add_u32_e32 v0, s0, v4
3395 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s6
3396 ; GFX9-NEXT: s_sext_i32_i16 s6, s5
3397 ; GFX9-NEXT: v_cvt_f32_i32_e32 v4, s6
3398 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v3
3399 ; GFX9-NEXT: s_xor_b32 s0, s6, s8
3400 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3401 ; GFX9-NEXT: s_or_b32 s10, s0, 1
3402 ; GFX9-NEXT: v_mul_f32_e32 v5, v4, v5
3403 ; GFX9-NEXT: v_trunc_f32_e32 v5, v5
3404 ; GFX9-NEXT: v_mad_f32 v4, -v5, v3, v4
3405 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v4|, |v3|
3406 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3407 ; GFX9-NEXT: s_cselect_b32 s0, s10, 0
3408 ; GFX9-NEXT: s_ashr_i32 s7, s7, 16
3409 ; GFX9-NEXT: v_cvt_i32_f32_e32 v5, v5
3410 ; GFX9-NEXT: v_cvt_f32_i32_e32 v4, s7
3411 ; GFX9-NEXT: s_ashr_i32 s5, s5, 16
3412 ; GFX9-NEXT: v_sub_u32_e32 v0, s4, v0
3413 ; GFX9-NEXT: v_add_u32_e32 v3, s0, v5
3414 ; GFX9-NEXT: v_cvt_f32_i32_e32 v5, s5
3415 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v6, v4
3416 ; GFX9-NEXT: s_xor_b32 s0, s5, s7
3417 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3418 ; GFX9-NEXT: v_mul_lo_u32 v3, v3, s8
3419 ; GFX9-NEXT: v_mul_f32_e32 v6, v5, v6
3420 ; GFX9-NEXT: v_trunc_f32_e32 v6, v6
3421 ; GFX9-NEXT: v_mad_f32 v5, -v6, v4, v5
3422 ; GFX9-NEXT: v_cvt_i32_f32_e32 v6, v6
3423 ; GFX9-NEXT: s_or_b32 s8, s0, 1
3424 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v5|, |v4|
3425 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3426 ; GFX9-NEXT: s_cselect_b32 s0, s8, 0
3427 ; GFX9-NEXT: v_add_u32_e32 v4, s0, v6
3428 ; GFX9-NEXT: v_mul_lo_u32 v4, v4, s7
3429 ; GFX9-NEXT: v_sub_u32_e32 v5, s9, v1
3430 ; GFX9-NEXT: v_sub_u32_e32 v1, s6, v3
3431 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
3432 ; GFX9-NEXT: v_sub_u32_e32 v3, s5, v4
3433 ; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v1
3434 ; GFX9-NEXT: v_and_b32_e32 v3, 0xffff, v5
3435 ; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v3
3436 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
3437 ; GFX9-NEXT: s_endpgm
3487 ; GFX9-LABEL: udiv_i3:
3488 ; GFX9: ; %bb.0:
3489 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
3490 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
3491 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
3492 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3493 ; GFX9-NEXT: s_bfe_u32 s0, s4, 0x30008
3494 ; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, s0
3495 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0
3496 ; GFX9-NEXT: s_and_b32 s0, s4, 7
3497 ; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, s0
3498 ; GFX9-NEXT: v_mul_f32_e32 v1, v3, v1
3499 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
3500 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v1
3501 ; GFX9-NEXT: v_mad_f32 v1, -v1, v0, v3
3502 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
3503 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v4, vcc
3504 ; GFX9-NEXT: v_and_b32_e32 v0, 7, v0
3505 ; GFX9-NEXT: global_store_byte v2, v0, s[2:3]
3506 ; GFX9-NEXT: s_endpgm
3561 ; GFX9-LABEL: urem_i3:
3562 ; GFX9: ; %bb.0:
3563 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c
3564 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3565 ; GFX9-NEXT: s_bfe_u32 s3, s2, 0x30008
3566 ; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, s3
3567 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v0
3568 ; GFX9-NEXT: s_and_b32 s4, s2, 7
3569 ; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, s4
3570 ; GFX9-NEXT: s_lshr_b32 s3, s2, 8
3571 ; GFX9-NEXT: v_mul_f32_e32 v1, v2, v1
3572 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
3573 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v1
3574 ; GFX9-NEXT: v_mad_f32 v1, -v1, v0, v2
3575 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v0
3576 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
3577 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v3, vcc
3578 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s3
3579 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
3580 ; GFX9-NEXT: v_sub_u32_e32 v0, s2, v0
3581 ; GFX9-NEXT: v_and_b32_e32 v0, 7, v0
3582 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3583 ; GFX9-NEXT: global_store_byte v1, v0, s[0:1]
3584 ; GFX9-NEXT: s_endpgm
3643 ; GFX9-LABEL: sdiv_i3:
3644 ; GFX9: ; %bb.0:
3645 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
3646 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
3647 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
3648 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3649 ; GFX9-NEXT: s_bfe_i32 s0, s4, 0x30008
3650 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s0
3651 ; GFX9-NEXT: s_bfe_i32 s1, s4, 0x30000
3652 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s1
3653 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
3654 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v0
3655 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
3656 ; GFX9-NEXT: s_or_b32 s4, s0, 1
3657 ; GFX9-NEXT: v_mul_f32_e32 v3, v2, v3
3658 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
3659 ; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v2
3660 ; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3
3661 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v2|, |v0|
3662 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
3663 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
3664 ; GFX9-NEXT: v_add_u32_e32 v0, s0, v3
3665 ; GFX9-NEXT: v_and_b32_e32 v0, 7, v0
3666 ; GFX9-NEXT: global_store_byte v1, v0, s[2:3]
3667 ; GFX9-NEXT: s_endpgm
3731 ; GFX9-LABEL: srem_i3:
3732 ; GFX9: ; %bb.0:
3733 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
3734 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3735 ; GFX9-NEXT: s_bfe_i32 s2, s4, 0x30008
3736 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s2
3737 ; GFX9-NEXT: s_bfe_i32 s3, s4, 0x30000
3738 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s3
3739 ; GFX9-NEXT: s_xor_b32 s2, s3, s2
3740 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v0
3741 ; GFX9-NEXT: s_ashr_i32 s2, s2, 30
3742 ; GFX9-NEXT: s_lshr_b32 s5, s4, 8
3743 ; GFX9-NEXT: s_or_b32 s6, s2, 1
3744 ; GFX9-NEXT: v_mul_f32_e32 v2, v1, v2
3745 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
3746 ; GFX9-NEXT: v_mad_f32 v1, -v2, v0, v1
3747 ; GFX9-NEXT: v_cvt_i32_f32_e32 v2, v2
3748 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[2:3], |v1|, |v0|
3749 ; GFX9-NEXT: s_and_b64 s[2:3], s[2:3], exec
3750 ; GFX9-NEXT: s_cselect_b32 s2, s6, 0
3751 ; GFX9-NEXT: v_add_u32_e32 v0, s2, v2
3752 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s5
3753 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
3754 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
3755 ; GFX9-NEXT: v_sub_u32_e32 v0, s4, v0
3756 ; GFX9-NEXT: v_and_b32_e32 v0, 7, v0
3757 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3758 ; GFX9-NEXT: global_store_byte v1, v0, s[0:1]
3759 ; GFX9-NEXT: s_endpgm
3877 ; GFX9-LABEL: udiv_v3i16:
3878 ; GFX9: ; %bb.0:
3879 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
3880 ; GFX9-NEXT: v_mov_b32_e32 v6, 0
3881 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
3882 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
3883 ; GFX9-NEXT: s_and_b32 s3, s6, 0xffff
3884 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
3885 ; GFX9-NEXT: s_and_b32 s2, s4, 0xffff
3886 ; GFX9-NEXT: s_lshr_b32 s6, s6, 16
3887 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s6
3888 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s2
3889 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v0
3890 ; GFX9-NEXT: s_lshr_b32 s4, s4, 16
3891 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s4
3892 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v1
3893 ; GFX9-NEXT: v_mul_f32_e32 v4, v2, v4
3894 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
3895 ; GFX9-NEXT: s_and_b32 s2, s7, 0xffff
3896 ; GFX9-NEXT: v_cvt_u32_f32_e32 v7, v4
3897 ; GFX9-NEXT: v_mad_f32 v2, -v4, v0, v2
3898 ; GFX9-NEXT: v_cvt_f32_u32_e32 v4, s2
3899 ; GFX9-NEXT: v_mul_f32_e32 v5, v3, v5
3900 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v0
3901 ; GFX9-NEXT: v_trunc_f32_e32 v2, v5
3902 ; GFX9-NEXT: s_and_b32 s2, s5, 0xffff
3903 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v7, vcc
3904 ; GFX9-NEXT: v_mad_f32 v3, -v2, v1, v3
3905 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
3906 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s2
3907 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v7, v4
3908 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v1
3909 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
3910 ; GFX9-NEXT: v_mul_f32_e32 v2, v5, v7
3911 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
3912 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v2
3913 ; GFX9-NEXT: v_mad_f32 v2, -v2, v4, v5
3914 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v4
3915 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
3916 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v3, vcc
3917 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
3918 ; GFX9-NEXT: global_store_short v6, v2, s[0:1] offset:4
3919 ; GFX9-NEXT: global_store_dword v6, v0, s[0:1]
3920 ; GFX9-NEXT: s_endpgm
4054 ; GFX9-LABEL: urem_v3i16:
4055 ; GFX9: ; %bb.0:
4056 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
4057 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
4058 ; GFX9-NEXT: s_and_b32 s3, s6, 0xffff
4059 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
4060 ; GFX9-NEXT: s_and_b32 s2, s4, 0xffff
4061 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s2
4062 ; GFX9-NEXT: s_lshr_b32 s6, s6, 16
4063 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v0
4064 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s6
4065 ; GFX9-NEXT: s_lshr_b32 s4, s4, 16
4066 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s4
4067 ; GFX9-NEXT: v_mul_f32_e32 v4, v2, v4
4068 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
4069 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v1
4070 ; GFX9-NEXT: v_cvt_u32_f32_e32 v6, v4
4071 ; GFX9-NEXT: v_mad_f32 v2, -v4, v0, v2
4072 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v0
4073 ; GFX9-NEXT: v_mul_f32_e32 v5, v3, v5
4074 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v6, vcc
4075 ; GFX9-NEXT: v_trunc_f32_e32 v5, v5
4076 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s3
4077 ; GFX9-NEXT: s_and_b32 s3, s7, 0xffff
4078 ; GFX9-NEXT: v_mad_f32 v2, -v5, v1, v3
4079 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s3
4080 ; GFX9-NEXT: s_and_b32 s5, s5, 0xffff
4081 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v5
4082 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, s5
4083 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v6, v3
4084 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v1
4085 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v4, vcc
4086 ; GFX9-NEXT: v_mul_f32_e32 v2, v5, v6
4087 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
4088 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v2
4089 ; GFX9-NEXT: v_mad_f32 v2, -v2, v3, v5
4090 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v3
4091 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
4092 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v4, vcc
4093 ; GFX9-NEXT: v_mul_lo_u32 v1, v1, s6
4094 ; GFX9-NEXT: v_mul_lo_u32 v2, v2, s3
4095 ; GFX9-NEXT: v_sub_u32_e32 v0, s2, v0
4096 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
4097 ; GFX9-NEXT: v_sub_u32_e32 v1, s4, v1
4098 ; GFX9-NEXT: v_sub_u32_e32 v2, s5, v2
4099 ; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
4100 ; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
4101 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
4102 ; GFX9-NEXT: global_store_short v3, v2, s[0:1] offset:4
4103 ; GFX9-NEXT: global_store_dword v3, v0, s[0:1]
4104 ; GFX9-NEXT: s_endpgm
4249 ; GFX9-LABEL: sdiv_v3i16:
4250 ; GFX9: ; %bb.0:
4251 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
4252 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
4253 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
4254 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
4255 ; GFX9-NEXT: s_sext_i32_i16 s0, s6
4256 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s0
4257 ; GFX9-NEXT: s_sext_i32_i16 s1, s4
4258 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s1
4259 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
4260 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v0
4261 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
4262 ; GFX9-NEXT: s_or_b32 s8, s0, 1
4263 ; GFX9-NEXT: v_mul_f32_e32 v3, v2, v3
4264 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
4265 ; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v2
4266 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v2|, |v0|
4267 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
4268 ; GFX9-NEXT: s_cselect_b32 s0, s8, 0
4269 ; GFX9-NEXT: s_ashr_i32 s1, s6, 16
4270 ; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3
4271 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s1
4272 ; GFX9-NEXT: s_ashr_i32 s4, s4, 16
4273 ; GFX9-NEXT: v_add_u32_e32 v2, s0, v3
4274 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, s4
4275 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v0
4276 ; GFX9-NEXT: s_xor_b32 s0, s4, s1
4277 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
4278 ; GFX9-NEXT: s_or_b32 s4, s0, 1
4279 ; GFX9-NEXT: v_mul_f32_e32 v4, v3, v4
4280 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
4281 ; GFX9-NEXT: v_mad_f32 v3, -v4, v0, v3
4282 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v3|, |v0|
4283 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
4284 ; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v4
4285 ; GFX9-NEXT: s_sext_i32_i16 s1, s7
4286 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s1
4287 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
4288 ; GFX9-NEXT: v_add_u32_e32 v3, s0, v4
4289 ; GFX9-NEXT: s_sext_i32_i16 s0, s5
4290 ; GFX9-NEXT: v_cvt_f32_i32_e32 v4, s0
4291 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v0
4292 ; GFX9-NEXT: s_xor_b32 s0, s0, s1
4293 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
4294 ; GFX9-NEXT: s_or_b32 s4, s0, 1
4295 ; GFX9-NEXT: v_mul_f32_e32 v5, v4, v5
4296 ; GFX9-NEXT: v_trunc_f32_e32 v5, v5
4297 ; GFX9-NEXT: v_mad_f32 v4, -v5, v0, v4
4298 ; GFX9-NEXT: v_cvt_i32_f32_e32 v5, v5
4299 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v4|, |v0|
4300 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
4301 ; GFX9-NEXT: s_cselect_b32 s0, s4, 0
4302 ; GFX9-NEXT: v_add_u32_e32 v0, s0, v5
4303 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2
4304 ; GFX9-NEXT: v_lshl_or_b32 v2, v3, 16, v2
4305 ; GFX9-NEXT: global_store_short v1, v0, s[2:3] offset:4
4306 ; GFX9-NEXT: global_store_dword v1, v2, s[2:3]
4307 ; GFX9-NEXT: s_endpgm
4467 ; GFX9-LABEL: srem_v3i16:
4468 ; GFX9: ; %bb.0:
4469 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
4470 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
4471 ; GFX9-NEXT: s_sext_i32_i16 s8, s6
4472 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s8
4473 ; GFX9-NEXT: s_sext_i32_i16 s9, s4
4474 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, s9
4475 ; GFX9-NEXT: s_xor_b32 s2, s9, s8
4476 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v0
4477 ; GFX9-NEXT: s_ashr_i32 s2, s2, 30
4478 ; GFX9-NEXT: s_or_b32 s10, s2, 1
4479 ; GFX9-NEXT: s_sext_i32_i16 s7, s7
4480 ; GFX9-NEXT: v_mul_f32_e32 v2, v1, v2
4481 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
4482 ; GFX9-NEXT: v_mad_f32 v1, -v2, v0, v1
4483 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[2:3], |v1|, |v0|
4484 ; GFX9-NEXT: s_and_b64 s[2:3], s[2:3], exec
4485 ; GFX9-NEXT: s_cselect_b32 s2, s10, 0
4486 ; GFX9-NEXT: s_ashr_i32 s6, s6, 16
4487 ; GFX9-NEXT: v_cvt_i32_f32_e32 v2, v2
4488 ; GFX9-NEXT: v_cvt_f32_i32_e32 v0, s6
4489 ; GFX9-NEXT: s_ashr_i32 s4, s4, 16
4490 ; GFX9-NEXT: s_sext_i32_i16 s5, s5
4491 ; GFX9-NEXT: v_add_u32_e32 v1, s2, v2
4492 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s4
4493 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v0
4494 ; GFX9-NEXT: s_xor_b32 s2, s4, s6
4495 ; GFX9-NEXT: s_ashr_i32 s2, s2, 30
4496 ; GFX9-NEXT: v_mul_lo_u32 v1, v1, s8
4497 ; GFX9-NEXT: v_mul_f32_e32 v3, v2, v3
4498 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
4499 ; GFX9-NEXT: v_mad_f32 v2, -v3, v0, v2
4500 ; GFX9-NEXT: s_or_b32 s8, s2, 1
4501 ; GFX9-NEXT: v_cvt_i32_f32_e32 v3, v3
4502 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[2:3], |v2|, |v0|
4503 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, s7
4504 ; GFX9-NEXT: s_and_b64 s[2:3], s[2:3], exec
4505 ; GFX9-NEXT: s_cselect_b32 s2, s8, 0
4506 ; GFX9-NEXT: v_add_u32_e32 v0, s2, v3
4507 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, s5
4508 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v2
4509 ; GFX9-NEXT: s_xor_b32 s2, s5, s7
4510 ; GFX9-NEXT: s_ashr_i32 s2, s2, 30
4511 ; GFX9-NEXT: v_mul_lo_u32 v0, v0, s6
4512 ; GFX9-NEXT: v_mul_f32_e32 v4, v3, v4
4513 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
4514 ; GFX9-NEXT: v_mad_f32 v3, -v4, v2, v3
4515 ; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v4
4516 ; GFX9-NEXT: s_or_b32 s6, s2, 1
4517 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[2:3], |v3|, |v2|
4518 ; GFX9-NEXT: s_and_b64 s[2:3], s[2:3], exec
4519 ; GFX9-NEXT: s_cselect_b32 s2, s6, 0
4520 ; GFX9-NEXT: v_add_u32_e32 v2, s2, v4
4521 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
4522 ; GFX9-NEXT: v_mul_lo_u32 v2, v2, s7
4523 ; GFX9-NEXT: v_sub_u32_e32 v1, s9, v1
4524 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
4525 ; GFX9-NEXT: v_sub_u32_e32 v0, s4, v0
4526 ; GFX9-NEXT: v_sub_u32_e32 v2, s5, v2
4527 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
4528 ; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1
4529 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
4530 ; GFX9-NEXT: global_store_short v3, v2, s[0:1] offset:4
4531 ; GFX9-NEXT: global_store_dword v3, v0, s[0:1]
4532 ; GFX9-NEXT: s_endpgm
4660 ; GFX9-LABEL: udiv_v3i15:
4661 ; GFX9: ; %bb.0:
4662 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
4663 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
4664 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
4665 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
4666 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
4667 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
4668 ; GFX9-NEXT: v_alignbit_b32 v0, s3, v0, 30
4669 ; GFX9-NEXT: s_and_b32 s6, s2, 0x7fff
4670 ; GFX9-NEXT: s_and_b32 s3, s0, 0x7fff
4671 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s3
4672 ; GFX9-NEXT: v_mov_b32_e32 v3, s0
4673 ; GFX9-NEXT: s_bfe_u32 s0, s0, 0xf000f
4674 ; GFX9-NEXT: v_cvt_f32_u32_e32 v4, s6
4675 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v1
4676 ; GFX9-NEXT: v_cvt_f32_u32_e32 v6, s0
4677 ; GFX9-NEXT: s_bfe_u32 s2, s2, 0xf000f
4678 ; GFX9-NEXT: v_alignbit_b32 v3, s1, v3, 30
4679 ; GFX9-NEXT: v_mul_f32_e32 v5, v4, v5
4680 ; GFX9-NEXT: v_cvt_f32_u32_e32 v7, s2
4681 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v8, v6
4682 ; GFX9-NEXT: v_and_b32_e32 v3, 0x7fff, v3
4683 ; GFX9-NEXT: v_trunc_f32_e32 v5, v5
4684 ; GFX9-NEXT: v_mad_f32 v4, -v5, v1, v4
4685 ; GFX9-NEXT: v_cvt_u32_f32_e32 v5, v5
4686 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, v3
4687 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v4|, v1
4688 ; GFX9-NEXT: v_mul_f32_e32 v1, v7, v8
4689 ; GFX9-NEXT: v_and_b32_e32 v0, 0x7fff, v0
4690 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
4691 ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v5, vcc
4692 ; GFX9-NEXT: v_mad_f32 v5, -v1, v6, v7
4693 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
4694 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, v0
4695 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v7, v3
4696 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v5|, v6
4697 ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v1, vcc
4698 ; GFX9-NEXT: v_mul_f32_e32 v1, v0, v7
4699 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
4700 ; GFX9-NEXT: v_cvt_u32_f32_e32 v6, v1
4701 ; GFX9-NEXT: v_mad_f32 v0, -v1, v3, v0
4702 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, v3
4703 ; GFX9-NEXT: v_and_b32_e32 v3, 0x7fff, v4
4704 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, 0, v6, vcc
4705 ; GFX9-NEXT: v_and_b32_e32 v4, 0x7fff, v5
4706 ; GFX9-NEXT: v_lshlrev_b64 v[0:1], 30, v[0:1]
4707 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 15, v4
4708 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
4709 ; GFX9-NEXT: v_or_b32_e32 v0, v3, v0
4710 ; GFX9-NEXT: global_store_dword v2, v0, s[4:5]
4711 ; GFX9-NEXT: v_and_b32_e32 v0, 0x1fff, v1
4712 ; GFX9-NEXT: global_store_short v2, v0, s[4:5] offset:4
4713 ; GFX9-NEXT: s_endpgm
4855 ; GFX9-LABEL: urem_v3i15:
4856 ; GFX9: ; %bb.0:
4857 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
4858 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
4859 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
4860 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
4861 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
4862 ; GFX9-NEXT: s_and_b32 s6, s2, 0x7fff
4863 ; GFX9-NEXT: v_cvt_f32_u32_e32 v4, s6
4864 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
4865 ; GFX9-NEXT: s_and_b32 s7, s0, 0x7fff
4866 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s7
4867 ; GFX9-NEXT: s_bfe_u32 s6, s0, 0xf000f
4868 ; GFX9-NEXT: v_cvt_f32_u32_e32 v6, s6
4869 ; GFX9-NEXT: v_mov_b32_e32 v3, s0
4870 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v1
4871 ; GFX9-NEXT: v_alignbit_b32 v3, s1, v3, 30
4872 ; GFX9-NEXT: v_alignbit_b32 v0, s3, v0, 30
4873 ; GFX9-NEXT: s_bfe_u32 s3, s2, 0xf000f
4874 ; GFX9-NEXT: v_mul_f32_e32 v5, v4, v5
4875 ; GFX9-NEXT: v_trunc_f32_e32 v5, v5
4876 ; GFX9-NEXT: v_mad_f32 v4, -v5, v1, v4
4877 ; GFX9-NEXT: v_cvt_u32_f32_e32 v5, v5
4878 ; GFX9-NEXT: v_and_b32_e32 v3, 0x7fff, v3
4879 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v4|, v1
4880 ; GFX9-NEXT: v_cvt_f32_u32_e32 v7, s3
4881 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v8, v6
4882 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v5, vcc
4883 ; GFX9-NEXT: v_cvt_f32_u32_e32 v5, v3
4884 ; GFX9-NEXT: v_and_b32_e32 v0, 0x7fff, v0
4885 ; GFX9-NEXT: v_mul_f32_e32 v4, v7, v8
4886 ; GFX9-NEXT: v_cvt_f32_u32_e32 v8, v0
4887 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v9, v5
4888 ; GFX9-NEXT: v_trunc_f32_e32 v4, v4
4889 ; GFX9-NEXT: v_mad_f32 v7, -v4, v6, v7
4890 ; GFX9-NEXT: v_cvt_u32_f32_e32 v4, v4
4891 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v7|, v6
4892 ; GFX9-NEXT: v_mul_f32_e32 v6, v8, v9
4893 ; GFX9-NEXT: v_trunc_f32_e32 v6, v6
4894 ; GFX9-NEXT: v_cvt_u32_f32_e32 v7, v6
4895 ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v4, vcc
4896 ; GFX9-NEXT: v_mad_f32 v6, -v6, v5, v8
4897 ; GFX9-NEXT: s_lshr_b32 s1, s0, 15
4898 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v6|, v5
4899 ; GFX9-NEXT: v_mul_lo_u32 v4, v4, s1
4900 ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v7, vcc
4901 ; GFX9-NEXT: v_mul_lo_u32 v1, v1, s0
4902 ; GFX9-NEXT: v_mul_lo_u32 v3, v5, v3
4903 ; GFX9-NEXT: s_lshr_b32 s0, s2, 15
4904 ; GFX9-NEXT: v_sub_u32_e32 v4, s0, v4
4905 ; GFX9-NEXT: v_sub_u32_e32 v5, s2, v1
4906 ; GFX9-NEXT: v_sub_u32_e32 v0, v0, v3
4907 ; GFX9-NEXT: v_and_b32_e32 v4, 0x7fff, v4
4908 ; GFX9-NEXT: v_lshlrev_b64 v[0:1], 30, v[0:1]
4909 ; GFX9-NEXT: v_and_b32_e32 v3, 0x7fff, v5
4910 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 15, v4
4911 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
4912 ; GFX9-NEXT: v_or_b32_e32 v0, v3, v0
4913 ; GFX9-NEXT: global_store_dword v2, v0, s[4:5]
4914 ; GFX9-NEXT: v_and_b32_e32 v0, 0x1fff, v1
4915 ; GFX9-NEXT: global_store_short v2, v0, s[4:5] offset:4
4916 ; GFX9-NEXT: s_endpgm
5070 ; GFX9-LABEL: sdiv_v3i15:
5071 ; GFX9: ; %bb.0:
5072 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
5073 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
5074 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24
5075 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
5076 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5077 ; GFX9-NEXT: s_bfe_i32 s1, s2, 0xf0000
5078 ; GFX9-NEXT: s_bfe_i32 s0, s4, 0xf0000
5079 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, s0
5080 ; GFX9-NEXT: v_cvt_f32_i32_e32 v4, s1
5081 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
5082 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
5083 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v5, v3
5084 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
5085 ; GFX9-NEXT: v_alignbit_b32 v0, s3, v0, 30
5086 ; GFX9-NEXT: s_or_b32 s3, s0, 1
5087 ; GFX9-NEXT: v_mul_f32_e32 v5, v4, v5
5088 ; GFX9-NEXT: v_trunc_f32_e32 v5, v5
5089 ; GFX9-NEXT: v_mad_f32 v4, -v5, v3, v4
5090 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v4|, |v3|
5091 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
5092 ; GFX9-NEXT: v_cvt_i32_f32_e32 v5, v5
5093 ; GFX9-NEXT: s_cselect_b32 s0, s3, 0
5094 ; GFX9-NEXT: s_bfe_i32 s1, s4, 0xf000f
5095 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, s1
5096 ; GFX9-NEXT: v_add_u32_e32 v4, s0, v5
5097 ; GFX9-NEXT: s_bfe_i32 s0, s2, 0xf000f
5098 ; GFX9-NEXT: v_cvt_f32_i32_e32 v5, s0
5099 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v6, v3
5100 ; GFX9-NEXT: v_mov_b32_e32 v1, s4
5101 ; GFX9-NEXT: v_alignbit_b32 v1, s5, v1, 30
5102 ; GFX9-NEXT: s_xor_b32 s0, s0, s1
5103 ; GFX9-NEXT: v_mul_f32_e32 v6, v5, v6
5104 ; GFX9-NEXT: v_trunc_f32_e32 v6, v6
5105 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
5106 ; GFX9-NEXT: v_mad_f32 v5, -v6, v3, v5
5107 ; GFX9-NEXT: v_bfe_i32 v1, v1, 0, 15
5108 ; GFX9-NEXT: s_or_b32 s2, s0, 1
5109 ; GFX9-NEXT: v_cvt_i32_f32_e32 v6, v6
5110 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v5|, |v3|
5111 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, v1
5112 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
5113 ; GFX9-NEXT: s_cselect_b32 s0, s2, 0
5114 ; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 15
5115 ; GFX9-NEXT: v_add_u32_e32 v5, s0, v6
5116 ; GFX9-NEXT: v_cvt_f32_i32_e32 v6, v0
5117 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v7, v3
5118 ; GFX9-NEXT: v_xor_b32_e32 v0, v0, v1
5119 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 30, v0
5120 ; GFX9-NEXT: v_or_b32_e32 v0, 1, v0
5121 ; GFX9-NEXT: v_mul_f32_e32 v1, v6, v7
5122 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
5123 ; GFX9-NEXT: v_cvt_i32_f32_e32 v7, v1
5124 ; GFX9-NEXT: v_mad_f32 v1, -v1, v3, v6
5125 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v3|
5126 ; GFX9-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
5127 ; GFX9-NEXT: v_add_u32_e32 v0, v7, v0
5128 ; GFX9-NEXT: v_and_b32_e32 v3, 0x7fff, v4
5129 ; GFX9-NEXT: v_and_b32_e32 v4, 0x7fff, v5
5130 ; GFX9-NEXT: v_lshlrev_b64 v[0:1], 30, v[0:1]
5131 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 15, v4
5132 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
5133 ; GFX9-NEXT: v_or_b32_e32 v0, v3, v0
5134 ; GFX9-NEXT: global_store_dword v2, v0, s[6:7]
5135 ; GFX9-NEXT: v_and_b32_e32 v0, 0x1fff, v1
5136 ; GFX9-NEXT: global_store_short v2, v0, s[6:7] offset:4
5137 ; GFX9-NEXT: s_endpgm
5307 ; GFX9-LABEL: srem_v3i15:
5308 ; GFX9: ; %bb.0:
5309 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
5310 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
5311 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34
5312 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
5313 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5314 ; GFX9-NEXT: s_bfe_i32 s1, s2, 0xf0000
5315 ; GFX9-NEXT: v_cvt_f32_i32_e32 v5, s1
5316 ; GFX9-NEXT: s_bfe_i32 s0, s6, 0xf0000
5317 ; GFX9-NEXT: v_cvt_f32_i32_e32 v4, s0
5318 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
5319 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
5320 ; GFX9-NEXT: v_mov_b32_e32 v1, s6
5321 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v6, v4
5322 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
5323 ; GFX9-NEXT: s_lshr_b32 s8, s2, 15
5324 ; GFX9-NEXT: v_alignbit_b32 v0, s3, v0, 30
5325 ; GFX9-NEXT: v_mul_f32_e32 v6, v5, v6
5326 ; GFX9-NEXT: v_trunc_f32_e32 v6, v6
5327 ; GFX9-NEXT: v_mad_f32 v5, -v6, v4, v5
5328 ; GFX9-NEXT: v_cvt_i32_f32_e32 v6, v6
5329 ; GFX9-NEXT: v_alignbit_b32 v1, s7, v1, 30
5330 ; GFX9-NEXT: s_lshr_b32 s3, s6, 15
5331 ; GFX9-NEXT: s_or_b32 s7, s0, 1
5332 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v5|, |v4|
5333 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
5334 ; GFX9-NEXT: s_cselect_b32 s0, s7, 0
5335 ; GFX9-NEXT: v_add_u32_e32 v4, s0, v6
5336 ; GFX9-NEXT: s_bfe_i32 s0, s6, 0xf000f
5337 ; GFX9-NEXT: v_cvt_f32_i32_e32 v5, s0
5338 ; GFX9-NEXT: s_bfe_i32 s1, s2, 0xf000f
5339 ; GFX9-NEXT: v_cvt_f32_i32_e32 v6, s1
5340 ; GFX9-NEXT: s_xor_b32 s0, s1, s0
5341 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v7, v5
5342 ; GFX9-NEXT: v_and_b32_e32 v3, 0x7fff, v1
5343 ; GFX9-NEXT: s_ashr_i32 s0, s0, 30
5344 ; GFX9-NEXT: v_bfe_i32 v1, v1, 0, 15
5345 ; GFX9-NEXT: v_mul_f32_e32 v7, v6, v7
5346 ; GFX9-NEXT: v_trunc_f32_e32 v7, v7
5347 ; GFX9-NEXT: v_mad_f32 v6, -v7, v5, v6
5348 ; GFX9-NEXT: v_cvt_i32_f32_e32 v7, v7
5349 ; GFX9-NEXT: v_mul_lo_u32 v4, v4, s6
5350 ; GFX9-NEXT: s_or_b32 s6, s0, 1
5351 ; GFX9-NEXT: v_cmp_ge_f32_e64 s[0:1], |v6|, |v5|
5352 ; GFX9-NEXT: v_cvt_f32_i32_e32 v6, v1
5353 ; GFX9-NEXT: s_and_b64 s[0:1], s[0:1], exec
5354 ; GFX9-NEXT: s_cselect_b32 s0, s6, 0
5355 ; GFX9-NEXT: v_add_u32_e32 v5, s0, v7
5356 ; GFX9-NEXT: v_bfe_i32 v7, v0, 0, 15
5357 ; GFX9-NEXT: v_cvt_f32_i32_e32 v8, v7
5358 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v9, v6
5359 ; GFX9-NEXT: v_xor_b32_e32 v1, v7, v1
5360 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 30, v1
5361 ; GFX9-NEXT: v_or_b32_e32 v1, 1, v1
5362 ; GFX9-NEXT: v_mul_f32_e32 v7, v8, v9
5363 ; GFX9-NEXT: v_trunc_f32_e32 v7, v7
5364 ; GFX9-NEXT: v_cvt_i32_f32_e32 v9, v7
5365 ; GFX9-NEXT: v_mad_f32 v7, -v7, v6, v8
5366 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v7|, |v6|
5367 ; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
5368 ; GFX9-NEXT: v_mul_lo_u32 v5, v5, s3
5369 ; GFX9-NEXT: v_add_u32_e32 v1, v9, v1
5370 ; GFX9-NEXT: v_mul_lo_u32 v1, v1, v3
5371 ; GFX9-NEXT: v_and_b32_e32 v0, 0x7fff, v0
5372 ; GFX9-NEXT: v_sub_u32_e32 v3, s2, v4
5373 ; GFX9-NEXT: v_sub_u32_e32 v4, s8, v5
5374 ; GFX9-NEXT: v_sub_u32_e32 v0, v0, v1
5375 ; GFX9-NEXT: v_and_b32_e32 v4, 0x7fff, v4
5376 ; GFX9-NEXT: v_lshlrev_b64 v[0:1], 30, v[0:1]
5377 ; GFX9-NEXT: v_and_b32_e32 v3, 0x7fff, v3
5378 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 15, v4
5379 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
5380 ; GFX9-NEXT: v_or_b32_e32 v0, v3, v0
5381 ; GFX9-NEXT: global_store_dword v2, v0, s[4:5]
5382 ; GFX9-NEXT: v_and_b32_e32 v0, 0x1fff, v1
5383 ; GFX9-NEXT: global_store_short v2, v0, s[4:5] offset:4
5384 ; GFX9-NEXT: s_endpgm
5412 ; GFX9-LABEL: udiv_i32_oddk_denom:
5413 ; GFX9: ; %bb.0:
5414 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
5415 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
5416 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
5417 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5418 ; GFX9-NEXT: s_mul_hi_u32 s0, s4, 0xb2a50881
5419 ; GFX9-NEXT: s_sub_i32 s1, s4, s0
5420 ; GFX9-NEXT: s_lshr_b32 s1, s1, 1
5421 ; GFX9-NEXT: s_add_i32 s1, s1, s0
5422 ; GFX9-NEXT: s_lshr_b32 s0, s1, 20
5423 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
5424 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
5425 ; GFX9-NEXT: s_endpgm
5449 ; GFX9-LABEL: udiv_i32_pow2k_denom:
5450 ; GFX9: ; %bb.0:
5451 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
5452 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
5453 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
5454 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5455 ; GFX9-NEXT: s_lshr_b32 s0, s4, 12
5456 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
5457 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
5458 ; GFX9-NEXT: s_endpgm
5484 ; GFX9-LABEL: udiv_i32_pow2_shl_denom:
5485 ; GFX9: ; %bb.0:
5486 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
5487 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
5488 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
5489 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5490 ; GFX9-NEXT: s_add_i32 s0, s3, 12
5491 ; GFX9-NEXT: s_lshr_b32 s0, s2, s0
5492 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
5493 ; GFX9-NEXT: global_store_dword v0, v1, s[4:5]
5494 ; GFX9-NEXT: s_endpgm
5526 ; GFX9-LABEL: udiv_v2i32_pow2k_denom:
5527 ; GFX9: ; %bb.0:
5528 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
5529 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
5530 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
5531 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5532 ; GFX9-NEXT: s_lshr_b32 s0, s2, 12
5533 ; GFX9-NEXT: s_lshr_b32 s1, s3, 12
5534 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
5535 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
5536 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5537 ; GFX9-NEXT: s_endpgm
5572 ; GFX9-LABEL: udiv_v2i32_mixed_pow2k_denom:
5573 ; GFX9: ; %bb.0:
5574 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
5575 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
5576 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
5577 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5578 ; GFX9-NEXT: s_mul_hi_u32 s1, s3, 0x100101
5579 ; GFX9-NEXT: s_lshr_b32 s0, s2, 12
5580 ; GFX9-NEXT: s_sub_i32 s2, s3, s1
5581 ; GFX9-NEXT: s_lshr_b32 s2, s2, 1
5582 ; GFX9-NEXT: s_add_i32 s2, s2, s1
5583 ; GFX9-NEXT: s_lshr_b32 s1, s2, 11
5584 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
5585 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
5586 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5587 ; GFX9-NEXT: s_endpgm
5713 ; GFX9-LABEL: udiv_v2i32_pow2_shl_denom:
5714 ; GFX9: ; %bb.0:
5715 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
5716 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5717 ; GFX9-NEXT: s_lshl_b32 s6, 0x1000, s6
5718 ; GFX9-NEXT: s_lshl_b32 s7, 0x1000, s7
5719 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s6
5720 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s7
5721 ; GFX9-NEXT: s_sub_i32 s2, 0, s6
5722 ; GFX9-NEXT: s_sub_i32 s3, 0, s7
5723 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
5724 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v1
5725 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
5726 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1
5727 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
5728 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
5729 ; GFX9-NEXT: v_mul_lo_u32 v2, s2, v0
5730 ; GFX9-NEXT: v_mul_lo_u32 v3, s3, v1
5731 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
5732 ; GFX9-NEXT: v_mul_hi_u32 v2, v0, v2
5733 ; GFX9-NEXT: v_mul_hi_u32 v3, v1, v3
5734 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v2
5735 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
5736 ; GFX9-NEXT: v_mul_hi_u32 v0, s4, v0
5737 ; GFX9-NEXT: v_mul_hi_u32 v1, s5, v1
5738 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
5739 ; GFX9-NEXT: v_mul_lo_u32 v3, v0, s6
5740 ; GFX9-NEXT: v_mul_lo_u32 v4, v1, s7
5741 ; GFX9-NEXT: v_add_u32_e32 v5, 1, v0
5742 ; GFX9-NEXT: v_add_u32_e32 v6, 1, v1
5743 ; GFX9-NEXT: v_sub_u32_e32 v3, s4, v3
5744 ; GFX9-NEXT: v_sub_u32_e32 v4, s5, v4
5745 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
5746 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc
5747 ; GFX9-NEXT: v_subrev_u32_e32 v5, s6, v3
5748 ; GFX9-NEXT: v_cmp_le_u32_e64 s[0:1], s7, v4
5749 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v6, s[0:1]
5750 ; GFX9-NEXT: v_subrev_u32_e32 v6, s7, v4
5751 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
5752 ; GFX9-NEXT: v_add_u32_e32 v5, 1, v0
5753 ; GFX9-NEXT: v_cndmask_b32_e64 v4, v4, v6, s[0:1]
5754 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
5755 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc
5756 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v1
5757 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s7, v4
5758 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
5759 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5760 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
5761 ; GFX9-NEXT: s_endpgm
5793 ; GFX9-LABEL: urem_i32_oddk_denom:
5794 ; GFX9: ; %bb.0:
5795 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
5796 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
5797 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
5798 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5799 ; GFX9-NEXT: s_mul_hi_u32 s0, s4, 0xb2a50881
5800 ; GFX9-NEXT: s_sub_i32 s1, s4, s0
5801 ; GFX9-NEXT: s_lshr_b32 s1, s1, 1
5802 ; GFX9-NEXT: s_add_i32 s1, s1, s0
5803 ; GFX9-NEXT: s_lshr_b32 s0, s1, 20
5804 ; GFX9-NEXT: s_mul_i32 s0, s0, 0x12d8fb
5805 ; GFX9-NEXT: s_sub_i32 s0, s4, s0
5806 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
5807 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
5808 ; GFX9-NEXT: s_endpgm
5832 ; GFX9-LABEL: urem_i32_pow2k_denom:
5833 ; GFX9: ; %bb.0:
5834 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
5835 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
5836 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
5837 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5838 ; GFX9-NEXT: s_and_b32 s0, s4, 0xfff
5839 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
5840 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
5841 ; GFX9-NEXT: s_endpgm
5868 ; GFX9-LABEL: urem_i32_pow2_shl_denom:
5869 ; GFX9: ; %bb.0:
5870 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
5871 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
5872 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
5873 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5874 ; GFX9-NEXT: s_lshl_b32 s0, 0x1000, s3
5875 ; GFX9-NEXT: s_add_i32 s0, s0, -1
5876 ; GFX9-NEXT: s_and_b32 s0, s2, s0
5877 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
5878 ; GFX9-NEXT: global_store_dword v0, v1, s[4:5]
5879 ; GFX9-NEXT: s_endpgm
5911 ; GFX9-LABEL: urem_v2i32_pow2k_denom:
5912 ; GFX9: ; %bb.0:
5913 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
5914 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
5915 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
5916 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
5917 ; GFX9-NEXT: s_and_b32 s0, s2, 0xfff
5918 ; GFX9-NEXT: s_and_b32 s1, s3, 0xfff
5919 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
5920 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
5921 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
5922 ; GFX9-NEXT: s_endpgm
6040 ; GFX9-LABEL: urem_v2i32_pow2_shl_denom:
6041 ; GFX9: ; %bb.0:
6042 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
6043 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
6044 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
6045 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6046 ; GFX9-NEXT: s_lshl_b32 s3, 0x1000, s6
6047 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
6048 ; GFX9-NEXT: s_lshl_b32 s2, 0x1000, s7
6049 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s2
6050 ; GFX9-NEXT: s_sub_i32 s6, 0, s3
6051 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
6052 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v1
6053 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
6054 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
6055 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1
6056 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
6057 ; GFX9-NEXT: v_readfirstlane_b32 s7, v0
6058 ; GFX9-NEXT: s_mul_i32 s6, s6, s7
6059 ; GFX9-NEXT: s_mul_hi_u32 s6, s7, s6
6060 ; GFX9-NEXT: s_add_i32 s7, s7, s6
6061 ; GFX9-NEXT: s_mul_hi_u32 s6, s4, s7
6062 ; GFX9-NEXT: s_mul_i32 s6, s6, s3
6063 ; GFX9-NEXT: s_sub_i32 s4, s4, s6
6064 ; GFX9-NEXT: s_sub_i32 s6, s4, s3
6065 ; GFX9-NEXT: s_cmp_ge_u32 s4, s3
6066 ; GFX9-NEXT: s_cselect_b32 s4, s6, s4
6067 ; GFX9-NEXT: s_sub_i32 s6, s4, s3
6068 ; GFX9-NEXT: s_cmp_ge_u32 s4, s3
6069 ; GFX9-NEXT: v_readfirstlane_b32 s8, v1
6070 ; GFX9-NEXT: s_cselect_b32 s3, s6, s4
6071 ; GFX9-NEXT: s_sub_i32 s4, 0, s2
6072 ; GFX9-NEXT: s_mul_i32 s4, s4, s8
6073 ; GFX9-NEXT: s_mul_hi_u32 s4, s8, s4
6074 ; GFX9-NEXT: s_add_i32 s8, s8, s4
6075 ; GFX9-NEXT: s_mul_hi_u32 s4, s5, s8
6076 ; GFX9-NEXT: s_mul_i32 s4, s4, s2
6077 ; GFX9-NEXT: s_sub_i32 s4, s5, s4
6078 ; GFX9-NEXT: s_sub_i32 s5, s4, s2
6079 ; GFX9-NEXT: s_cmp_ge_u32 s4, s2
6080 ; GFX9-NEXT: s_cselect_b32 s4, s5, s4
6081 ; GFX9-NEXT: s_sub_i32 s5, s4, s2
6082 ; GFX9-NEXT: s_cmp_ge_u32 s4, s2
6083 ; GFX9-NEXT: s_cselect_b32 s2, s5, s4
6084 ; GFX9-NEXT: v_mov_b32_e32 v0, s3
6085 ; GFX9-NEXT: v_mov_b32_e32 v1, s2
6086 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
6087 ; GFX9-NEXT: s_endpgm
6116 ; GFX9-LABEL: sdiv_i32_oddk_denom:
6117 ; GFX9: ; %bb.0:
6118 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
6119 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
6120 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
6121 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6122 ; GFX9-NEXT: s_mul_hi_i32 s0, s4, 0xd9528441
6123 ; GFX9-NEXT: s_add_i32 s0, s0, s4
6124 ; GFX9-NEXT: s_lshr_b32 s1, s0, 31
6125 ; GFX9-NEXT: s_ashr_i32 s0, s0, 20
6126 ; GFX9-NEXT: s_add_i32 s0, s0, s1
6127 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
6128 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
6129 ; GFX9-NEXT: s_endpgm
6156 ; GFX9-LABEL: sdiv_i32_pow2k_denom:
6157 ; GFX9: ; %bb.0:
6158 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
6159 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
6160 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
6161 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6162 ; GFX9-NEXT: s_ashr_i32 s0, s4, 31
6163 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
6164 ; GFX9-NEXT: s_add_i32 s4, s4, s0
6165 ; GFX9-NEXT: s_ashr_i32 s0, s4, 12
6166 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
6167 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
6168 ; GFX9-NEXT: s_endpgm
6221 ; GFX9-LABEL: sdiv_i32_pow2_shl_denom:
6222 ; GFX9: ; %bb.0:
6223 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
6224 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
6225 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
6226 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6227 ; GFX9-NEXT: s_lshl_b32 s3, 0x1000, s3
6228 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
6229 ; GFX9-NEXT: s_add_i32 s3, s3, s4
6230 ; GFX9-NEXT: s_xor_b32 s3, s3, s4
6231 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
6232 ; GFX9-NEXT: s_sub_i32 s5, 0, s3
6233 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
6234 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
6235 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
6236 ; GFX9-NEXT: v_mul_lo_u32 v1, s5, v0
6237 ; GFX9-NEXT: s_ashr_i32 s5, s2, 31
6238 ; GFX9-NEXT: s_add_i32 s2, s2, s5
6239 ; GFX9-NEXT: s_xor_b32 s2, s2, s5
6240 ; GFX9-NEXT: v_mul_hi_u32 v1, v0, v1
6241 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
6242 ; GFX9-NEXT: v_mul_hi_u32 v0, s2, v0
6243 ; GFX9-NEXT: v_mul_lo_u32 v1, v0, s3
6244 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
6245 ; GFX9-NEXT: v_sub_u32_e32 v1, s2, v1
6246 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v1
6247 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
6248 ; GFX9-NEXT: v_subrev_u32_e32 v3, s3, v1
6249 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
6250 ; GFX9-NEXT: v_add_u32_e32 v4, 1, v0
6251 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s3, v1
6252 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
6253 ; GFX9-NEXT: s_xor_b32 s2, s5, s4
6254 ; GFX9-NEXT: v_xor_b32_e32 v0, s2, v0
6255 ; GFX9-NEXT: v_subrev_u32_e32 v0, s2, v0
6256 ; GFX9-NEXT: global_store_dword v2, v0, s[0:1]
6257 ; GFX9-NEXT: s_endpgm
6295 ; GFX9-LABEL: sdiv_v2i32_pow2k_denom:
6296 ; GFX9: ; %bb.0:
6297 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
6298 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
6299 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
6300 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6301 ; GFX9-NEXT: s_ashr_i32 s0, s2, 31
6302 ; GFX9-NEXT: s_ashr_i32 s1, s3, 31
6303 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
6304 ; GFX9-NEXT: s_lshr_b32 s1, s1, 20
6305 ; GFX9-NEXT: s_add_i32 s0, s2, s0
6306 ; GFX9-NEXT: s_add_i32 s1, s3, s1
6307 ; GFX9-NEXT: s_ashr_i32 s0, s0, 12
6308 ; GFX9-NEXT: s_ashr_i32 s1, s1, 12
6309 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
6310 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
6311 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6312 ; GFX9-NEXT: s_endpgm
6350 ; GFX9-LABEL: ssdiv_v2i32_mixed_pow2k_denom:
6351 ; GFX9: ; %bb.0:
6352 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
6353 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
6354 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
6355 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6356 ; GFX9-NEXT: s_ashr_i32 s0, s2, 31
6357 ; GFX9-NEXT: s_mul_hi_i32 s1, s3, 0x80080081
6358 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
6359 ; GFX9-NEXT: s_add_i32 s1, s1, s3
6360 ; GFX9-NEXT: s_add_i32 s0, s2, s0
6361 ; GFX9-NEXT: s_lshr_b32 s2, s1, 31
6362 ; GFX9-NEXT: s_ashr_i32 s1, s1, 11
6363 ; GFX9-NEXT: s_ashr_i32 s0, s0, 12
6364 ; GFX9-NEXT: s_add_i32 s1, s1, s2
6365 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
6366 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
6367 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6368 ; GFX9-NEXT: s_endpgm
6530 ; GFX9-LABEL: sdiv_v2i32_pow2_shl_denom:
6531 ; GFX9: ; %bb.0:
6532 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
6533 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
6534 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
6535 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6536 ; GFX9-NEXT: s_lshl_b32 s0, 0x1000, s6
6537 ; GFX9-NEXT: s_ashr_i32 s1, s0, 31
6538 ; GFX9-NEXT: s_add_i32 s0, s0, s1
6539 ; GFX9-NEXT: s_xor_b32 s0, s0, s1
6540 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s0
6541 ; GFX9-NEXT: s_lshl_b32 s6, 0x1000, s7
6542 ; GFX9-NEXT: s_ashr_i32 s8, s6, 31
6543 ; GFX9-NEXT: s_add_i32 s6, s6, s8
6544 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
6545 ; GFX9-NEXT: s_xor_b32 s6, s6, s8
6546 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s6
6547 ; GFX9-NEXT: s_sub_i32 s10, 0, s0
6548 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
6549 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
6550 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v1
6551 ; GFX9-NEXT: s_ashr_i32 s7, s4, 31
6552 ; GFX9-NEXT: s_add_i32 s4, s4, s7
6553 ; GFX9-NEXT: v_mul_lo_u32 v3, s10, v0
6554 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1
6555 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
6556 ; GFX9-NEXT: s_sub_i32 s10, 0, s6
6557 ; GFX9-NEXT: v_mul_hi_u32 v3, v0, v3
6558 ; GFX9-NEXT: s_xor_b32 s4, s4, s7
6559 ; GFX9-NEXT: v_mul_lo_u32 v4, s10, v1
6560 ; GFX9-NEXT: s_ashr_i32 s9, s5, 31
6561 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v3
6562 ; GFX9-NEXT: v_mul_hi_u32 v0, s4, v0
6563 ; GFX9-NEXT: v_mul_hi_u32 v3, v1, v4
6564 ; GFX9-NEXT: s_add_i32 s5, s5, s9
6565 ; GFX9-NEXT: s_xor_b32 s5, s5, s9
6566 ; GFX9-NEXT: v_mul_lo_u32 v4, v0, s0
6567 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
6568 ; GFX9-NEXT: v_mul_hi_u32 v1, s5, v1
6569 ; GFX9-NEXT: v_add_u32_e32 v3, 1, v0
6570 ; GFX9-NEXT: v_sub_u32_e32 v4, s4, v4
6571 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s0, v4
6572 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
6573 ; GFX9-NEXT: v_subrev_u32_e32 v3, s0, v4
6574 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc
6575 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s0, v3
6576 ; GFX9-NEXT: v_mul_lo_u32 v3, v1, s6
6577 ; GFX9-NEXT: v_add_u32_e32 v4, 1, v0
6578 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
6579 ; GFX9-NEXT: v_add_u32_e32 v4, 1, v1
6580 ; GFX9-NEXT: v_sub_u32_e32 v3, s5, v3
6581 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
6582 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
6583 ; GFX9-NEXT: v_subrev_u32_e32 v4, s6, v3
6584 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
6585 ; GFX9-NEXT: v_add_u32_e32 v4, 1, v1
6586 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
6587 ; GFX9-NEXT: s_xor_b32 s1, s7, s1
6588 ; GFX9-NEXT: s_xor_b32 s0, s9, s8
6589 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
6590 ; GFX9-NEXT: v_xor_b32_e32 v0, s1, v0
6591 ; GFX9-NEXT: v_xor_b32_e32 v1, s0, v1
6592 ; GFX9-NEXT: v_subrev_u32_e32 v0, s1, v0
6593 ; GFX9-NEXT: v_subrev_u32_e32 v1, s0, v1
6594 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
6595 ; GFX9-NEXT: s_endpgm
6628 ; GFX9-LABEL: srem_i32_oddk_denom:
6629 ; GFX9: ; %bb.0:
6630 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
6631 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
6632 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
6633 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6634 ; GFX9-NEXT: s_mul_hi_i32 s0, s4, 0xd9528441
6635 ; GFX9-NEXT: s_add_i32 s0, s0, s4
6636 ; GFX9-NEXT: s_lshr_b32 s1, s0, 31
6637 ; GFX9-NEXT: s_ashr_i32 s0, s0, 20
6638 ; GFX9-NEXT: s_add_i32 s0, s0, s1
6639 ; GFX9-NEXT: s_mul_i32 s0, s0, 0x12d8fb
6640 ; GFX9-NEXT: s_sub_i32 s0, s4, s0
6641 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
6642 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
6643 ; GFX9-NEXT: s_endpgm
6671 ; GFX9-LABEL: srem_i32_pow2k_denom:
6672 ; GFX9: ; %bb.0:
6673 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x2c
6674 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
6675 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
6676 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6677 ; GFX9-NEXT: s_ashr_i32 s0, s4, 31
6678 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
6679 ; GFX9-NEXT: s_add_i32 s0, s4, s0
6680 ; GFX9-NEXT: s_and_b32 s0, s0, 0xfffff000
6681 ; GFX9-NEXT: s_sub_i32 s0, s4, s0
6682 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
6683 ; GFX9-NEXT: global_store_dword v0, v1, s[2:3]
6684 ; GFX9-NEXT: s_endpgm
6733 ; GFX9-LABEL: srem_i32_pow2_shl_denom:
6734 ; GFX9: ; %bb.0:
6735 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
6736 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
6737 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
6738 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6739 ; GFX9-NEXT: s_lshl_b32 s3, 0x1000, s3
6740 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
6741 ; GFX9-NEXT: s_add_i32 s3, s3, s4
6742 ; GFX9-NEXT: s_xor_b32 s3, s3, s4
6743 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
6744 ; GFX9-NEXT: s_sub_i32 s5, 0, s3
6745 ; GFX9-NEXT: s_ashr_i32 s4, s2, 31
6746 ; GFX9-NEXT: s_add_i32 s2, s2, s4
6747 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
6748 ; GFX9-NEXT: s_xor_b32 s2, s2, s4
6749 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
6750 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
6751 ; GFX9-NEXT: v_readfirstlane_b32 s6, v0
6752 ; GFX9-NEXT: s_mul_i32 s5, s5, s6
6753 ; GFX9-NEXT: s_mul_hi_u32 s5, s6, s5
6754 ; GFX9-NEXT: s_add_i32 s6, s6, s5
6755 ; GFX9-NEXT: s_mul_hi_u32 s5, s2, s6
6756 ; GFX9-NEXT: s_mul_i32 s5, s5, s3
6757 ; GFX9-NEXT: s_sub_i32 s2, s2, s5
6758 ; GFX9-NEXT: s_sub_i32 s5, s2, s3
6759 ; GFX9-NEXT: s_cmp_ge_u32 s2, s3
6760 ; GFX9-NEXT: s_cselect_b32 s2, s5, s2
6761 ; GFX9-NEXT: s_sub_i32 s5, s2, s3
6762 ; GFX9-NEXT: s_cmp_ge_u32 s2, s3
6763 ; GFX9-NEXT: s_cselect_b32 s2, s5, s2
6764 ; GFX9-NEXT: s_xor_b32 s2, s2, s4
6765 ; GFX9-NEXT: s_sub_i32 s2, s2, s4
6766 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
6767 ; GFX9-NEXT: global_store_dword v1, v0, s[0:1]
6768 ; GFX9-NEXT: s_endpgm
6808 ; GFX9-LABEL: srem_v2i32_pow2k_denom:
6809 ; GFX9: ; %bb.0:
6810 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
6811 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
6812 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
6813 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6814 ; GFX9-NEXT: s_ashr_i32 s0, s2, 31
6815 ; GFX9-NEXT: s_ashr_i32 s1, s3, 31
6816 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
6817 ; GFX9-NEXT: s_lshr_b32 s1, s1, 20
6818 ; GFX9-NEXT: s_add_i32 s0, s2, s0
6819 ; GFX9-NEXT: s_add_i32 s1, s3, s1
6820 ; GFX9-NEXT: s_and_b32 s0, s0, 0xfffff000
6821 ; GFX9-NEXT: s_and_b32 s1, s1, 0xfffff000
6822 ; GFX9-NEXT: s_sub_i32 s0, s2, s0
6823 ; GFX9-NEXT: s_sub_i32 s1, s3, s1
6824 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
6825 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
6826 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
6827 ; GFX9-NEXT: s_endpgm
6977 ; GFX9-LABEL: srem_v2i32_pow2_shl_denom:
6978 ; GFX9: ; %bb.0:
6979 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x2c
6980 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
6981 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
6982 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
6983 ; GFX9-NEXT: s_lshl_b32 s2, 0x1000, s6
6984 ; GFX9-NEXT: s_ashr_i32 s3, s2, 31
6985 ; GFX9-NEXT: s_add_i32 s2, s2, s3
6986 ; GFX9-NEXT: s_xor_b32 s2, s2, s3
6987 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s2
6988 ; GFX9-NEXT: s_lshl_b32 s3, 0x1000, s7
6989 ; GFX9-NEXT: s_sub_i32 s7, 0, s2
6990 ; GFX9-NEXT: s_ashr_i32 s6, s4, 31
6991 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
6992 ; GFX9-NEXT: s_add_i32 s4, s4, s6
6993 ; GFX9-NEXT: s_xor_b32 s4, s4, s6
6994 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
6995 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
6996 ; GFX9-NEXT: v_readfirstlane_b32 s8, v0
6997 ; GFX9-NEXT: s_mul_i32 s7, s7, s8
6998 ; GFX9-NEXT: s_mul_hi_u32 s7, s8, s7
6999 ; GFX9-NEXT: s_add_i32 s8, s8, s7
7000 ; GFX9-NEXT: s_mul_hi_u32 s7, s4, s8
7001 ; GFX9-NEXT: s_mul_i32 s7, s7, s2
7002 ; GFX9-NEXT: s_sub_i32 s4, s4, s7
7003 ; GFX9-NEXT: s_sub_i32 s7, s4, s2
7004 ; GFX9-NEXT: s_cmp_ge_u32 s4, s2
7005 ; GFX9-NEXT: s_cselect_b32 s4, s7, s4
7006 ; GFX9-NEXT: s_sub_i32 s7, s4, s2
7007 ; GFX9-NEXT: s_cmp_ge_u32 s4, s2
7008 ; GFX9-NEXT: s_cselect_b32 s2, s7, s4
7009 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
7010 ; GFX9-NEXT: s_add_i32 s3, s3, s4
7011 ; GFX9-NEXT: s_xor_b32 s3, s3, s4
7012 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s3
7013 ; GFX9-NEXT: s_xor_b32 s2, s2, s6
7014 ; GFX9-NEXT: s_sub_i32 s2, s2, s6
7015 ; GFX9-NEXT: s_sub_i32 s6, 0, s3
7016 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
7017 ; GFX9-NEXT: s_ashr_i32 s4, s5, 31
7018 ; GFX9-NEXT: s_add_i32 s5, s5, s4
7019 ; GFX9-NEXT: s_xor_b32 s5, s5, s4
7020 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
7021 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
7022 ; GFX9-NEXT: v_readfirstlane_b32 s7, v0
7023 ; GFX9-NEXT: s_mul_i32 s6, s6, s7
7024 ; GFX9-NEXT: s_mul_hi_u32 s6, s7, s6
7025 ; GFX9-NEXT: s_add_i32 s7, s7, s6
7026 ; GFX9-NEXT: s_mul_hi_u32 s6, s5, s7
7027 ; GFX9-NEXT: s_mul_i32 s6, s6, s3
7028 ; GFX9-NEXT: s_sub_i32 s5, s5, s6
7029 ; GFX9-NEXT: s_sub_i32 s6, s5, s3
7030 ; GFX9-NEXT: s_cmp_ge_u32 s5, s3
7031 ; GFX9-NEXT: s_cselect_b32 s5, s6, s5
7032 ; GFX9-NEXT: s_sub_i32 s6, s5, s3
7033 ; GFX9-NEXT: s_cmp_ge_u32 s5, s3
7034 ; GFX9-NEXT: s_cselect_b32 s3, s6, s5
7035 ; GFX9-NEXT: s_xor_b32 s3, s3, s4
7036 ; GFX9-NEXT: s_sub_i32 s3, s3, s4
7037 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
7038 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
7039 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
7040 ; GFX9-NEXT: s_endpgm
7174 ; GFX9-LABEL: udiv_i64_oddk_denom:
7175 ; GFX9: ; %bb.0:
7176 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x4f176a73
7177 ; GFX9-NEXT: v_mov_b32_e32 v1, 0x4f800000
7178 ; GFX9-NEXT: v_madmk_f32 v0, v1, 0x438f8000, v0
7179 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
7180 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
7181 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
7182 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
7183 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
7184 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
7185 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
7186 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
7187 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
7188 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
7189 ; GFX9-NEXT: s_mul_i32 s1, s0, 0xfffffee0
7190 ; GFX9-NEXT: s_mul_hi_u32 s2, s0, 0x68958c89
7191 ; GFX9-NEXT: s_add_i32 s1, s2, s1
7192 ; GFX9-NEXT: v_readfirstlane_b32 s2, v1
7193 ; GFX9-NEXT: s_mul_i32 s3, s2, 0x68958c89
7194 ; GFX9-NEXT: s_add_i32 s1, s1, s3
7195 ; GFX9-NEXT: s_mul_i32 s9, s0, 0x68958c89
7196 ; GFX9-NEXT: s_mul_hi_u32 s3, s0, s1
7197 ; GFX9-NEXT: s_mul_i32 s8, s0, s1
7198 ; GFX9-NEXT: s_mul_hi_u32 s0, s0, s9
7199 ; GFX9-NEXT: s_add_u32 s0, s0, s8
7200 ; GFX9-NEXT: s_addc_u32 s3, 0, s3
7201 ; GFX9-NEXT: s_mul_hi_u32 s10, s2, s9
7202 ; GFX9-NEXT: s_mul_i32 s9, s2, s9
7203 ; GFX9-NEXT: s_add_u32 s0, s0, s9
7204 ; GFX9-NEXT: s_mul_hi_u32 s8, s2, s1
7205 ; GFX9-NEXT: s_addc_u32 s0, s3, s10
7206 ; GFX9-NEXT: s_addc_u32 s3, s8, 0
7207 ; GFX9-NEXT: s_mul_i32 s1, s2, s1
7208 ; GFX9-NEXT: s_add_u32 s0, s0, s1
7209 ; GFX9-NEXT: s_addc_u32 s1, 0, s3
7210 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
7211 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7212 ; GFX9-NEXT: s_addc_u32 s0, s2, s1
7213 ; GFX9-NEXT: v_readfirstlane_b32 s2, v0
7214 ; GFX9-NEXT: s_mul_i32 s3, s2, 0xfffffee0
7215 ; GFX9-NEXT: s_mul_hi_u32 s8, s2, 0x68958c89
7216 ; GFX9-NEXT: s_mul_i32 s1, s0, 0x68958c89
7217 ; GFX9-NEXT: s_add_i32 s3, s8, s3
7218 ; GFX9-NEXT: s_add_i32 s3, s3, s1
7219 ; GFX9-NEXT: s_mul_i32 s9, s2, 0x68958c89
7220 ; GFX9-NEXT: s_mul_hi_u32 s1, s2, s3
7221 ; GFX9-NEXT: s_mul_i32 s8, s2, s3
7222 ; GFX9-NEXT: s_mul_hi_u32 s2, s2, s9
7223 ; GFX9-NEXT: s_add_u32 s2, s2, s8
7224 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
7225 ; GFX9-NEXT: s_mul_hi_u32 s10, s0, s9
7226 ; GFX9-NEXT: s_mul_i32 s9, s0, s9
7227 ; GFX9-NEXT: s_add_u32 s2, s2, s9
7228 ; GFX9-NEXT: s_mul_hi_u32 s8, s0, s3
7229 ; GFX9-NEXT: s_addc_u32 s1, s1, s10
7230 ; GFX9-NEXT: s_addc_u32 s2, s8, 0
7231 ; GFX9-NEXT: s_mul_i32 s3, s0, s3
7232 ; GFX9-NEXT: s_add_u32 s1, s1, s3
7233 ; GFX9-NEXT: s_addc_u32 s2, 0, s2
7234 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s1, v0
7235 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7236 ; GFX9-NEXT: s_addc_u32 s0, s0, s2
7237 ; GFX9-NEXT: v_readfirstlane_b32 s3, v0
7238 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
7239 ; GFX9-NEXT: s_mul_i32 s2, s6, s0
7240 ; GFX9-NEXT: s_mul_hi_u32 s8, s6, s3
7241 ; GFX9-NEXT: s_mul_hi_u32 s1, s6, s0
7242 ; GFX9-NEXT: s_add_u32 s2, s8, s2
7243 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
7244 ; GFX9-NEXT: s_mul_hi_u32 s9, s7, s3
7245 ; GFX9-NEXT: s_mul_i32 s3, s7, s3
7246 ; GFX9-NEXT: s_add_u32 s2, s2, s3
7247 ; GFX9-NEXT: s_mul_hi_u32 s8, s7, s0
7248 ; GFX9-NEXT: s_addc_u32 s1, s1, s9
7249 ; GFX9-NEXT: s_addc_u32 s2, s8, 0
7250 ; GFX9-NEXT: s_mul_i32 s0, s7, s0
7251 ; GFX9-NEXT: s_add_u32 s3, s1, s0
7252 ; GFX9-NEXT: s_addc_u32 s2, 0, s2
7253 ; GFX9-NEXT: s_mul_i32 s0, s3, 0x11f
7254 ; GFX9-NEXT: s_mul_hi_u32 s8, s3, 0x976a7377
7255 ; GFX9-NEXT: s_add_i32 s0, s8, s0
7256 ; GFX9-NEXT: s_mul_i32 s8, s2, 0x976a7377
7257 ; GFX9-NEXT: s_mul_i32 s9, s3, 0x976a7377
7258 ; GFX9-NEXT: s_add_i32 s8, s0, s8
7259 ; GFX9-NEXT: v_mov_b32_e32 v0, s9
7260 ; GFX9-NEXT: s_sub_i32 s0, s7, s8
7261 ; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s6, v0
7262 ; GFX9-NEXT: s_mov_b32 s1, 0x976a7377
7263 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7264 ; GFX9-NEXT: s_subb_u32 s6, s0, 0x11f
7265 ; GFX9-NEXT: v_subrev_co_u32_e64 v1, s[0:1], s1, v0
7266 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
7267 ; GFX9-NEXT: s_subb_u32 s6, s6, 0
7268 ; GFX9-NEXT: s_cmpk_gt_u32 s6, 0x11e
7269 ; GFX9-NEXT: s_mov_b32 s10, 0x976a7376
7270 ; GFX9-NEXT: s_cselect_b32 s9, -1, 0
7271 ; GFX9-NEXT: v_cmp_lt_u32_e64 s[0:1], s10, v1
7272 ; GFX9-NEXT: s_cmpk_eq_i32 s6, 0x11f
7273 ; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1, s[0:1]
7274 ; GFX9-NEXT: v_mov_b32_e32 v3, s9
7275 ; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0
7276 ; GFX9-NEXT: s_add_u32 s6, s3, 2
7277 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[0:1]
7278 ; GFX9-NEXT: s_addc_u32 s0, s2, 0
7279 ; GFX9-NEXT: s_add_u32 s9, s3, 1
7280 ; GFX9-NEXT: s_addc_u32 s1, s2, 0
7281 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7282 ; GFX9-NEXT: s_subb_u32 s7, s7, s8
7283 ; GFX9-NEXT: s_cmpk_gt_u32 s7, 0x11e
7284 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
7285 ; GFX9-NEXT: v_mov_b32_e32 v4, s0
7286 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v1
7287 ; GFX9-NEXT: s_cselect_b32 s8, -1, 0
7288 ; GFX9-NEXT: v_cmp_lt_u32_e32 vcc, s10, v0
7289 ; GFX9-NEXT: s_cmpk_eq_i32 s7, 0x11f
7290 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, v4, s[0:1]
7291 ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
7292 ; GFX9-NEXT: v_mov_b32_e32 v3, s8
7293 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
7294 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc
7295 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
7296 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
7297 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
7298 ; GFX9-NEXT: v_mov_b32_e32 v0, s9
7299 ; GFX9-NEXT: v_mov_b32_e32 v3, s6
7300 ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1]
7301 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
7302 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc
7303 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7304 ; GFX9-NEXT: s_endpgm
7330 ; GFX9-LABEL: udiv_i64_pow2k_denom:
7331 ; GFX9: ; %bb.0:
7332 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
7333 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
7334 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
7335 ; GFX9-NEXT: s_lshr_b64 s[2:3], s[2:3], 12
7336 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
7337 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
7338 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
7339 ; GFX9-NEXT: s_endpgm
7368 ; GFX9-LABEL: udiv_i64_pow2_shl_denom:
7369 ; GFX9: ; %bb.0:
7370 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x34
7371 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
7372 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
7373 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
7374 ; GFX9-NEXT: s_add_i32 s2, s2, 12
7375 ; GFX9-NEXT: s_lshr_b64 s[0:1], s[6:7], s2
7376 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
7377 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
7378 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7379 ; GFX9-NEXT: s_endpgm
7413 ; GFX9-LABEL: udiv_v2i64_pow2k_denom:
7414 ; GFX9: ; %bb.0:
7415 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
7416 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
7417 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
7418 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
7419 ; GFX9-NEXT: s_lshr_b64 s[0:1], s[4:5], 12
7420 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[6:7], 12
7421 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
7422 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
7423 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
7424 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
7425 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
7426 ; GFX9-NEXT: s_endpgm
7551 ; GFX9-LABEL: udiv_v2i64_mixed_pow2k_denom:
7552 ; GFX9: ; %bb.0:
7553 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x4f800000
7554 ; GFX9-NEXT: v_madak_f32 v0, 0, v0, 0x457ff000
7555 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
7556 ; GFX9-NEXT: s_movk_i32 s2, 0xf001
7557 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
7558 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
7559 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
7560 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
7561 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
7562 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
7563 ; GFX9-NEXT: v_mul_hi_u32 v2, v0, s2
7564 ; GFX9-NEXT: v_mul_lo_u32 v4, v1, s2
7565 ; GFX9-NEXT: v_mul_lo_u32 v3, v0, s2
7566 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v0
7567 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v4
7568 ; GFX9-NEXT: v_mul_hi_u32 v5, v0, v3
7569 ; GFX9-NEXT: v_mul_lo_u32 v4, v0, v2
7570 ; GFX9-NEXT: v_mul_hi_u32 v7, v0, v2
7571 ; GFX9-NEXT: v_mul_lo_u32 v6, v1, v3
7572 ; GFX9-NEXT: v_mul_hi_u32 v3, v1, v3
7573 ; GFX9-NEXT: v_mul_hi_u32 v8, v1, v2
7574 ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, v5, v4
7575 ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v7, vcc
7576 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, v2
7577 ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, v4, v6
7578 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc
7579 ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v8, vcc
7580 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v3, v2
7581 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v4, vcc
7582 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
7583 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc
7584 ; GFX9-NEXT: v_mul_hi_u32 v2, v0, s2
7585 ; GFX9-NEXT: v_mul_lo_u32 v3, v1, s2
7586 ; GFX9-NEXT: v_mul_lo_u32 v5, v0, s2
7587 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
7588 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
7589 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v0
7590 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v3
7591 ; GFX9-NEXT: v_mul_lo_u32 v3, v0, v2
7592 ; GFX9-NEXT: v_mul_hi_u32 v6, v0, v5
7593 ; GFX9-NEXT: v_mul_hi_u32 v7, v0, v2
7594 ; GFX9-NEXT: v_mul_hi_u32 v8, v1, v2
7595 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, v2
7596 ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v6, v3
7597 ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v7, vcc
7598 ; GFX9-NEXT: v_mul_lo_u32 v7, v1, v5
7599 ; GFX9-NEXT: v_mul_hi_u32 v5, v1, v5
7600 ; GFX9-NEXT: s_movk_i32 s0, 0xfff
7601 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
7602 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[4:5], 12
7603 ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v3, v7
7604 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v6, v5, vcc
7605 ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v8, vcc
7606 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v3, v2
7607 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v5, vcc
7608 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
7609 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc
7610 ; GFX9-NEXT: v_mul_lo_u32 v2, s6, v1
7611 ; GFX9-NEXT: v_mul_hi_u32 v3, s6, v0
7612 ; GFX9-NEXT: v_mul_hi_u32 v5, s6, v1
7613 ; GFX9-NEXT: v_mul_hi_u32 v6, s7, v1
7614 ; GFX9-NEXT: v_mul_lo_u32 v1, s7, v1
7615 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v3, v2
7616 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v5, vcc
7617 ; GFX9-NEXT: v_mul_lo_u32 v5, s7, v0
7618 ; GFX9-NEXT: v_mul_hi_u32 v0, s7, v0
7619 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
7620 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v5
7621 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, v3, v0, vcc
7622 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v6, vcc
7623 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v1
7624 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
7625 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 2, v0
7626 ; GFX9-NEXT: v_mul_lo_u32 v5, v1, s0
7627 ; GFX9-NEXT: v_mul_hi_u32 v6, v0, s0
7628 ; GFX9-NEXT: v_mul_lo_u32 v9, v0, s0
7629 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v1, vcc
7630 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, 1, v0
7631 ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v1, vcc
7632 ; GFX9-NEXT: v_add_u32_e32 v5, v6, v5
7633 ; GFX9-NEXT: v_mov_b32_e32 v6, s7
7634 ; GFX9-NEXT: v_sub_co_u32_e32 v9, vcc, s6, v9
7635 ; GFX9-NEXT: v_subb_co_u32_e32 v5, vcc, v6, v5, vcc
7636 ; GFX9-NEXT: v_subrev_co_u32_e32 v6, vcc, s0, v9
7637 ; GFX9-NEXT: v_subbrev_co_u32_e32 v10, vcc, 0, v5, vcc
7638 ; GFX9-NEXT: s_movk_i32 s0, 0xffe
7639 ; GFX9-NEXT: v_cmp_lt_u32_e32 vcc, s0, v6
7640 ; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
7641 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v10
7642 ; GFX9-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
7643 ; GFX9-NEXT: v_cmp_lt_u32_e64 s[0:1], s0, v9
7644 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6
7645 ; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
7646 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
7647 ; GFX9-NEXT: v_cndmask_b32_e64 v5, -1, v6, s[0:1]
7648 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc
7649 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
7650 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v1, v3, s[0:1]
7651 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v2, vcc
7652 ; GFX9-NEXT: v_cndmask_b32_e64 v2, v0, v1, s[0:1]
7653 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
7654 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
7655 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
7656 ; GFX9-NEXT: s_endpgm
7694 ; GFX9-LABEL: udiv_v2i64_pow2_shl_denom:
7695 ; GFX9: ; %bb.0:
7696 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
7697 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
7698 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
7699 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
7700 ; GFX9-NEXT: s_add_i32 s2, s8, 12
7701 ; GFX9-NEXT: s_add_i32 s8, s10, 12
7702 ; GFX9-NEXT: s_lshr_b64 s[2:3], s[4:5], s2
7703 ; GFX9-NEXT: s_lshr_b64 s[4:5], s[6:7], s8
7704 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
7705 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
7706 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
7707 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
7708 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
7709 ; GFX9-NEXT: s_endpgm
7842 ; GFX9-LABEL: urem_i64_oddk_denom:
7843 ; GFX9: ; %bb.0:
7844 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x4f1761f8
7845 ; GFX9-NEXT: v_mov_b32_e32 v1, 0x4f800000
7846 ; GFX9-NEXT: v_madmk_f32 v0, v1, 0x438f8000, v0
7847 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
7848 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
7849 ; GFX9-NEXT: s_mov_b32 s12, 0x9761f7c8
7850 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
7851 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
7852 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
7853 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
7854 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
7855 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
7856 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
7857 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
7858 ; GFX9-NEXT: s_mul_i32 s1, s0, 0xfffffee0
7859 ; GFX9-NEXT: s_mul_hi_u32 s2, s0, 0x689e0837
7860 ; GFX9-NEXT: s_add_i32 s1, s2, s1
7861 ; GFX9-NEXT: v_readfirstlane_b32 s2, v1
7862 ; GFX9-NEXT: s_mul_i32 s3, s2, 0x689e0837
7863 ; GFX9-NEXT: s_add_i32 s1, s1, s3
7864 ; GFX9-NEXT: s_mul_i32 s9, s0, 0x689e0837
7865 ; GFX9-NEXT: s_mul_hi_u32 s3, s0, s1
7866 ; GFX9-NEXT: s_mul_i32 s8, s0, s1
7867 ; GFX9-NEXT: s_mul_hi_u32 s0, s0, s9
7868 ; GFX9-NEXT: s_add_u32 s0, s0, s8
7869 ; GFX9-NEXT: s_addc_u32 s3, 0, s3
7870 ; GFX9-NEXT: s_mul_hi_u32 s10, s2, s9
7871 ; GFX9-NEXT: s_mul_i32 s9, s2, s9
7872 ; GFX9-NEXT: s_add_u32 s0, s0, s9
7873 ; GFX9-NEXT: s_mul_hi_u32 s8, s2, s1
7874 ; GFX9-NEXT: s_addc_u32 s0, s3, s10
7875 ; GFX9-NEXT: s_addc_u32 s3, s8, 0
7876 ; GFX9-NEXT: s_mul_i32 s1, s2, s1
7877 ; GFX9-NEXT: s_add_u32 s0, s0, s1
7878 ; GFX9-NEXT: s_addc_u32 s1, 0, s3
7879 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
7880 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7881 ; GFX9-NEXT: s_addc_u32 s0, s2, s1
7882 ; GFX9-NEXT: v_readfirstlane_b32 s2, v0
7883 ; GFX9-NEXT: s_mul_i32 s3, s2, 0xfffffee0
7884 ; GFX9-NEXT: s_mul_hi_u32 s8, s2, 0x689e0837
7885 ; GFX9-NEXT: s_mul_i32 s1, s0, 0x689e0837
7886 ; GFX9-NEXT: s_add_i32 s3, s8, s3
7887 ; GFX9-NEXT: s_add_i32 s3, s3, s1
7888 ; GFX9-NEXT: s_mul_i32 s9, s2, 0x689e0837
7889 ; GFX9-NEXT: s_mul_hi_u32 s1, s2, s3
7890 ; GFX9-NEXT: s_mul_i32 s8, s2, s3
7891 ; GFX9-NEXT: s_mul_hi_u32 s2, s2, s9
7892 ; GFX9-NEXT: s_add_u32 s2, s2, s8
7893 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
7894 ; GFX9-NEXT: s_mul_hi_u32 s10, s0, s9
7895 ; GFX9-NEXT: s_mul_i32 s9, s0, s9
7896 ; GFX9-NEXT: s_add_u32 s2, s2, s9
7897 ; GFX9-NEXT: s_mul_hi_u32 s8, s0, s3
7898 ; GFX9-NEXT: s_addc_u32 s1, s1, s10
7899 ; GFX9-NEXT: s_addc_u32 s2, s8, 0
7900 ; GFX9-NEXT: s_mul_i32 s3, s0, s3
7901 ; GFX9-NEXT: s_add_u32 s1, s1, s3
7902 ; GFX9-NEXT: s_addc_u32 s2, 0, s2
7903 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s1, v0
7904 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7905 ; GFX9-NEXT: s_addc_u32 s0, s0, s2
7906 ; GFX9-NEXT: v_readfirstlane_b32 s3, v0
7907 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
7908 ; GFX9-NEXT: s_mul_i32 s2, s6, s0
7909 ; GFX9-NEXT: s_mul_hi_u32 s8, s6, s3
7910 ; GFX9-NEXT: s_mul_hi_u32 s1, s6, s0
7911 ; GFX9-NEXT: s_add_u32 s2, s8, s2
7912 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
7913 ; GFX9-NEXT: s_mul_hi_u32 s9, s7, s3
7914 ; GFX9-NEXT: s_mul_i32 s3, s7, s3
7915 ; GFX9-NEXT: s_add_u32 s2, s2, s3
7916 ; GFX9-NEXT: s_mul_hi_u32 s8, s7, s0
7917 ; GFX9-NEXT: s_addc_u32 s1, s1, s9
7918 ; GFX9-NEXT: s_addc_u32 s2, s8, 0
7919 ; GFX9-NEXT: s_mul_i32 s0, s7, s0
7920 ; GFX9-NEXT: s_add_u32 s0, s1, s0
7921 ; GFX9-NEXT: s_addc_u32 s1, 0, s2
7922 ; GFX9-NEXT: s_mul_i32 s2, s0, 0x11f
7923 ; GFX9-NEXT: s_mul_hi_u32 s3, s0, 0x9761f7c9
7924 ; GFX9-NEXT: s_add_i32 s2, s3, s2
7925 ; GFX9-NEXT: s_mul_i32 s1, s1, 0x9761f7c9
7926 ; GFX9-NEXT: s_mul_i32 s0, s0, 0x9761f7c9
7927 ; GFX9-NEXT: s_add_i32 s9, s2, s1
7928 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
7929 ; GFX9-NEXT: s_sub_i32 s1, s7, s9
7930 ; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s6, v0
7931 ; GFX9-NEXT: s_mov_b32 s8, 0x9761f7c9
7932 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7933 ; GFX9-NEXT: s_subb_u32 s6, s1, 0x11f
7934 ; GFX9-NEXT: v_subrev_co_u32_e64 v3, s[0:1], s8, v0
7935 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
7936 ; GFX9-NEXT: s_subb_u32 s10, s6, 0
7937 ; GFX9-NEXT: s_cmpk_gt_u32 s10, 0x11e
7938 ; GFX9-NEXT: s_cselect_b32 s11, -1, 0
7939 ; GFX9-NEXT: v_cmp_lt_u32_e64 s[2:3], s12, v3
7940 ; GFX9-NEXT: s_cmpk_eq_i32 s10, 0x11f
7941 ; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1, s[2:3]
7942 ; GFX9-NEXT: v_mov_b32_e32 v4, s11
7943 ; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 0
7944 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
7945 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[2:3]
7946 ; GFX9-NEXT: s_subb_u32 s2, s6, 0x11f
7947 ; GFX9-NEXT: v_subrev_co_u32_e64 v4, s[0:1], s8, v3
7948 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
7949 ; GFX9-NEXT: s_subb_u32 s0, s2, 0
7950 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
7951 ; GFX9-NEXT: s_subb_u32 s2, s7, s9
7952 ; GFX9-NEXT: s_cmpk_gt_u32 s2, 0x11e
7953 ; GFX9-NEXT: v_mov_b32_e32 v5, s10
7954 ; GFX9-NEXT: v_mov_b32_e32 v6, s0
7955 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v1
7956 ; GFX9-NEXT: s_cselect_b32 s3, -1, 0
7957 ; GFX9-NEXT: v_cmp_lt_u32_e32 vcc, s12, v0
7958 ; GFX9-NEXT: s_cmpk_eq_i32 s2, 0x11f
7959 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v5, v6, s[0:1]
7960 ; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
7961 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
7962 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
7963 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v5, vcc
7964 ; GFX9-NEXT: v_mov_b32_e32 v6, s2
7965 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
7966 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[0:1]
7967 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc
7968 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
7969 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
7970 ; GFX9-NEXT: s_endpgm
7996 ; GFX9-LABEL: urem_i64_pow2k_denom:
7997 ; GFX9: ; %bb.0:
7998 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
7999 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
8000 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8001 ; GFX9-NEXT: s_and_b32 s2, s2, 0xfff
8002 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
8003 ; GFX9-NEXT: global_store_dwordx2 v1, v[0:1], s[0:1]
8004 ; GFX9-NEXT: s_endpgm
8036 ; GFX9-LABEL: urem_i64_pow2_shl_denom:
8037 ; GFX9: ; %bb.0:
8038 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x34
8039 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
8040 ; GFX9-NEXT: s_mov_b64 s[0:1], 0x1000
8041 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
8042 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8043 ; GFX9-NEXT: s_lshl_b64 s[0:1], s[0:1], s2
8044 ; GFX9-NEXT: s_add_u32 s0, s0, -1
8045 ; GFX9-NEXT: s_addc_u32 s1, s1, -1
8046 ; GFX9-NEXT: s_and_b64 s[0:1], s[6:7], s[0:1]
8047 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
8048 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
8049 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
8050 ; GFX9-NEXT: s_endpgm
8084 ; GFX9-LABEL: urem_v2i64_pow2k_denom:
8085 ; GFX9: ; %bb.0:
8086 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
8087 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
8088 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
8089 ; GFX9-NEXT: v_mov_b32_e32 v3, v1
8090 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8091 ; GFX9-NEXT: s_and_b32 s0, s4, 0xfff
8092 ; GFX9-NEXT: s_and_b32 s1, s6, 0xfff
8093 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
8094 ; GFX9-NEXT: v_mov_b32_e32 v2, s1
8095 ; GFX9-NEXT: global_store_dwordx4 v1, v[0:3], s[2:3]
8096 ; GFX9-NEXT: s_endpgm
8139 ; GFX9-LABEL: urem_v2i64_pow2_shl_denom:
8140 ; GFX9: ; %bb.0:
8141 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
8142 ; GFX9-NEXT: s_mov_b64 s[2:3], 0x1000
8143 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
8144 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
8145 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8146 ; GFX9-NEXT: s_lshl_b64 s[10:11], s[2:3], s10
8147 ; GFX9-NEXT: s_lshl_b64 s[2:3], s[2:3], s8
8148 ; GFX9-NEXT: s_add_u32 s2, s2, -1
8149 ; GFX9-NEXT: s_addc_u32 s3, s3, -1
8150 ; GFX9-NEXT: s_and_b64 s[2:3], s[4:5], s[2:3]
8151 ; GFX9-NEXT: s_add_u32 s4, s10, -1
8152 ; GFX9-NEXT: s_addc_u32 s5, s11, -1
8153 ; GFX9-NEXT: s_and_b64 s[4:5], s[6:7], s[4:5]
8154 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
8155 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
8156 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
8157 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
8158 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
8159 ; GFX9-NEXT: s_endpgm
8288 ; GFX9-LABEL: sdiv_i64_oddk_denom:
8289 ; GFX9: ; %bb.0:
8290 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x4f800000
8291 ; GFX9-NEXT: v_madak_f32 v0, 0, v0, 0x4996c7d8
8292 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
8293 ; GFX9-NEXT: s_mov_b32 s2, 0xffed2705
8294 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
8295 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
8296 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
8297 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
8298 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
8299 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
8300 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
8301 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, s2
8302 ; GFX9-NEXT: v_mul_hi_u32 v3, v0, s2
8303 ; GFX9-NEXT: v_mul_lo_u32 v4, v0, s2
8304 ; GFX9-NEXT: v_add_u32_e32 v2, v3, v2
8305 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v0
8306 ; GFX9-NEXT: v_mul_hi_u32 v3, v0, v4
8307 ; GFX9-NEXT: v_mul_lo_u32 v6, v0, v2
8308 ; GFX9-NEXT: v_mul_hi_u32 v7, v0, v2
8309 ; GFX9-NEXT: v_mul_lo_u32 v5, v1, v4
8310 ; GFX9-NEXT: v_mul_hi_u32 v4, v1, v4
8311 ; GFX9-NEXT: v_mul_hi_u32 v8, v1, v2
8312 ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v3, v6
8313 ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v7, vcc
8314 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, v2
8315 ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v3, v5
8316 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v6, v4, vcc
8317 ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v8, vcc
8318 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v3, v2
8319 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v4, vcc
8320 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
8321 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc
8322 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, s2
8323 ; GFX9-NEXT: v_mul_hi_u32 v3, v0, s2
8324 ; GFX9-NEXT: v_mul_lo_u32 v4, v0, s2
8325 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8326 ; GFX9-NEXT: s_ashr_i32 s2, s7, 31
8327 ; GFX9-NEXT: s_add_u32 s0, s6, s2
8328 ; GFX9-NEXT: v_add_u32_e32 v2, v3, v2
8329 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v0
8330 ; GFX9-NEXT: v_mul_lo_u32 v6, v0, v2
8331 ; GFX9-NEXT: v_mul_hi_u32 v7, v0, v4
8332 ; GFX9-NEXT: v_mul_hi_u32 v8, v0, v2
8333 ; GFX9-NEXT: v_mul_hi_u32 v5, v1, v4
8334 ; GFX9-NEXT: v_mul_lo_u32 v4, v1, v4
8335 ; GFX9-NEXT: v_mul_hi_u32 v3, v1, v2
8336 ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, v7, v6
8337 ; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v8, vcc
8338 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, v2
8339 ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, v6, v4
8340 ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, v7, v5, vcc
8341 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
8342 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
8343 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
8344 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
8345 ; GFX9-NEXT: s_mov_b32 s3, s2
8346 ; GFX9-NEXT: s_addc_u32 s1, s7, s2
8347 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc
8348 ; GFX9-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3]
8349 ; GFX9-NEXT: v_mul_lo_u32 v2, s0, v1
8350 ; GFX9-NEXT: v_mul_hi_u32 v3, s0, v0
8351 ; GFX9-NEXT: v_mul_hi_u32 v5, s0, v1
8352 ; GFX9-NEXT: v_mul_hi_u32 v6, s1, v1
8353 ; GFX9-NEXT: v_mul_lo_u32 v1, s1, v1
8354 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v3, v2
8355 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v5, vcc
8356 ; GFX9-NEXT: v_mul_lo_u32 v5, s1, v0
8357 ; GFX9-NEXT: v_mul_hi_u32 v0, s1, v0
8358 ; GFX9-NEXT: s_mov_b32 s3, 0x12d8fb
8359 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
8360 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v5
8361 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, v3, v0, vcc
8362 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v6, vcc
8363 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v1
8364 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
8365 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 2, v0
8366 ; GFX9-NEXT: v_mul_lo_u32 v5, v1, s3
8367 ; GFX9-NEXT: v_mul_hi_u32 v6, v0, s3
8368 ; GFX9-NEXT: v_mul_lo_u32 v9, v0, s3
8369 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v1, vcc
8370 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, 1, v0
8371 ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v1, vcc
8372 ; GFX9-NEXT: v_add_u32_e32 v5, v6, v5
8373 ; GFX9-NEXT: v_mov_b32_e32 v6, s1
8374 ; GFX9-NEXT: v_sub_co_u32_e32 v9, vcc, s0, v9
8375 ; GFX9-NEXT: v_subb_co_u32_e32 v5, vcc, v6, v5, vcc
8376 ; GFX9-NEXT: v_subrev_co_u32_e32 v6, vcc, s3, v9
8377 ; GFX9-NEXT: v_subbrev_co_u32_e32 v10, vcc, 0, v5, vcc
8378 ; GFX9-NEXT: s_mov_b32 s0, 0x12d8fa
8379 ; GFX9-NEXT: v_cmp_lt_u32_e32 vcc, s0, v6
8380 ; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
8381 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v10
8382 ; GFX9-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
8383 ; GFX9-NEXT: v_cmp_lt_u32_e64 s[0:1], s0, v9
8384 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6
8385 ; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
8386 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
8387 ; GFX9-NEXT: v_cndmask_b32_e64 v5, -1, v6, s[0:1]
8388 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
8389 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v7, v2, vcc
8390 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc
8391 ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
8392 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
8393 ; GFX9-NEXT: v_xor_b32_e32 v0, s2, v0
8394 ; GFX9-NEXT: v_xor_b32_e32 v1, s2, v1
8395 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
8396 ; GFX9-NEXT: v_subrev_co_u32_e32 v0, vcc, s2, v0
8397 ; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v2, vcc
8398 ; GFX9-NEXT: global_store_dwordx2 v4, v[0:1], s[4:5]
8399 ; GFX9-NEXT: s_endpgm
8429 ; GFX9-LABEL: sdiv_i64_pow2k_denom:
8430 ; GFX9: ; %bb.0:
8431 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
8432 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
8433 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8434 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
8435 ; GFX9-NEXT: s_lshr_b32 s4, s4, 20
8436 ; GFX9-NEXT: s_add_u32 s2, s2, s4
8437 ; GFX9-NEXT: s_addc_u32 s3, s3, 0
8438 ; GFX9-NEXT: s_ashr_i64 s[2:3], s[2:3], 12
8439 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
8440 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
8441 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
8442 ; GFX9-NEXT: s_endpgm
8592 ; GFX9-LABEL: sdiv_i64_pow2_shl_denom:
8593 ; GFX9: ; %bb.0:
8594 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x34
8595 ; GFX9-NEXT: s_mov_b64 s[2:3], 0x1000
8596 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8597 ; GFX9-NEXT: s_lshl_b64 s[4:5], s[2:3], s4
8598 ; GFX9-NEXT: s_ashr_i32 s2, s5, 31
8599 ; GFX9-NEXT: s_add_u32 s4, s4, s2
8600 ; GFX9-NEXT: s_mov_b32 s3, s2
8601 ; GFX9-NEXT: s_addc_u32 s5, s5, s2
8602 ; GFX9-NEXT: s_xor_b64 s[8:9], s[4:5], s[2:3]
8603 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s8
8604 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s9
8605 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
8606 ; GFX9-NEXT: s_sub_u32 s0, 0, s8
8607 ; GFX9-NEXT: s_subb_u32 s1, 0, s9
8608 ; GFX9-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
8609 ; GFX9-NEXT: v_rcp_f32_e32 v1, v0
8610 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
8611 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x5f7ffffc, v1
8612 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x2f800000, v1
8613 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
8614 ; GFX9-NEXT: v_mac_f32_e32 v1, 0xcf800000, v2
8615 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
8616 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
8617 ; GFX9-NEXT: v_readfirstlane_b32 s10, v2
8618 ; GFX9-NEXT: v_readfirstlane_b32 s11, v1
8619 ; GFX9-NEXT: s_mul_i32 s12, s0, s10
8620 ; GFX9-NEXT: s_mul_hi_u32 s14, s0, s11
8621 ; GFX9-NEXT: s_mul_i32 s13, s1, s11
8622 ; GFX9-NEXT: s_add_i32 s12, s14, s12
8623 ; GFX9-NEXT: s_add_i32 s12, s12, s13
8624 ; GFX9-NEXT: s_mul_i32 s15, s0, s11
8625 ; GFX9-NEXT: s_mul_hi_u32 s13, s11, s12
8626 ; GFX9-NEXT: s_mul_i32 s14, s11, s12
8627 ; GFX9-NEXT: s_mul_hi_u32 s11, s11, s15
8628 ; GFX9-NEXT: s_add_u32 s11, s11, s14
8629 ; GFX9-NEXT: s_addc_u32 s13, 0, s13
8630 ; GFX9-NEXT: s_mul_hi_u32 s16, s10, s15
8631 ; GFX9-NEXT: s_mul_i32 s15, s10, s15
8632 ; GFX9-NEXT: s_add_u32 s11, s11, s15
8633 ; GFX9-NEXT: s_mul_hi_u32 s14, s10, s12
8634 ; GFX9-NEXT: s_addc_u32 s11, s13, s16
8635 ; GFX9-NEXT: s_addc_u32 s13, s14, 0
8636 ; GFX9-NEXT: s_mul_i32 s12, s10, s12
8637 ; GFX9-NEXT: s_add_u32 s11, s11, s12
8638 ; GFX9-NEXT: s_addc_u32 s12, 0, s13
8639 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s11, v1
8640 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
8641 ; GFX9-NEXT: s_addc_u32 s10, s10, s12
8642 ; GFX9-NEXT: v_readfirstlane_b32 s12, v1
8643 ; GFX9-NEXT: s_mul_i32 s11, s0, s10
8644 ; GFX9-NEXT: s_mul_hi_u32 s13, s0, s12
8645 ; GFX9-NEXT: s_add_i32 s11, s13, s11
8646 ; GFX9-NEXT: s_mul_i32 s1, s1, s12
8647 ; GFX9-NEXT: s_add_i32 s11, s11, s1
8648 ; GFX9-NEXT: s_mul_i32 s0, s0, s12
8649 ; GFX9-NEXT: s_mul_hi_u32 s13, s10, s0
8650 ; GFX9-NEXT: s_mul_i32 s14, s10, s0
8651 ; GFX9-NEXT: s_mul_i32 s16, s12, s11
8652 ; GFX9-NEXT: s_mul_hi_u32 s0, s12, s0
8653 ; GFX9-NEXT: s_mul_hi_u32 s15, s12, s11
8654 ; GFX9-NEXT: s_add_u32 s0, s0, s16
8655 ; GFX9-NEXT: s_addc_u32 s12, 0, s15
8656 ; GFX9-NEXT: s_add_u32 s0, s0, s14
8657 ; GFX9-NEXT: s_mul_hi_u32 s1, s10, s11
8658 ; GFX9-NEXT: s_addc_u32 s0, s12, s13
8659 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
8660 ; GFX9-NEXT: s_mul_i32 s11, s10, s11
8661 ; GFX9-NEXT: s_add_u32 s0, s0, s11
8662 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
8663 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s0, v1
8664 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
8665 ; GFX9-NEXT: s_addc_u32 s12, s10, s1
8666 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8667 ; GFX9-NEXT: s_ashr_i32 s10, s7, 31
8668 ; GFX9-NEXT: s_add_u32 s0, s6, s10
8669 ; GFX9-NEXT: s_mov_b32 s11, s10
8670 ; GFX9-NEXT: s_addc_u32 s1, s7, s10
8671 ; GFX9-NEXT: s_xor_b64 s[6:7], s[0:1], s[10:11]
8672 ; GFX9-NEXT: v_readfirstlane_b32 s13, v1
8673 ; GFX9-NEXT: s_mul_i32 s1, s6, s12
8674 ; GFX9-NEXT: s_mul_hi_u32 s14, s6, s13
8675 ; GFX9-NEXT: s_mul_hi_u32 s0, s6, s12
8676 ; GFX9-NEXT: s_add_u32 s1, s14, s1
8677 ; GFX9-NEXT: s_addc_u32 s0, 0, s0
8678 ; GFX9-NEXT: s_mul_hi_u32 s15, s7, s13
8679 ; GFX9-NEXT: s_mul_i32 s13, s7, s13
8680 ; GFX9-NEXT: s_add_u32 s1, s1, s13
8681 ; GFX9-NEXT: s_mul_hi_u32 s14, s7, s12
8682 ; GFX9-NEXT: s_addc_u32 s0, s0, s15
8683 ; GFX9-NEXT: s_addc_u32 s1, s14, 0
8684 ; GFX9-NEXT: s_mul_i32 s12, s7, s12
8685 ; GFX9-NEXT: s_add_u32 s12, s0, s12
8686 ; GFX9-NEXT: s_addc_u32 s13, 0, s1
8687 ; GFX9-NEXT: s_mul_i32 s0, s8, s13
8688 ; GFX9-NEXT: s_mul_hi_u32 s1, s8, s12
8689 ; GFX9-NEXT: s_add_i32 s0, s1, s0
8690 ; GFX9-NEXT: s_mul_i32 s1, s9, s12
8691 ; GFX9-NEXT: s_add_i32 s14, s0, s1
8692 ; GFX9-NEXT: s_mul_i32 s1, s8, s12
8693 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
8694 ; GFX9-NEXT: s_sub_i32 s0, s7, s14
8695 ; GFX9-NEXT: v_sub_co_u32_e32 v1, vcc, s6, v1
8696 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
8697 ; GFX9-NEXT: s_subb_u32 s6, s0, s9
8698 ; GFX9-NEXT: v_subrev_co_u32_e64 v2, s[0:1], s8, v1
8699 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
8700 ; GFX9-NEXT: s_subb_u32 s6, s6, 0
8701 ; GFX9-NEXT: s_cmp_ge_u32 s6, s9
8702 ; GFX9-NEXT: s_cselect_b32 s15, -1, 0
8703 ; GFX9-NEXT: v_cmp_le_u32_e64 s[0:1], s8, v2
8704 ; GFX9-NEXT: s_cmp_eq_u32 s6, s9
8705 ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[0:1]
8706 ; GFX9-NEXT: v_mov_b32_e32 v3, s15
8707 ; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0
8708 ; GFX9-NEXT: s_add_u32 s6, s12, 2
8709 ; GFX9-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1]
8710 ; GFX9-NEXT: s_addc_u32 s0, s13, 0
8711 ; GFX9-NEXT: s_add_u32 s15, s12, 1
8712 ; GFX9-NEXT: s_addc_u32 s1, s13, 0
8713 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
8714 ; GFX9-NEXT: s_subb_u32 s7, s7, s14
8715 ; GFX9-NEXT: s_cmp_ge_u32 s7, s9
8716 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
8717 ; GFX9-NEXT: v_mov_b32_e32 v4, s0
8718 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v2
8719 ; GFX9-NEXT: s_cselect_b32 s14, -1, 0
8720 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s8, v1
8721 ; GFX9-NEXT: s_cmp_eq_u32 s7, s9
8722 ; GFX9-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[0:1]
8723 ; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
8724 ; GFX9-NEXT: v_mov_b32_e32 v3, s14
8725 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
8726 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
8727 ; GFX9-NEXT: v_mov_b32_e32 v3, s13
8728 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
8729 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc
8730 ; GFX9-NEXT: v_mov_b32_e32 v2, s15
8731 ; GFX9-NEXT: v_mov_b32_e32 v3, s6
8732 ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
8733 ; GFX9-NEXT: v_mov_b32_e32 v3, s12
8734 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
8735 ; GFX9-NEXT: s_xor_b64 s[0:1], s[10:11], s[2:3]
8736 ; GFX9-NEXT: v_xor_b32_e32 v2, s0, v2
8737 ; GFX9-NEXT: v_xor_b32_e32 v3, s1, v1
8738 ; GFX9-NEXT: v_mov_b32_e32 v4, s1
8739 ; GFX9-NEXT: v_subrev_co_u32_e32 v1, vcc, s0, v2
8740 ; GFX9-NEXT: v_subb_co_u32_e32 v2, vcc, v3, v4, vcc
8741 ; GFX9-NEXT: global_store_dwordx2 v0, v[1:2], s[4:5]
8742 ; GFX9-NEXT: s_endpgm
8784 ; GFX9-LABEL: sdiv_v2i64_pow2k_denom:
8785 ; GFX9: ; %bb.0:
8786 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
8787 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
8788 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
8789 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8790 ; GFX9-NEXT: s_ashr_i32 s0, s5, 31
8791 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
8792 ; GFX9-NEXT: s_add_u32 s0, s4, s0
8793 ; GFX9-NEXT: s_addc_u32 s1, s5, 0
8794 ; GFX9-NEXT: s_ashr_i32 s4, s7, 31
8795 ; GFX9-NEXT: s_ashr_i64 s[0:1], s[0:1], 12
8796 ; GFX9-NEXT: s_lshr_b32 s4, s4, 20
8797 ; GFX9-NEXT: s_add_u32 s4, s6, s4
8798 ; GFX9-NEXT: s_addc_u32 s5, s7, 0
8799 ; GFX9-NEXT: s_ashr_i64 s[4:5], s[4:5], 12
8800 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
8801 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
8802 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
8803 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
8804 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
8805 ; GFX9-NEXT: s_endpgm
8945 ; GFX9-LABEL: ssdiv_v2i64_mixed_pow2k_denom:
8946 ; GFX9: ; %bb.0:
8947 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x457ff000
8948 ; GFX9-NEXT: v_mov_b32_e32 v1, 0x4f800000
8949 ; GFX9-NEXT: v_mac_f32_e32 v0, 0, v1
8950 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
8951 ; GFX9-NEXT: s_movk_i32 s8, 0xf001
8952 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
8953 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
8954 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
8955 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
8956 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
8957 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
8958 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
8959 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
8960 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
8961 ; GFX9-NEXT: s_ashr_i32 s0, s5, 31
8962 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
8963 ; GFX9-NEXT: v_mul_hi_u32 v2, v0, s8
8964 ; GFX9-NEXT: v_mul_lo_u32 v3, v1, s8
8965 ; GFX9-NEXT: v_mul_lo_u32 v4, v0, s8
8966 ; GFX9-NEXT: s_add_u32 s0, s4, s0
8967 ; GFX9-NEXT: s_addc_u32 s1, s5, 0
8968 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v3
8969 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v0
8970 ; GFX9-NEXT: v_mul_lo_u32 v3, v0, v2
8971 ; GFX9-NEXT: v_mul_hi_u32 v5, v0, v4
8972 ; GFX9-NEXT: v_mul_hi_u32 v6, v0, v2
8973 ; GFX9-NEXT: v_mul_hi_u32 v7, v1, v2
8974 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, v2
8975 ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v5, v3
8976 ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v6, vcc
8977 ; GFX9-NEXT: v_mul_lo_u32 v6, v1, v4
8978 ; GFX9-NEXT: v_mul_hi_u32 v4, v1, v4
8979 ; GFX9-NEXT: s_ashr_i64 s[4:5], s[0:1], 12
8980 ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v3, v6
8981 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v4, vcc
8982 ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v7, vcc
8983 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v3, v2
8984 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v4, vcc
8985 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
8986 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc
8987 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, s8
8988 ; GFX9-NEXT: v_mul_hi_u32 v3, v0, s8
8989 ; GFX9-NEXT: v_mul_lo_u32 v4, v0, s8
8990 ; GFX9-NEXT: s_ashr_i32 s8, s7, 31
8991 ; GFX9-NEXT: s_add_u32 s0, s6, s8
8992 ; GFX9-NEXT: v_add_u32_e32 v2, v3, v2
8993 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v0
8994 ; GFX9-NEXT: v_mul_lo_u32 v6, v0, v2
8995 ; GFX9-NEXT: v_mul_hi_u32 v7, v0, v4
8996 ; GFX9-NEXT: v_mul_hi_u32 v8, v0, v2
8997 ; GFX9-NEXT: v_mul_hi_u32 v5, v1, v4
8998 ; GFX9-NEXT: v_mul_lo_u32 v4, v1, v4
8999 ; GFX9-NEXT: v_mul_hi_u32 v3, v1, v2
9000 ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, v7, v6
9001 ; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v8, vcc
9002 ; GFX9-NEXT: v_mul_lo_u32 v2, v1, v2
9003 ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, v6, v4
9004 ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, v7, v5, vcc
9005 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
9006 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
9007 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
9008 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
9009 ; GFX9-NEXT: s_mov_b32 s9, s8
9010 ; GFX9-NEXT: s_addc_u32 s1, s7, s8
9011 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc
9012 ; GFX9-NEXT: s_xor_b64 s[0:1], s[0:1], s[8:9]
9013 ; GFX9-NEXT: v_mul_lo_u32 v2, s0, v1
9014 ; GFX9-NEXT: v_mul_hi_u32 v3, s0, v0
9015 ; GFX9-NEXT: v_mul_hi_u32 v5, s0, v1
9016 ; GFX9-NEXT: v_mul_hi_u32 v6, s1, v1
9017 ; GFX9-NEXT: v_mul_lo_u32 v1, s1, v1
9018 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v3, v2
9019 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v5, vcc
9020 ; GFX9-NEXT: v_mul_lo_u32 v5, s1, v0
9021 ; GFX9-NEXT: v_mul_hi_u32 v0, s1, v0
9022 ; GFX9-NEXT: s_movk_i32 s6, 0xfff
9023 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
9024 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v5
9025 ; GFX9-NEXT: v_addc_co_u32_e32 v0, vcc, v3, v0, vcc
9026 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, 0, v6, vcc
9027 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v1
9028 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
9029 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 2, v0
9030 ; GFX9-NEXT: v_mul_lo_u32 v5, v1, s6
9031 ; GFX9-NEXT: v_mul_hi_u32 v6, v0, s6
9032 ; GFX9-NEXT: v_mul_lo_u32 v9, v0, s6
9033 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v1, vcc
9034 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, 1, v0
9035 ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v1, vcc
9036 ; GFX9-NEXT: v_add_u32_e32 v5, v6, v5
9037 ; GFX9-NEXT: v_mov_b32_e32 v6, s1
9038 ; GFX9-NEXT: v_sub_co_u32_e32 v9, vcc, s0, v9
9039 ; GFX9-NEXT: v_subb_co_u32_e32 v5, vcc, v6, v5, vcc
9040 ; GFX9-NEXT: v_subrev_co_u32_e32 v6, vcc, s6, v9
9041 ; GFX9-NEXT: v_subbrev_co_u32_e32 v10, vcc, 0, v5, vcc
9042 ; GFX9-NEXT: s_movk_i32 s0, 0xffe
9043 ; GFX9-NEXT: v_cmp_lt_u32_e32 vcc, s0, v6
9044 ; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
9045 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v10
9046 ; GFX9-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
9047 ; GFX9-NEXT: v_cmp_lt_u32_e64 s[0:1], s0, v9
9048 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6
9049 ; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
9050 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
9051 ; GFX9-NEXT: v_cndmask_b32_e64 v5, -1, v6, s[0:1]
9052 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
9053 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v7, v2, vcc
9054 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc
9055 ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
9056 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
9057 ; GFX9-NEXT: v_xor_b32_e32 v0, s8, v0
9058 ; GFX9-NEXT: v_xor_b32_e32 v1, s8, v1
9059 ; GFX9-NEXT: v_mov_b32_e32 v3, s8
9060 ; GFX9-NEXT: v_subrev_co_u32_e32 v2, vcc, s8, v0
9061 ; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v1, v3, vcc
9062 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
9063 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
9064 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
9065 ; GFX9-NEXT: s_endpgm
9343 ; GFX9-LABEL: sdiv_v2i64_pow2_shl_denom:
9344 ; GFX9: ; %bb.0:
9345 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
9346 ; GFX9-NEXT: s_mov_b64 s[2:3], 0x1000
9347 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
9348 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
9349 ; GFX9-NEXT: s_lshl_b64 s[10:11], s[2:3], s10
9350 ; GFX9-NEXT: s_lshl_b64 s[2:3], s[2:3], s8
9351 ; GFX9-NEXT: s_ashr_i32 s8, s3, 31
9352 ; GFX9-NEXT: s_add_u32 s2, s2, s8
9353 ; GFX9-NEXT: s_mov_b32 s9, s8
9354 ; GFX9-NEXT: s_addc_u32 s3, s3, s8
9355 ; GFX9-NEXT: s_xor_b64 s[12:13], s[2:3], s[8:9]
9356 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s12
9357 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s13
9358 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
9359 ; GFX9-NEXT: s_sub_u32 s0, 0, s12
9360 ; GFX9-NEXT: s_subb_u32 s1, 0, s13
9361 ; GFX9-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
9362 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
9363 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
9364 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
9365 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
9366 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
9367 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
9368 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
9369 ; GFX9-NEXT: v_readfirstlane_b32 s14, v1
9370 ; GFX9-NEXT: v_readfirstlane_b32 s15, v0
9371 ; GFX9-NEXT: s_mul_i32 s16, s0, s14
9372 ; GFX9-NEXT: s_mul_hi_u32 s18, s0, s15
9373 ; GFX9-NEXT: s_mul_i32 s17, s1, s15
9374 ; GFX9-NEXT: s_add_i32 s16, s18, s16
9375 ; GFX9-NEXT: s_add_i32 s16, s16, s17
9376 ; GFX9-NEXT: s_mul_i32 s19, s0, s15
9377 ; GFX9-NEXT: s_mul_hi_u32 s17, s15, s16
9378 ; GFX9-NEXT: s_mul_i32 s18, s15, s16
9379 ; GFX9-NEXT: s_mul_hi_u32 s15, s15, s19
9380 ; GFX9-NEXT: s_add_u32 s15, s15, s18
9381 ; GFX9-NEXT: s_addc_u32 s17, 0, s17
9382 ; GFX9-NEXT: s_mul_hi_u32 s20, s14, s19
9383 ; GFX9-NEXT: s_mul_i32 s19, s14, s19
9384 ; GFX9-NEXT: s_add_u32 s15, s15, s19
9385 ; GFX9-NEXT: s_mul_hi_u32 s18, s14, s16
9386 ; GFX9-NEXT: s_addc_u32 s15, s17, s20
9387 ; GFX9-NEXT: s_addc_u32 s17, s18, 0
9388 ; GFX9-NEXT: s_mul_i32 s16, s14, s16
9389 ; GFX9-NEXT: s_add_u32 s15, s15, s16
9390 ; GFX9-NEXT: s_addc_u32 s16, 0, s17
9391 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s15, v0
9392 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9393 ; GFX9-NEXT: s_addc_u32 s14, s14, s16
9394 ; GFX9-NEXT: v_readfirstlane_b32 s16, v0
9395 ; GFX9-NEXT: s_mul_i32 s15, s0, s14
9396 ; GFX9-NEXT: s_mul_hi_u32 s17, s0, s16
9397 ; GFX9-NEXT: s_add_i32 s15, s17, s15
9398 ; GFX9-NEXT: s_mul_i32 s1, s1, s16
9399 ; GFX9-NEXT: s_add_i32 s15, s15, s1
9400 ; GFX9-NEXT: s_mul_i32 s0, s0, s16
9401 ; GFX9-NEXT: s_mul_hi_u32 s17, s14, s0
9402 ; GFX9-NEXT: s_mul_i32 s18, s14, s0
9403 ; GFX9-NEXT: s_mul_i32 s20, s16, s15
9404 ; GFX9-NEXT: s_mul_hi_u32 s0, s16, s0
9405 ; GFX9-NEXT: s_mul_hi_u32 s19, s16, s15
9406 ; GFX9-NEXT: s_add_u32 s0, s0, s20
9407 ; GFX9-NEXT: s_addc_u32 s16, 0, s19
9408 ; GFX9-NEXT: s_add_u32 s0, s0, s18
9409 ; GFX9-NEXT: s_mul_hi_u32 s1, s14, s15
9410 ; GFX9-NEXT: s_addc_u32 s0, s16, s17
9411 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
9412 ; GFX9-NEXT: s_mul_i32 s15, s14, s15
9413 ; GFX9-NEXT: s_add_u32 s0, s0, s15
9414 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
9415 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
9416 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9417 ; GFX9-NEXT: s_addc_u32 s16, s14, s1
9418 ; GFX9-NEXT: s_ashr_i32 s14, s5, 31
9419 ; GFX9-NEXT: s_add_u32 s0, s4, s14
9420 ; GFX9-NEXT: s_mov_b32 s15, s14
9421 ; GFX9-NEXT: s_addc_u32 s1, s5, s14
9422 ; GFX9-NEXT: s_xor_b64 s[4:5], s[0:1], s[14:15]
9423 ; GFX9-NEXT: v_readfirstlane_b32 s17, v0
9424 ; GFX9-NEXT: s_mul_i32 s1, s4, s16
9425 ; GFX9-NEXT: s_mul_hi_u32 s18, s4, s17
9426 ; GFX9-NEXT: s_mul_hi_u32 s0, s4, s16
9427 ; GFX9-NEXT: s_add_u32 s1, s18, s1
9428 ; GFX9-NEXT: s_addc_u32 s0, 0, s0
9429 ; GFX9-NEXT: s_mul_hi_u32 s19, s5, s17
9430 ; GFX9-NEXT: s_mul_i32 s17, s5, s17
9431 ; GFX9-NEXT: s_add_u32 s1, s1, s17
9432 ; GFX9-NEXT: s_mul_hi_u32 s18, s5, s16
9433 ; GFX9-NEXT: s_addc_u32 s0, s0, s19
9434 ; GFX9-NEXT: s_addc_u32 s1, s18, 0
9435 ; GFX9-NEXT: s_mul_i32 s16, s5, s16
9436 ; GFX9-NEXT: s_add_u32 s16, s0, s16
9437 ; GFX9-NEXT: s_addc_u32 s17, 0, s1
9438 ; GFX9-NEXT: s_mul_i32 s0, s12, s17
9439 ; GFX9-NEXT: s_mul_hi_u32 s1, s12, s16
9440 ; GFX9-NEXT: s_add_i32 s0, s1, s0
9441 ; GFX9-NEXT: s_mul_i32 s1, s13, s16
9442 ; GFX9-NEXT: s_add_i32 s18, s0, s1
9443 ; GFX9-NEXT: s_mul_i32 s1, s12, s16
9444 ; GFX9-NEXT: v_mov_b32_e32 v0, s1
9445 ; GFX9-NEXT: s_sub_i32 s0, s5, s18
9446 ; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s4, v0
9447 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9448 ; GFX9-NEXT: s_subb_u32 s4, s0, s13
9449 ; GFX9-NEXT: v_subrev_co_u32_e64 v1, s[0:1], s12, v0
9450 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
9451 ; GFX9-NEXT: s_subb_u32 s4, s4, 0
9452 ; GFX9-NEXT: s_cmp_ge_u32 s4, s13
9453 ; GFX9-NEXT: s_cselect_b32 s19, -1, 0
9454 ; GFX9-NEXT: v_cmp_le_u32_e64 s[0:1], s12, v1
9455 ; GFX9-NEXT: s_cmp_eq_u32 s4, s13
9456 ; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, -1, s[0:1]
9457 ; GFX9-NEXT: v_mov_b32_e32 v2, s19
9458 ; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0
9459 ; GFX9-NEXT: s_add_u32 s4, s16, 2
9460 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v2, v1, s[0:1]
9461 ; GFX9-NEXT: s_addc_u32 s0, s17, 0
9462 ; GFX9-NEXT: s_add_u32 s19, s16, 1
9463 ; GFX9-NEXT: s_addc_u32 s1, s17, 0
9464 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9465 ; GFX9-NEXT: s_subb_u32 s5, s5, s18
9466 ; GFX9-NEXT: s_cmp_ge_u32 s5, s13
9467 ; GFX9-NEXT: v_mov_b32_e32 v2, s1
9468 ; GFX9-NEXT: v_mov_b32_e32 v3, s0
9469 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v1
9470 ; GFX9-NEXT: s_cselect_b32 s18, -1, 0
9471 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s12, v0
9472 ; GFX9-NEXT: s_cmp_eq_u32 s5, s13
9473 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1]
9474 ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
9475 ; GFX9-NEXT: v_mov_b32_e32 v2, s18
9476 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
9477 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
9478 ; GFX9-NEXT: v_mov_b32_e32 v2, s17
9479 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
9480 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc
9481 ; GFX9-NEXT: v_mov_b32_e32 v1, s19
9482 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
9483 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]
9484 ; GFX9-NEXT: s_xor_b64 s[0:1], s[14:15], s[8:9]
9485 ; GFX9-NEXT: s_ashr_i32 s4, s11, 31
9486 ; GFX9-NEXT: s_add_u32 s8, s10, s4
9487 ; GFX9-NEXT: s_mov_b32 s5, s4
9488 ; GFX9-NEXT: s_addc_u32 s9, s11, s4
9489 ; GFX9-NEXT: v_mov_b32_e32 v2, s16
9490 ; GFX9-NEXT: s_xor_b64 s[8:9], s[8:9], s[4:5]
9491 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc
9492 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s8
9493 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s9
9494 ; GFX9-NEXT: v_xor_b32_e32 v1, s0, v1
9495 ; GFX9-NEXT: v_xor_b32_e32 v5, s1, v0
9496 ; GFX9-NEXT: v_subrev_co_u32_e32 v0, vcc, s0, v1
9497 ; GFX9-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
9498 ; GFX9-NEXT: v_rcp_f32_e32 v2, v2
9499 ; GFX9-NEXT: s_sub_u32 s0, 0, s8
9500 ; GFX9-NEXT: v_mov_b32_e32 v6, s1
9501 ; GFX9-NEXT: s_subb_u32 s1, 0, s9
9502 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
9503 ; GFX9-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
9504 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
9505 ; GFX9-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
9506 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
9507 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v3
9508 ; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v5, v6, vcc
9509 ; GFX9-NEXT: v_readfirstlane_b32 s10, v2
9510 ; GFX9-NEXT: v_readfirstlane_b32 s13, v3
9511 ; GFX9-NEXT: s_mul_hi_u32 s12, s0, s10
9512 ; GFX9-NEXT: s_mul_i32 s14, s0, s13
9513 ; GFX9-NEXT: s_mul_i32 s11, s1, s10
9514 ; GFX9-NEXT: s_add_i32 s12, s12, s14
9515 ; GFX9-NEXT: s_add_i32 s12, s12, s11
9516 ; GFX9-NEXT: s_mul_i32 s15, s0, s10
9517 ; GFX9-NEXT: s_mul_hi_u32 s11, s10, s12
9518 ; GFX9-NEXT: s_mul_i32 s14, s10, s12
9519 ; GFX9-NEXT: s_mul_hi_u32 s10, s10, s15
9520 ; GFX9-NEXT: s_add_u32 s10, s10, s14
9521 ; GFX9-NEXT: s_addc_u32 s11, 0, s11
9522 ; GFX9-NEXT: s_mul_hi_u32 s16, s13, s15
9523 ; GFX9-NEXT: s_mul_i32 s15, s13, s15
9524 ; GFX9-NEXT: s_add_u32 s10, s10, s15
9525 ; GFX9-NEXT: s_mul_hi_u32 s14, s13, s12
9526 ; GFX9-NEXT: s_addc_u32 s10, s11, s16
9527 ; GFX9-NEXT: s_addc_u32 s11, s14, 0
9528 ; GFX9-NEXT: s_mul_i32 s12, s13, s12
9529 ; GFX9-NEXT: s_add_u32 s10, s10, s12
9530 ; GFX9-NEXT: s_addc_u32 s11, 0, s11
9531 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s10, v2
9532 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9533 ; GFX9-NEXT: s_addc_u32 s10, s13, s11
9534 ; GFX9-NEXT: v_readfirstlane_b32 s12, v2
9535 ; GFX9-NEXT: s_mul_i32 s11, s0, s10
9536 ; GFX9-NEXT: s_mul_hi_u32 s13, s0, s12
9537 ; GFX9-NEXT: s_add_i32 s11, s13, s11
9538 ; GFX9-NEXT: s_mul_i32 s1, s1, s12
9539 ; GFX9-NEXT: s_add_i32 s11, s11, s1
9540 ; GFX9-NEXT: s_mul_i32 s0, s0, s12
9541 ; GFX9-NEXT: s_mul_hi_u32 s13, s10, s0
9542 ; GFX9-NEXT: s_mul_i32 s14, s10, s0
9543 ; GFX9-NEXT: s_mul_i32 s16, s12, s11
9544 ; GFX9-NEXT: s_mul_hi_u32 s0, s12, s0
9545 ; GFX9-NEXT: s_mul_hi_u32 s15, s12, s11
9546 ; GFX9-NEXT: s_add_u32 s0, s0, s16
9547 ; GFX9-NEXT: s_addc_u32 s12, 0, s15
9548 ; GFX9-NEXT: s_add_u32 s0, s0, s14
9549 ; GFX9-NEXT: s_mul_hi_u32 s1, s10, s11
9550 ; GFX9-NEXT: s_addc_u32 s0, s12, s13
9551 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
9552 ; GFX9-NEXT: s_mul_i32 s11, s10, s11
9553 ; GFX9-NEXT: s_add_u32 s0, s0, s11
9554 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
9555 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2
9556 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9557 ; GFX9-NEXT: s_addc_u32 s12, s10, s1
9558 ; GFX9-NEXT: s_ashr_i32 s10, s7, 31
9559 ; GFX9-NEXT: s_add_u32 s0, s6, s10
9560 ; GFX9-NEXT: s_mov_b32 s11, s10
9561 ; GFX9-NEXT: s_addc_u32 s1, s7, s10
9562 ; GFX9-NEXT: s_xor_b64 s[6:7], s[0:1], s[10:11]
9563 ; GFX9-NEXT: v_readfirstlane_b32 s13, v2
9564 ; GFX9-NEXT: s_mul_i32 s1, s6, s12
9565 ; GFX9-NEXT: s_mul_hi_u32 s14, s6, s13
9566 ; GFX9-NEXT: s_mul_hi_u32 s0, s6, s12
9567 ; GFX9-NEXT: s_add_u32 s1, s14, s1
9568 ; GFX9-NEXT: s_addc_u32 s0, 0, s0
9569 ; GFX9-NEXT: s_mul_hi_u32 s15, s7, s13
9570 ; GFX9-NEXT: s_mul_i32 s13, s7, s13
9571 ; GFX9-NEXT: s_add_u32 s1, s1, s13
9572 ; GFX9-NEXT: s_mul_hi_u32 s14, s7, s12
9573 ; GFX9-NEXT: s_addc_u32 s0, s0, s15
9574 ; GFX9-NEXT: s_addc_u32 s1, s14, 0
9575 ; GFX9-NEXT: s_mul_i32 s12, s7, s12
9576 ; GFX9-NEXT: s_add_u32 s12, s0, s12
9577 ; GFX9-NEXT: s_addc_u32 s13, 0, s1
9578 ; GFX9-NEXT: s_mul_i32 s0, s8, s13
9579 ; GFX9-NEXT: s_mul_hi_u32 s1, s8, s12
9580 ; GFX9-NEXT: s_add_i32 s0, s1, s0
9581 ; GFX9-NEXT: s_mul_i32 s1, s9, s12
9582 ; GFX9-NEXT: s_add_i32 s14, s0, s1
9583 ; GFX9-NEXT: s_mul_i32 s1, s8, s12
9584 ; GFX9-NEXT: v_mov_b32_e32 v2, s1
9585 ; GFX9-NEXT: s_sub_i32 s0, s7, s14
9586 ; GFX9-NEXT: v_sub_co_u32_e32 v2, vcc, s6, v2
9587 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9588 ; GFX9-NEXT: s_subb_u32 s6, s0, s9
9589 ; GFX9-NEXT: v_subrev_co_u32_e64 v3, s[0:1], s8, v2
9590 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
9591 ; GFX9-NEXT: s_subb_u32 s6, s6, 0
9592 ; GFX9-NEXT: s_cmp_ge_u32 s6, s9
9593 ; GFX9-NEXT: s_cselect_b32 s15, -1, 0
9594 ; GFX9-NEXT: v_cmp_le_u32_e64 s[0:1], s8, v3
9595 ; GFX9-NEXT: s_cmp_eq_u32 s6, s9
9596 ; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[0:1]
9597 ; GFX9-NEXT: v_mov_b32_e32 v5, s15
9598 ; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0
9599 ; GFX9-NEXT: s_add_u32 s6, s12, 2
9600 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v5, v3, s[0:1]
9601 ; GFX9-NEXT: s_addc_u32 s0, s13, 0
9602 ; GFX9-NEXT: s_add_u32 s15, s12, 1
9603 ; GFX9-NEXT: s_addc_u32 s1, s13, 0
9604 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9605 ; GFX9-NEXT: s_subb_u32 s7, s7, s14
9606 ; GFX9-NEXT: s_cmp_ge_u32 s7, s9
9607 ; GFX9-NEXT: v_mov_b32_e32 v5, s1
9608 ; GFX9-NEXT: v_mov_b32_e32 v6, s0
9609 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3
9610 ; GFX9-NEXT: s_cselect_b32 s14, -1, 0
9611 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s8, v2
9612 ; GFX9-NEXT: s_cmp_eq_u32 s7, s9
9613 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v5, v6, s[0:1]
9614 ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc
9615 ; GFX9-NEXT: v_mov_b32_e32 v5, s14
9616 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
9617 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc
9618 ; GFX9-NEXT: v_mov_b32_e32 v5, s13
9619 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
9620 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v3, vcc
9621 ; GFX9-NEXT: v_mov_b32_e32 v3, s15
9622 ; GFX9-NEXT: v_mov_b32_e32 v5, s6
9623 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[0:1]
9624 ; GFX9-NEXT: v_mov_b32_e32 v5, s12
9625 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc
9626 ; GFX9-NEXT: s_xor_b64 s[0:1], s[10:11], s[4:5]
9627 ; GFX9-NEXT: v_xor_b32_e32 v3, s0, v3
9628 ; GFX9-NEXT: v_xor_b32_e32 v5, s1, v2
9629 ; GFX9-NEXT: v_mov_b32_e32 v6, s1
9630 ; GFX9-NEXT: v_subrev_co_u32_e32 v2, vcc, s0, v3
9631 ; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v5, v6, vcc
9632 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
9633 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
9634 ; GFX9-NEXT: s_endpgm
9761 ; GFX9-LABEL: srem_i64_oddk_denom:
9762 ; GFX9: ; %bb.0:
9763 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x4996c7d8
9764 ; GFX9-NEXT: v_mov_b32_e32 v1, 0x4f800000
9765 ; GFX9-NEXT: v_mac_f32_e32 v0, 0, v1
9766 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
9767 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
9768 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
9769 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
9770 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
9771 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
9772 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
9773 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
9774 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
9775 ; GFX9-NEXT: v_readfirstlane_b32 s0, v1
9776 ; GFX9-NEXT: v_readfirstlane_b32 s1, v0
9777 ; GFX9-NEXT: s_mul_hi_u32 s2, s1, 0xffed2705
9778 ; GFX9-NEXT: s_mul_i32 s3, s0, 0xffed2705
9779 ; GFX9-NEXT: s_add_i32 s2, s2, s3
9780 ; GFX9-NEXT: s_sub_i32 s2, s2, s1
9781 ; GFX9-NEXT: s_mul_i32 s9, s1, 0xffed2705
9782 ; GFX9-NEXT: s_mul_hi_u32 s3, s1, s2
9783 ; GFX9-NEXT: s_mul_i32 s8, s1, s2
9784 ; GFX9-NEXT: s_mul_hi_u32 s1, s1, s9
9785 ; GFX9-NEXT: s_add_u32 s1, s1, s8
9786 ; GFX9-NEXT: s_addc_u32 s3, 0, s3
9787 ; GFX9-NEXT: s_mul_hi_u32 s10, s0, s9
9788 ; GFX9-NEXT: s_mul_i32 s9, s0, s9
9789 ; GFX9-NEXT: s_add_u32 s1, s1, s9
9790 ; GFX9-NEXT: s_mul_hi_u32 s8, s0, s2
9791 ; GFX9-NEXT: s_addc_u32 s1, s3, s10
9792 ; GFX9-NEXT: s_addc_u32 s3, s8, 0
9793 ; GFX9-NEXT: s_mul_i32 s2, s0, s2
9794 ; GFX9-NEXT: s_add_u32 s1, s1, s2
9795 ; GFX9-NEXT: s_addc_u32 s2, 0, s3
9796 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s1, v0
9797 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9798 ; GFX9-NEXT: s_addc_u32 s0, s0, s2
9799 ; GFX9-NEXT: v_readfirstlane_b32 s2, v0
9800 ; GFX9-NEXT: s_mul_i32 s1, s0, 0xffed2705
9801 ; GFX9-NEXT: s_mul_hi_u32 s3, s2, 0xffed2705
9802 ; GFX9-NEXT: s_add_i32 s3, s3, s1
9803 ; GFX9-NEXT: s_sub_i32 s1, s3, s2
9804 ; GFX9-NEXT: s_mul_i32 s8, s2, 0xffed2705
9805 ; GFX9-NEXT: s_mul_hi_u32 s11, s2, s1
9806 ; GFX9-NEXT: s_mul_i32 s12, s2, s1
9807 ; GFX9-NEXT: s_mul_hi_u32 s2, s2, s8
9808 ; GFX9-NEXT: s_add_u32 s2, s2, s12
9809 ; GFX9-NEXT: s_mul_hi_u32 s9, s0, s8
9810 ; GFX9-NEXT: s_mul_i32 s10, s0, s8
9811 ; GFX9-NEXT: s_addc_u32 s8, 0, s11
9812 ; GFX9-NEXT: s_add_u32 s2, s2, s10
9813 ; GFX9-NEXT: s_mul_hi_u32 s3, s0, s1
9814 ; GFX9-NEXT: s_addc_u32 s2, s8, s9
9815 ; GFX9-NEXT: s_addc_u32 s3, s3, 0
9816 ; GFX9-NEXT: s_mul_i32 s1, s0, s1
9817 ; GFX9-NEXT: s_add_u32 s1, s2, s1
9818 ; GFX9-NEXT: s_addc_u32 s2, 0, s3
9819 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s1, v0
9820 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9821 ; GFX9-NEXT: s_addc_u32 s8, s0, s2
9822 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
9823 ; GFX9-NEXT: s_ashr_i32 s2, s7, 31
9824 ; GFX9-NEXT: s_add_u32 s0, s6, s2
9825 ; GFX9-NEXT: s_mov_b32 s3, s2
9826 ; GFX9-NEXT: s_addc_u32 s1, s7, s2
9827 ; GFX9-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3]
9828 ; GFX9-NEXT: v_readfirstlane_b32 s7, v0
9829 ; GFX9-NEXT: s_mul_i32 s6, s0, s8
9830 ; GFX9-NEXT: s_mul_hi_u32 s9, s0, s7
9831 ; GFX9-NEXT: s_mul_hi_u32 s3, s0, s8
9832 ; GFX9-NEXT: s_add_u32 s6, s9, s6
9833 ; GFX9-NEXT: s_addc_u32 s3, 0, s3
9834 ; GFX9-NEXT: s_mul_hi_u32 s10, s1, s7
9835 ; GFX9-NEXT: s_mul_i32 s7, s1, s7
9836 ; GFX9-NEXT: s_add_u32 s6, s6, s7
9837 ; GFX9-NEXT: s_mul_hi_u32 s9, s1, s8
9838 ; GFX9-NEXT: s_addc_u32 s3, s3, s10
9839 ; GFX9-NEXT: s_addc_u32 s6, s9, 0
9840 ; GFX9-NEXT: s_mul_i32 s7, s1, s8
9841 ; GFX9-NEXT: s_add_u32 s3, s3, s7
9842 ; GFX9-NEXT: s_addc_u32 s6, 0, s6
9843 ; GFX9-NEXT: s_mul_hi_u32 s8, s3, 0x12d8fb
9844 ; GFX9-NEXT: s_mul_i32 s3, s3, 0x12d8fb
9845 ; GFX9-NEXT: s_mul_i32 s6, s6, 0x12d8fb
9846 ; GFX9-NEXT: v_mov_b32_e32 v0, s3
9847 ; GFX9-NEXT: s_add_i32 s8, s8, s6
9848 ; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s0, v0
9849 ; GFX9-NEXT: s_mov_b32 s7, 0x12d8fb
9850 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9851 ; GFX9-NEXT: s_subb_u32 s3, s1, s8
9852 ; GFX9-NEXT: v_subrev_co_u32_e32 v1, vcc, s7, v0
9853 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9854 ; GFX9-NEXT: s_subb_u32 s0, s3, 0
9855 ; GFX9-NEXT: v_subrev_co_u32_e32 v3, vcc, s7, v1
9856 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
9857 ; GFX9-NEXT: s_subb_u32 s1, s0, 0
9858 ; GFX9-NEXT: s_mov_b32 s6, 0x12d8fa
9859 ; GFX9-NEXT: v_cmp_lt_u32_e32 vcc, s6, v1
9860 ; GFX9-NEXT: s_cmp_eq_u32 s0, 0
9861 ; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc
9862 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
9863 ; GFX9-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc
9864 ; GFX9-NEXT: v_mov_b32_e32 v5, s0
9865 ; GFX9-NEXT: v_mov_b32_e32 v6, s1
9866 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4
9867 ; GFX9-NEXT: v_cmp_lt_u32_e64 s[0:1], s6, v0
9868 ; GFX9-NEXT: s_cmp_eq_u32 s3, 0
9869 ; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
9870 ; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
9871 ; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0
9872 ; GFX9-NEXT: v_cndmask_b32_e64 v5, -1, v5, s[0:1]
9873 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
9874 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
9875 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
9876 ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[0:1]
9877 ; GFX9-NEXT: v_cndmask_b32_e64 v4, v6, v4, s[0:1]
9878 ; GFX9-NEXT: v_xor_b32_e32 v0, s2, v0
9879 ; GFX9-NEXT: v_xor_b32_e32 v1, s2, v4
9880 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
9881 ; GFX9-NEXT: v_subrev_co_u32_e32 v0, vcc, s2, v0
9882 ; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc
9883 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
9884 ; GFX9-NEXT: s_endpgm
9916 ; GFX9-LABEL: srem_i64_pow2k_denom:
9917 ; GFX9: ; %bb.0:
9918 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
9919 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
9920 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
9921 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
9922 ; GFX9-NEXT: s_lshr_b32 s4, s4, 20
9923 ; GFX9-NEXT: s_add_u32 s4, s2, s4
9924 ; GFX9-NEXT: s_addc_u32 s5, s3, 0
9925 ; GFX9-NEXT: s_and_b32 s4, s4, 0xfffff000
9926 ; GFX9-NEXT: s_sub_u32 s2, s2, s4
9927 ; GFX9-NEXT: s_subb_u32 s3, s3, s5
9928 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
9929 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
9930 ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
9931 ; GFX9-NEXT: s_endpgm
10079 ; GFX9-LABEL: srem_i64_pow2_shl_denom:
10080 ; GFX9: ; %bb.0:
10081 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x34
10082 ; GFX9-NEXT: s_mov_b64 s[2:3], 0x1000
10083 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
10084 ; GFX9-NEXT: s_lshl_b64 s[2:3], s[2:3], s4
10085 ; GFX9-NEXT: s_ashr_i32 s4, s3, 31
10086 ; GFX9-NEXT: s_add_u32 s2, s2, s4
10087 ; GFX9-NEXT: s_mov_b32 s5, s4
10088 ; GFX9-NEXT: s_addc_u32 s3, s3, s4
10089 ; GFX9-NEXT: s_xor_b64 s[8:9], s[2:3], s[4:5]
10090 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s8
10091 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s9
10092 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
10093 ; GFX9-NEXT: s_sub_u32 s0, 0, s8
10094 ; GFX9-NEXT: s_subb_u32 s1, 0, s9
10095 ; GFX9-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
10096 ; GFX9-NEXT: v_rcp_f32_e32 v1, v0
10097 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
10098 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x5f7ffffc, v1
10099 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x2f800000, v1
10100 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
10101 ; GFX9-NEXT: v_mac_f32_e32 v1, 0xcf800000, v2
10102 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
10103 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
10104 ; GFX9-NEXT: v_readfirstlane_b32 s2, v2
10105 ; GFX9-NEXT: v_readfirstlane_b32 s3, v1
10106 ; GFX9-NEXT: s_mul_i32 s10, s0, s2
10107 ; GFX9-NEXT: s_mul_hi_u32 s12, s0, s3
10108 ; GFX9-NEXT: s_mul_i32 s11, s1, s3
10109 ; GFX9-NEXT: s_add_i32 s10, s12, s10
10110 ; GFX9-NEXT: s_add_i32 s10, s10, s11
10111 ; GFX9-NEXT: s_mul_i32 s13, s0, s3
10112 ; GFX9-NEXT: s_mul_hi_u32 s11, s3, s10
10113 ; GFX9-NEXT: s_mul_i32 s12, s3, s10
10114 ; GFX9-NEXT: s_mul_hi_u32 s3, s3, s13
10115 ; GFX9-NEXT: s_add_u32 s3, s3, s12
10116 ; GFX9-NEXT: s_addc_u32 s11, 0, s11
10117 ; GFX9-NEXT: s_mul_hi_u32 s14, s2, s13
10118 ; GFX9-NEXT: s_mul_i32 s13, s2, s13
10119 ; GFX9-NEXT: s_add_u32 s3, s3, s13
10120 ; GFX9-NEXT: s_mul_hi_u32 s12, s2, s10
10121 ; GFX9-NEXT: s_addc_u32 s3, s11, s14
10122 ; GFX9-NEXT: s_addc_u32 s11, s12, 0
10123 ; GFX9-NEXT: s_mul_i32 s10, s2, s10
10124 ; GFX9-NEXT: s_add_u32 s3, s3, s10
10125 ; GFX9-NEXT: s_addc_u32 s10, 0, s11
10126 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s3, v1
10127 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10128 ; GFX9-NEXT: s_addc_u32 s2, s2, s10
10129 ; GFX9-NEXT: v_readfirstlane_b32 s10, v1
10130 ; GFX9-NEXT: s_mul_i32 s3, s0, s2
10131 ; GFX9-NEXT: s_mul_hi_u32 s11, s0, s10
10132 ; GFX9-NEXT: s_add_i32 s3, s11, s3
10133 ; GFX9-NEXT: s_mul_i32 s1, s1, s10
10134 ; GFX9-NEXT: s_add_i32 s3, s3, s1
10135 ; GFX9-NEXT: s_mul_i32 s0, s0, s10
10136 ; GFX9-NEXT: s_mul_hi_u32 s11, s2, s0
10137 ; GFX9-NEXT: s_mul_i32 s12, s2, s0
10138 ; GFX9-NEXT: s_mul_i32 s14, s10, s3
10139 ; GFX9-NEXT: s_mul_hi_u32 s0, s10, s0
10140 ; GFX9-NEXT: s_mul_hi_u32 s13, s10, s3
10141 ; GFX9-NEXT: s_add_u32 s0, s0, s14
10142 ; GFX9-NEXT: s_addc_u32 s10, 0, s13
10143 ; GFX9-NEXT: s_add_u32 s0, s0, s12
10144 ; GFX9-NEXT: s_mul_hi_u32 s1, s2, s3
10145 ; GFX9-NEXT: s_addc_u32 s0, s10, s11
10146 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
10147 ; GFX9-NEXT: s_mul_i32 s3, s2, s3
10148 ; GFX9-NEXT: s_add_u32 s0, s0, s3
10149 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
10150 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s0, v1
10151 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10152 ; GFX9-NEXT: s_addc_u32 s2, s2, s1
10153 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
10154 ; GFX9-NEXT: s_ashr_i32 s10, s7, 31
10155 ; GFX9-NEXT: s_add_u32 s0, s6, s10
10156 ; GFX9-NEXT: s_mov_b32 s11, s10
10157 ; GFX9-NEXT: s_addc_u32 s1, s7, s10
10158 ; GFX9-NEXT: s_xor_b64 s[6:7], s[0:1], s[10:11]
10159 ; GFX9-NEXT: v_readfirstlane_b32 s3, v1
10160 ; GFX9-NEXT: s_mul_i32 s1, s6, s2
10161 ; GFX9-NEXT: s_mul_hi_u32 s11, s6, s3
10162 ; GFX9-NEXT: s_mul_hi_u32 s0, s6, s2
10163 ; GFX9-NEXT: s_add_u32 s1, s11, s1
10164 ; GFX9-NEXT: s_addc_u32 s0, 0, s0
10165 ; GFX9-NEXT: s_mul_hi_u32 s12, s7, s3
10166 ; GFX9-NEXT: s_mul_i32 s3, s7, s3
10167 ; GFX9-NEXT: s_add_u32 s1, s1, s3
10168 ; GFX9-NEXT: s_mul_hi_u32 s11, s7, s2
10169 ; GFX9-NEXT: s_addc_u32 s0, s0, s12
10170 ; GFX9-NEXT: s_addc_u32 s1, s11, 0
10171 ; GFX9-NEXT: s_mul_i32 s2, s7, s2
10172 ; GFX9-NEXT: s_add_u32 s0, s0, s2
10173 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
10174 ; GFX9-NEXT: s_mul_i32 s1, s8, s1
10175 ; GFX9-NEXT: s_mul_hi_u32 s2, s8, s0
10176 ; GFX9-NEXT: s_add_i32 s1, s2, s1
10177 ; GFX9-NEXT: s_mul_i32 s2, s9, s0
10178 ; GFX9-NEXT: s_mul_i32 s0, s8, s0
10179 ; GFX9-NEXT: s_add_i32 s11, s1, s2
10180 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
10181 ; GFX9-NEXT: s_sub_i32 s1, s7, s11
10182 ; GFX9-NEXT: v_sub_co_u32_e32 v1, vcc, s6, v1
10183 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10184 ; GFX9-NEXT: s_subb_u32 s6, s1, s9
10185 ; GFX9-NEXT: v_subrev_co_u32_e64 v2, s[0:1], s8, v1
10186 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10187 ; GFX9-NEXT: s_subb_u32 s12, s6, 0
10188 ; GFX9-NEXT: s_cmp_ge_u32 s12, s9
10189 ; GFX9-NEXT: s_cselect_b32 s13, -1, 0
10190 ; GFX9-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v2
10191 ; GFX9-NEXT: s_cmp_eq_u32 s12, s9
10192 ; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[2:3]
10193 ; GFX9-NEXT: v_mov_b32_e32 v4, s13
10194 ; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 0
10195 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10196 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v4, v3, s[2:3]
10197 ; GFX9-NEXT: s_subb_u32 s2, s6, s9
10198 ; GFX9-NEXT: v_subrev_co_u32_e64 v4, s[0:1], s8, v2
10199 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10200 ; GFX9-NEXT: s_subb_u32 s0, s2, 0
10201 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10202 ; GFX9-NEXT: s_subb_u32 s2, s7, s11
10203 ; GFX9-NEXT: s_cmp_ge_u32 s2, s9
10204 ; GFX9-NEXT: v_mov_b32_e32 v5, s12
10205 ; GFX9-NEXT: v_mov_b32_e32 v6, s0
10206 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3
10207 ; GFX9-NEXT: s_cselect_b32 s3, -1, 0
10208 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s8, v1
10209 ; GFX9-NEXT: s_cmp_eq_u32 s2, s9
10210 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v5, v6, s[0:1]
10211 ; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
10212 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
10213 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
10214 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v5, vcc
10215 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
10216 ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1]
10217 ; GFX9-NEXT: v_mov_b32_e32 v6, s2
10218 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
10219 ; GFX9-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc
10220 ; GFX9-NEXT: v_xor_b32_e32 v1, s10, v1
10221 ; GFX9-NEXT: v_xor_b32_e32 v2, s10, v3
10222 ; GFX9-NEXT: v_mov_b32_e32 v3, s10
10223 ; GFX9-NEXT: v_subrev_co_u32_e32 v1, vcc, s10, v1
10224 ; GFX9-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v3, vcc
10225 ; GFX9-NEXT: global_store_dwordx2 v0, v[1:2], s[4:5]
10226 ; GFX9-NEXT: s_endpgm
10272 ; GFX9-LABEL: srem_v2i64_pow2k_denom:
10273 ; GFX9: ; %bb.0:
10274 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
10275 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
10276 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
10277 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
10278 ; GFX9-NEXT: s_ashr_i32 s0, s5, 31
10279 ; GFX9-NEXT: s_lshr_b32 s0, s0, 20
10280 ; GFX9-NEXT: s_add_u32 s0, s4, s0
10281 ; GFX9-NEXT: s_addc_u32 s1, s5, 0
10282 ; GFX9-NEXT: s_and_b32 s0, s0, 0xfffff000
10283 ; GFX9-NEXT: s_sub_u32 s0, s4, s0
10284 ; GFX9-NEXT: s_subb_u32 s1, s5, s1
10285 ; GFX9-NEXT: s_ashr_i32 s4, s7, 31
10286 ; GFX9-NEXT: s_lshr_b32 s4, s4, 20
10287 ; GFX9-NEXT: s_add_u32 s4, s6, s4
10288 ; GFX9-NEXT: s_addc_u32 s5, s7, 0
10289 ; GFX9-NEXT: s_and_b32 s4, s4, 0xfffff000
10290 ; GFX9-NEXT: s_sub_u32 s4, s6, s4
10291 ; GFX9-NEXT: s_subb_u32 s5, s7, s5
10292 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
10293 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
10294 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
10295 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
10296 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]
10297 ; GFX9-NEXT: s_endpgm
10571 ; GFX9-LABEL: srem_v2i64_pow2_shl_denom:
10572 ; GFX9: ; %bb.0:
10573 ; GFX9-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x34
10574 ; GFX9-NEXT: s_mov_b64 s[2:3], 0x1000
10575 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
10576 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
10577 ; GFX9-NEXT: s_lshl_b64 s[10:11], s[2:3], s10
10578 ; GFX9-NEXT: s_lshl_b64 s[2:3], s[2:3], s8
10579 ; GFX9-NEXT: s_ashr_i32 s8, s3, 31
10580 ; GFX9-NEXT: s_add_u32 s2, s2, s8
10581 ; GFX9-NEXT: s_mov_b32 s9, s8
10582 ; GFX9-NEXT: s_addc_u32 s3, s3, s8
10583 ; GFX9-NEXT: s_xor_b64 s[12:13], s[2:3], s[8:9]
10584 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s12
10585 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s13
10586 ; GFX9-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x24
10587 ; GFX9-NEXT: s_sub_u32 s0, 0, s12
10588 ; GFX9-NEXT: s_subb_u32 s1, 0, s13
10589 ; GFX9-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
10590 ; GFX9-NEXT: v_rcp_f32_e32 v0, v0
10591 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
10592 ; GFX9-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
10593 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
10594 ; GFX9-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
10595 ; GFX9-NEXT: v_cvt_u32_f32_e32 v1, v1
10596 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
10597 ; GFX9-NEXT: v_readfirstlane_b32 s2, v1
10598 ; GFX9-NEXT: v_readfirstlane_b32 s3, v0
10599 ; GFX9-NEXT: s_mul_i32 s14, s0, s2
10600 ; GFX9-NEXT: s_mul_hi_u32 s16, s0, s3
10601 ; GFX9-NEXT: s_mul_i32 s15, s1, s3
10602 ; GFX9-NEXT: s_add_i32 s14, s16, s14
10603 ; GFX9-NEXT: s_add_i32 s14, s14, s15
10604 ; GFX9-NEXT: s_mul_i32 s17, s0, s3
10605 ; GFX9-NEXT: s_mul_hi_u32 s15, s3, s14
10606 ; GFX9-NEXT: s_mul_i32 s16, s3, s14
10607 ; GFX9-NEXT: s_mul_hi_u32 s3, s3, s17
10608 ; GFX9-NEXT: s_add_u32 s3, s3, s16
10609 ; GFX9-NEXT: s_addc_u32 s15, 0, s15
10610 ; GFX9-NEXT: s_mul_hi_u32 s18, s2, s17
10611 ; GFX9-NEXT: s_mul_i32 s17, s2, s17
10612 ; GFX9-NEXT: s_add_u32 s3, s3, s17
10613 ; GFX9-NEXT: s_mul_hi_u32 s16, s2, s14
10614 ; GFX9-NEXT: s_addc_u32 s3, s15, s18
10615 ; GFX9-NEXT: s_addc_u32 s15, s16, 0
10616 ; GFX9-NEXT: s_mul_i32 s14, s2, s14
10617 ; GFX9-NEXT: s_add_u32 s3, s3, s14
10618 ; GFX9-NEXT: s_addc_u32 s14, 0, s15
10619 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s3, v0
10620 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10621 ; GFX9-NEXT: s_addc_u32 s2, s2, s14
10622 ; GFX9-NEXT: v_readfirstlane_b32 s14, v0
10623 ; GFX9-NEXT: s_mul_i32 s3, s0, s2
10624 ; GFX9-NEXT: s_mul_hi_u32 s15, s0, s14
10625 ; GFX9-NEXT: s_add_i32 s3, s15, s3
10626 ; GFX9-NEXT: s_mul_i32 s1, s1, s14
10627 ; GFX9-NEXT: s_add_i32 s3, s3, s1
10628 ; GFX9-NEXT: s_mul_i32 s0, s0, s14
10629 ; GFX9-NEXT: s_mul_hi_u32 s15, s2, s0
10630 ; GFX9-NEXT: s_mul_i32 s16, s2, s0
10631 ; GFX9-NEXT: s_mul_i32 s18, s14, s3
10632 ; GFX9-NEXT: s_mul_hi_u32 s0, s14, s0
10633 ; GFX9-NEXT: s_mul_hi_u32 s17, s14, s3
10634 ; GFX9-NEXT: s_add_u32 s0, s0, s18
10635 ; GFX9-NEXT: s_addc_u32 s14, 0, s17
10636 ; GFX9-NEXT: s_add_u32 s0, s0, s16
10637 ; GFX9-NEXT: s_mul_hi_u32 s1, s2, s3
10638 ; GFX9-NEXT: s_addc_u32 s0, s14, s15
10639 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
10640 ; GFX9-NEXT: s_mul_i32 s3, s2, s3
10641 ; GFX9-NEXT: s_add_u32 s0, s0, s3
10642 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
10643 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
10644 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10645 ; GFX9-NEXT: s_addc_u32 s2, s2, s1
10646 ; GFX9-NEXT: s_ashr_i32 s14, s5, 31
10647 ; GFX9-NEXT: s_add_u32 s0, s4, s14
10648 ; GFX9-NEXT: s_mov_b32 s15, s14
10649 ; GFX9-NEXT: s_addc_u32 s1, s5, s14
10650 ; GFX9-NEXT: s_xor_b64 s[4:5], s[0:1], s[14:15]
10651 ; GFX9-NEXT: v_readfirstlane_b32 s3, v0
10652 ; GFX9-NEXT: s_mul_i32 s1, s4, s2
10653 ; GFX9-NEXT: s_mul_hi_u32 s15, s4, s3
10654 ; GFX9-NEXT: s_mul_hi_u32 s0, s4, s2
10655 ; GFX9-NEXT: s_add_u32 s1, s15, s1
10656 ; GFX9-NEXT: s_addc_u32 s0, 0, s0
10657 ; GFX9-NEXT: s_mul_hi_u32 s16, s5, s3
10658 ; GFX9-NEXT: s_mul_i32 s3, s5, s3
10659 ; GFX9-NEXT: s_add_u32 s1, s1, s3
10660 ; GFX9-NEXT: s_mul_hi_u32 s15, s5, s2
10661 ; GFX9-NEXT: s_addc_u32 s0, s0, s16
10662 ; GFX9-NEXT: s_addc_u32 s1, s15, 0
10663 ; GFX9-NEXT: s_mul_i32 s2, s5, s2
10664 ; GFX9-NEXT: s_add_u32 s0, s0, s2
10665 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
10666 ; GFX9-NEXT: s_mul_i32 s1, s12, s1
10667 ; GFX9-NEXT: s_mul_hi_u32 s2, s12, s0
10668 ; GFX9-NEXT: s_add_i32 s1, s2, s1
10669 ; GFX9-NEXT: s_mul_i32 s2, s13, s0
10670 ; GFX9-NEXT: s_mul_i32 s0, s12, s0
10671 ; GFX9-NEXT: s_add_i32 s15, s1, s2
10672 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
10673 ; GFX9-NEXT: s_sub_i32 s1, s5, s15
10674 ; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s4, v0
10675 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10676 ; GFX9-NEXT: s_subb_u32 s4, s1, s13
10677 ; GFX9-NEXT: v_subrev_co_u32_e64 v1, s[0:1], s12, v0
10678 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10679 ; GFX9-NEXT: s_subb_u32 s16, s4, 0
10680 ; GFX9-NEXT: s_cmp_ge_u32 s16, s13
10681 ; GFX9-NEXT: s_cselect_b32 s17, -1, 0
10682 ; GFX9-NEXT: v_cmp_le_u32_e64 s[2:3], s12, v1
10683 ; GFX9-NEXT: s_cmp_eq_u32 s16, s13
10684 ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1, s[2:3]
10685 ; GFX9-NEXT: v_mov_b32_e32 v3, s17
10686 ; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 0
10687 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10688 ; GFX9-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[2:3]
10689 ; GFX9-NEXT: s_subb_u32 s2, s4, s13
10690 ; GFX9-NEXT: v_subrev_co_u32_e64 v3, s[0:1], s12, v1
10691 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10692 ; GFX9-NEXT: s_subb_u32 s0, s2, 0
10693 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10694 ; GFX9-NEXT: s_subb_u32 s2, s5, s15
10695 ; GFX9-NEXT: s_cmp_ge_u32 s2, s13
10696 ; GFX9-NEXT: v_mov_b32_e32 v5, s16
10697 ; GFX9-NEXT: v_mov_b32_e32 v6, s0
10698 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v2
10699 ; GFX9-NEXT: s_cselect_b32 s3, -1, 0
10700 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s12, v0
10701 ; GFX9-NEXT: s_cmp_eq_u32 s2, s13
10702 ; GFX9-NEXT: v_cndmask_b32_e64 v2, v5, v6, s[0:1]
10703 ; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
10704 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
10705 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
10706 ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
10707 ; GFX9-NEXT: s_ashr_i32 s0, s11, 31
10708 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v6, v5, vcc
10709 ; GFX9-NEXT: v_mov_b32_e32 v6, s2
10710 ; GFX9-NEXT: s_add_u32 s2, s10, s0
10711 ; GFX9-NEXT: s_mov_b32 s1, s0
10712 ; GFX9-NEXT: s_addc_u32 s3, s11, s0
10713 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
10714 ; GFX9-NEXT: s_xor_b64 s[4:5], s[2:3], s[0:1]
10715 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
10716 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s4
10717 ; GFX9-NEXT: v_cvt_f32_u32_e32 v3, s5
10718 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc
10719 ; GFX9-NEXT: v_xor_b32_e32 v0, s14, v0
10720 ; GFX9-NEXT: v_xor_b32_e32 v2, s14, v2
10721 ; GFX9-NEXT: v_mac_f32_e32 v1, 0x4f800000, v3
10722 ; GFX9-NEXT: v_rcp_f32_e32 v3, v1
10723 ; GFX9-NEXT: v_mov_b32_e32 v5, s14
10724 ; GFX9-NEXT: v_subrev_co_u32_e32 v0, vcc, s14, v0
10725 ; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v2, v5, vcc
10726 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v3
10727 ; GFX9-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
10728 ; GFX9-NEXT: v_trunc_f32_e32 v3, v3
10729 ; GFX9-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
10730 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
10731 ; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v3
10732 ; GFX9-NEXT: s_sub_u32 s0, 0, s4
10733 ; GFX9-NEXT: s_subb_u32 s1, 0, s5
10734 ; GFX9-NEXT: v_readfirstlane_b32 s2, v2
10735 ; GFX9-NEXT: v_readfirstlane_b32 s11, v3
10736 ; GFX9-NEXT: s_mul_hi_u32 s10, s0, s2
10737 ; GFX9-NEXT: s_mul_i32 s12, s0, s11
10738 ; GFX9-NEXT: s_mul_i32 s3, s1, s2
10739 ; GFX9-NEXT: s_add_i32 s10, s10, s12
10740 ; GFX9-NEXT: s_add_i32 s10, s10, s3
10741 ; GFX9-NEXT: s_mul_i32 s13, s0, s2
10742 ; GFX9-NEXT: s_mul_hi_u32 s3, s2, s10
10743 ; GFX9-NEXT: s_mul_i32 s12, s2, s10
10744 ; GFX9-NEXT: s_mul_hi_u32 s2, s2, s13
10745 ; GFX9-NEXT: s_add_u32 s2, s2, s12
10746 ; GFX9-NEXT: s_addc_u32 s3, 0, s3
10747 ; GFX9-NEXT: s_mul_hi_u32 s14, s11, s13
10748 ; GFX9-NEXT: s_mul_i32 s13, s11, s13
10749 ; GFX9-NEXT: s_add_u32 s2, s2, s13
10750 ; GFX9-NEXT: s_mul_hi_u32 s12, s11, s10
10751 ; GFX9-NEXT: s_addc_u32 s2, s3, s14
10752 ; GFX9-NEXT: s_addc_u32 s3, s12, 0
10753 ; GFX9-NEXT: s_mul_i32 s10, s11, s10
10754 ; GFX9-NEXT: s_add_u32 s2, s2, s10
10755 ; GFX9-NEXT: s_addc_u32 s3, 0, s3
10756 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
10757 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10758 ; GFX9-NEXT: s_addc_u32 s2, s11, s3
10759 ; GFX9-NEXT: v_readfirstlane_b32 s10, v2
10760 ; GFX9-NEXT: s_mul_i32 s3, s0, s2
10761 ; GFX9-NEXT: s_mul_hi_u32 s11, s0, s10
10762 ; GFX9-NEXT: s_add_i32 s3, s11, s3
10763 ; GFX9-NEXT: s_mul_i32 s1, s1, s10
10764 ; GFX9-NEXT: s_add_i32 s3, s3, s1
10765 ; GFX9-NEXT: s_mul_i32 s0, s0, s10
10766 ; GFX9-NEXT: s_mul_hi_u32 s11, s2, s0
10767 ; GFX9-NEXT: s_mul_i32 s12, s2, s0
10768 ; GFX9-NEXT: s_mul_i32 s14, s10, s3
10769 ; GFX9-NEXT: s_mul_hi_u32 s0, s10, s0
10770 ; GFX9-NEXT: s_mul_hi_u32 s13, s10, s3
10771 ; GFX9-NEXT: s_add_u32 s0, s0, s14
10772 ; GFX9-NEXT: s_addc_u32 s10, 0, s13
10773 ; GFX9-NEXT: s_add_u32 s0, s0, s12
10774 ; GFX9-NEXT: s_mul_hi_u32 s1, s2, s3
10775 ; GFX9-NEXT: s_addc_u32 s0, s10, s11
10776 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
10777 ; GFX9-NEXT: s_mul_i32 s3, s2, s3
10778 ; GFX9-NEXT: s_add_u32 s0, s0, s3
10779 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
10780 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2
10781 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10782 ; GFX9-NEXT: s_addc_u32 s2, s2, s1
10783 ; GFX9-NEXT: s_ashr_i32 s10, s7, 31
10784 ; GFX9-NEXT: s_add_u32 s0, s6, s10
10785 ; GFX9-NEXT: s_mov_b32 s11, s10
10786 ; GFX9-NEXT: s_addc_u32 s1, s7, s10
10787 ; GFX9-NEXT: s_xor_b64 s[6:7], s[0:1], s[10:11]
10788 ; GFX9-NEXT: v_readfirstlane_b32 s3, v2
10789 ; GFX9-NEXT: s_mul_i32 s1, s6, s2
10790 ; GFX9-NEXT: s_mul_hi_u32 s11, s6, s3
10791 ; GFX9-NEXT: s_mul_hi_u32 s0, s6, s2
10792 ; GFX9-NEXT: s_add_u32 s1, s11, s1
10793 ; GFX9-NEXT: s_addc_u32 s0, 0, s0
10794 ; GFX9-NEXT: s_mul_hi_u32 s12, s7, s3
10795 ; GFX9-NEXT: s_mul_i32 s3, s7, s3
10796 ; GFX9-NEXT: s_add_u32 s1, s1, s3
10797 ; GFX9-NEXT: s_mul_hi_u32 s11, s7, s2
10798 ; GFX9-NEXT: s_addc_u32 s0, s0, s12
10799 ; GFX9-NEXT: s_addc_u32 s1, s11, 0
10800 ; GFX9-NEXT: s_mul_i32 s2, s7, s2
10801 ; GFX9-NEXT: s_add_u32 s0, s0, s2
10802 ; GFX9-NEXT: s_addc_u32 s1, 0, s1
10803 ; GFX9-NEXT: s_mul_i32 s1, s4, s1
10804 ; GFX9-NEXT: s_mul_hi_u32 s2, s4, s0
10805 ; GFX9-NEXT: s_add_i32 s1, s2, s1
10806 ; GFX9-NEXT: s_mul_i32 s2, s5, s0
10807 ; GFX9-NEXT: s_mul_i32 s0, s4, s0
10808 ; GFX9-NEXT: s_add_i32 s11, s1, s2
10809 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
10810 ; GFX9-NEXT: s_sub_i32 s1, s7, s11
10811 ; GFX9-NEXT: v_sub_co_u32_e32 v2, vcc, s6, v2
10812 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10813 ; GFX9-NEXT: s_subb_u32 s6, s1, s5
10814 ; GFX9-NEXT: v_subrev_co_u32_e64 v3, s[0:1], s4, v2
10815 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10816 ; GFX9-NEXT: s_subb_u32 s12, s6, 0
10817 ; GFX9-NEXT: s_cmp_ge_u32 s12, s5
10818 ; GFX9-NEXT: s_cselect_b32 s13, -1, 0
10819 ; GFX9-NEXT: v_cmp_le_u32_e64 s[2:3], s4, v3
10820 ; GFX9-NEXT: s_cmp_eq_u32 s12, s5
10821 ; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[2:3]
10822 ; GFX9-NEXT: v_mov_b32_e32 v6, s13
10823 ; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 0
10824 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10825 ; GFX9-NEXT: v_cndmask_b32_e64 v5, v6, v5, s[2:3]
10826 ; GFX9-NEXT: s_subb_u32 s2, s6, s5
10827 ; GFX9-NEXT: v_subrev_co_u32_e64 v6, s[0:1], s4, v3
10828 ; GFX9-NEXT: s_cmp_lg_u64 s[0:1], 0
10829 ; GFX9-NEXT: s_subb_u32 s0, s2, 0
10830 ; GFX9-NEXT: s_cmp_lg_u64 vcc, 0
10831 ; GFX9-NEXT: s_subb_u32 s2, s7, s11
10832 ; GFX9-NEXT: s_cmp_ge_u32 s2, s5
10833 ; GFX9-NEXT: v_mov_b32_e32 v7, s12
10834 ; GFX9-NEXT: v_mov_b32_e32 v8, s0
10835 ; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
10836 ; GFX9-NEXT: s_cselect_b32 s3, -1, 0
10837 ; GFX9-NEXT: v_cmp_le_u32_e32 vcc, s4, v2
10838 ; GFX9-NEXT: s_cmp_eq_u32 s2, s5
10839 ; GFX9-NEXT: v_cndmask_b32_e64 v5, v7, v8, s[0:1]
10840 ; GFX9-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc
10841 ; GFX9-NEXT: v_mov_b32_e32 v8, s3
10842 ; GFX9-NEXT: s_cselect_b64 vcc, -1, 0
10843 ; GFX9-NEXT: v_cndmask_b32_e32 v7, v8, v7, vcc
10844 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7
10845 ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[0:1]
10846 ; GFX9-NEXT: v_mov_b32_e32 v8, s2
10847 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc
10848 ; GFX9-NEXT: v_cndmask_b32_e32 v5, v8, v5, vcc
10849 ; GFX9-NEXT: v_xor_b32_e32 v2, s10, v2
10850 ; GFX9-NEXT: v_xor_b32_e32 v3, s10, v5
10851 ; GFX9-NEXT: v_mov_b32_e32 v5, s10
10852 ; GFX9-NEXT: v_subrev_co_u32_e32 v2, vcc, s10, v2
10853 ; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v3, v5, vcc
10854 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
10855 ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[8:9]
10856 ; GFX9-NEXT: s_endpgm