Lines Matching refs:s35
927 ; GFX7-NEXT: v_readfirstlane_b32 s35, v0
930 ; GFX7-NEXT: s_addc_u32 s24, s35, s24
947 ; GFX7-NEXT: v_readfirstlane_b32 s35, v6
949 ; GFX7-NEXT: s_addc_u32 s23, s35, s23
950 ; GFX7-NEXT: v_readfirstlane_b32 s35, v0
954 ; GFX7-NEXT: s_addc_u32 s23, s35, s23
955 ; GFX7-NEXT: v_readfirstlane_b32 s35, v0
959 ; GFX7-NEXT: s_addc_u32 s23, s35, s23
960 ; GFX7-NEXT: v_readfirstlane_b32 s35, v0
966 ; GFX7-NEXT: s_addc_u32 s23, s35, s23
967 ; GFX7-NEXT: v_readfirstlane_b32 s35, v6
975 ; GFX7-NEXT: s_addc_u32 s23, s35, s23
977 ; GFX7-NEXT: v_readfirstlane_b32 s35, v6
979 ; GFX7-NEXT: s_addc_u32 s23, s35, s23
981 ; GFX7-NEXT: v_readfirstlane_b32 s35, v2
985 ; GFX7-NEXT: s_addc_u32 s22, s35, s22
986 ; GFX7-NEXT: s_mul_i32 s35, s1, s12
988 ; GFX7-NEXT: s_add_u32 s24, s35, s24
991 ; GFX7-NEXT: s_cselect_b32 s35, 1, 0
1044 ; GFX7-NEXT: s_cmp_lg_u32 s35, 0
1148 ; GFX8-NEXT: v_readfirstlane_b32 s35, v0
1151 ; GFX8-NEXT: s_addc_u32 s24, s35, s24
1168 ; GFX8-NEXT: v_readfirstlane_b32 s35, v6
1170 ; GFX8-NEXT: s_addc_u32 s23, s35, s23
1171 ; GFX8-NEXT: v_readfirstlane_b32 s35, v0
1175 ; GFX8-NEXT: s_addc_u32 s23, s35, s23
1176 ; GFX8-NEXT: v_readfirstlane_b32 s35, v0
1180 ; GFX8-NEXT: s_addc_u32 s23, s35, s23
1181 ; GFX8-NEXT: v_readfirstlane_b32 s35, v0
1187 ; GFX8-NEXT: s_addc_u32 s23, s35, s23
1188 ; GFX8-NEXT: v_readfirstlane_b32 s35, v6
1196 ; GFX8-NEXT: s_addc_u32 s23, s35, s23
1198 ; GFX8-NEXT: v_readfirstlane_b32 s35, v6
1200 ; GFX8-NEXT: s_addc_u32 s23, s35, s23
1202 ; GFX8-NEXT: v_readfirstlane_b32 s35, v2
1206 ; GFX8-NEXT: s_addc_u32 s22, s35, s22
1207 ; GFX8-NEXT: s_mul_i32 s35, s1, s12
1209 ; GFX8-NEXT: s_add_u32 s24, s35, s24
1212 ; GFX8-NEXT: s_cselect_b32 s35, 1, 0
1265 ; GFX8-NEXT: s_cmp_lg_u32 s35, 0
1344 ; GFX9-NEXT: s_mul_hi_u32 s35, s3, s8
1346 ; GFX9-NEXT: s_addc_u32 s24, s35, s24
1359 ; GFX9-NEXT: s_mul_hi_u32 s35, s1, s13
1361 ; GFX9-NEXT: s_addc_u32 s23, s35, s23
1363 ; GFX9-NEXT: s_mul_hi_u32 s35, s2, s12
1365 ; GFX9-NEXT: s_addc_u32 s23, s35, s23
1367 ; GFX9-NEXT: s_mul_hi_u32 s35, s3, s11
1369 ; GFX9-NEXT: s_addc_u32 s23, s35, s23
1371 ; GFX9-NEXT: s_mul_hi_u32 s35, s4, s10
1373 ; GFX9-NEXT: s_addc_u32 s23, s35, s23
1375 ; GFX9-NEXT: s_mul_hi_u32 s35, s5, s9
1377 ; GFX9-NEXT: s_addc_u32 s23, s35, s23
1379 ; GFX9-NEXT: s_mul_hi_u32 s35, s6, s8
1381 ; GFX9-NEXT: s_addc_u32 s23, s35, s23
1383 ; GFX9-NEXT: s_mul_hi_u32 s35, s0, s13
1385 ; GFX9-NEXT: s_addc_u32 s22, s35, s22
1386 ; GFX9-NEXT: s_mul_i32 s35, s1, s12
1389 ; GFX9-NEXT: s_add_u32 s24, s35, s24
1392 ; GFX9-NEXT: s_cselect_b32 s35, 1, 0
1445 ; GFX9-NEXT: s_cmp_lg_u32 s35, 0
1567 ; GFX10PLUS-NEXT: s_mul_hi_u32 s35, s1, s12
1570 ; GFX10PLUS-NEXT: s_addc_u32 s21, s35, s21
1571 ; GFX10PLUS-NEXT: s_mul_i32 s35, s2, s11
1574 ; GFX10PLUS-NEXT: s_add_u32 s23, s35, s23
1578 ; GFX10PLUS-NEXT: s_cselect_b32 s35, 1, 0
1626 ; GFX10PLUS-NEXT: s_cmp_lg_u32 s35, 0