Lines Matching refs:GFX9
49 ; GFX9-LABEL: lds_atomic_dec_ret_i32:
50 ; GFX9: ; %bb.0:
51 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
52 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c
53 ; GFX9-NEXT: v_mov_b32_e32 v1, 42
54 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
55 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
56 ; GFX9-NEXT: ds_dec_rtn_u32 v2, v0, v1
57 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
58 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
59 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
60 ; GFX9-NEXT: global_store_dword v[0:1], v2, off
61 ; GFX9-NEXT: s_endpgm
97 ; GFX9-LABEL: lds_atomic_dec_ret_i32_offset:
98 ; GFX9: ; %bb.0:
99 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
100 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c
101 ; GFX9-NEXT: v_mov_b32_e32 v1, 42
102 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
103 ; GFX9-NEXT: s_add_u32 s0, s0, 16
104 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
105 ; GFX9-NEXT: ds_dec_rtn_u32 v2, v0, v1
106 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
107 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
108 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
109 ; GFX9-NEXT: global_store_dword v[0:1], v2, off
110 ; GFX9-NEXT: s_endpgm
127 ; GFX9-LABEL: lds_atomic_dec_noret_i32:
128 ; GFX9: ; %bb.0:
129 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x24
130 ; GFX9-NEXT: v_mov_b32_e32 v1, 42
131 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
132 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
133 ; GFX9-NEXT: ds_dec_rtn_u32 v0, v0, v1
134 ; GFX9-NEXT: s_endpgm
178 ; GFX9-LABEL: lds_atomic_dec_noret_i32_offset:
179 ; GFX9: ; %bb.0:
180 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x24
181 ; GFX9-NEXT: v_mov_b32_e32 v1, 42
182 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
183 ; GFX9-NEXT: s_add_u32 s0, s0, 16
184 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
185 ; GFX9-NEXT: ds_dec_rtn_u32 v0, v0, v1
186 ; GFX9-NEXT: s_endpgm
220 ; GFX9-LABEL: global_atomic_dec_ret_i32:
221 ; GFX9: ; %bb.0:
222 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
223 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
224 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
225 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
226 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
227 ; GFX9-NEXT: flat_atomic_dec v2, v[0:1], v2 glc
228 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
229 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
230 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
231 ; GFX9-NEXT: global_store_dword v[0:1], v2, off
232 ; GFX9-NEXT: s_endpgm
270 ; GFX9-LABEL: global_atomic_dec_ret_i32_offset:
271 ; GFX9: ; %bb.0:
272 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
273 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
274 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
275 ; GFX9-NEXT: s_add_u32 s2, s2, 16
276 ; GFX9-NEXT: s_addc_u32 s3, s3, 0
277 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
278 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
279 ; GFX9-NEXT: flat_atomic_dec v2, v[0:1], v2 glc
280 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
281 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
282 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
283 ; GFX9-NEXT: global_store_dword v[0:1], v2, off
284 ; GFX9-NEXT: s_endpgm
311 ; GFX9-LABEL: global_atomic_dec_noret_i32:
312 ; GFX9: ; %bb.0:
313 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
314 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
315 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
316 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
317 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
318 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v2 glc
319 ; GFX9-NEXT: s_endpgm
348 ; GFX9-LABEL: global_atomic_dec_noret_i32_offset:
349 ; GFX9: ; %bb.0:
350 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
351 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
352 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
353 ; GFX9-NEXT: s_add_u32 s0, s0, 16
354 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
355 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
356 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
357 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v2 glc
358 ; GFX9-NEXT: s_endpgm
406 ; GFX9-LABEL: global_atomic_dec_ret_i32_offset_addr64:
407 ; GFX9: ; %bb.0:
408 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
409 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
410 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
411 ; GFX9-NEXT: v_mul_lo_u32 v1, 4, v1
412 ; GFX9-NEXT: v_mul_hi_u32 v3, 4, v0
413 ; GFX9-NEXT: v_mul_lo_u32 v4, 4, v0
414 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
415 ; GFX9-NEXT: v_mov_b32_e32 v0, s3
416 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
417 ; GFX9-NEXT: v_add_u32_e32 v3, v1, v3
418 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s2, v4
419 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, v0, v3, vcc
420 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 20, v1
421 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
422 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
423 ; GFX9-NEXT: v_mov_b32_e32 v5, s1
424 ; GFX9-NEXT: v_mov_b32_e32 v4, 42
425 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc
426 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v4 glc
427 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
428 ; GFX9-NEXT: global_store_dword v[2:3], v0, off
429 ; GFX9-NEXT: s_endpgm
469 ; GFX9-LABEL: global_atomic_dec_noret_i32_offset_addr64:
470 ; GFX9: ; %bb.0:
471 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
472 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
473 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
474 ; GFX9-NEXT: v_mul_lo_u32 v1, 4, v1
475 ; GFX9-NEXT: v_mul_hi_u32 v3, 4, v0
476 ; GFX9-NEXT: v_mul_lo_u32 v0, 4, v0
477 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
478 ; GFX9-NEXT: v_mov_b32_e32 v4, s1
479 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
480 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
481 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
482 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v4, v1, vcc
483 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 20, v0
484 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
485 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
486 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v2 glc
487 ; GFX9-NEXT: s_endpgm
523 ; GFX9-LABEL: flat_atomic_dec_ret_i32:
524 ; GFX9: ; %bb.0:
525 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
526 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
527 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
528 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
529 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
530 ; GFX9-NEXT: flat_atomic_dec v2, v[0:1], v2 glc
531 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
532 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
533 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
534 ; GFX9-NEXT: flat_store_dword v[0:1], v2
535 ; GFX9-NEXT: s_endpgm
573 ; GFX9-LABEL: flat_atomic_dec_ret_i32_offset:
574 ; GFX9: ; %bb.0:
575 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
576 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
577 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
578 ; GFX9-NEXT: s_add_u32 s2, s2, 16
579 ; GFX9-NEXT: s_addc_u32 s3, s3, 0
580 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
581 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
582 ; GFX9-NEXT: flat_atomic_dec v2, v[0:1], v2 glc
583 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
584 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
585 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
586 ; GFX9-NEXT: flat_store_dword v[0:1], v2
587 ; GFX9-NEXT: s_endpgm
614 ; GFX9-LABEL: flat_atomic_dec_noret_i32:
615 ; GFX9: ; %bb.0:
616 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
617 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
618 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
619 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
620 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
621 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v2 glc
622 ; GFX9-NEXT: s_endpgm
651 ; GFX9-LABEL: flat_atomic_dec_noret_i32_offset:
652 ; GFX9: ; %bb.0:
653 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
654 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
655 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
656 ; GFX9-NEXT: s_add_u32 s0, s0, 16
657 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
658 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
659 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
660 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v2 glc
661 ; GFX9-NEXT: s_endpgm
709 ; GFX9-LABEL: flat_atomic_dec_ret_i32_offset_addr64:
710 ; GFX9: ; %bb.0:
711 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
712 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
713 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
714 ; GFX9-NEXT: v_mul_lo_u32 v1, 4, v1
715 ; GFX9-NEXT: v_mul_hi_u32 v3, 4, v0
716 ; GFX9-NEXT: v_mul_lo_u32 v4, 4, v0
717 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
718 ; GFX9-NEXT: v_mov_b32_e32 v0, s3
719 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
720 ; GFX9-NEXT: v_add_u32_e32 v3, v1, v3
721 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s2, v4
722 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, v0, v3, vcc
723 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 20, v1
724 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
725 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
726 ; GFX9-NEXT: v_mov_b32_e32 v5, s1
727 ; GFX9-NEXT: v_mov_b32_e32 v4, 42
728 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc
729 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v4 glc
730 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
731 ; GFX9-NEXT: flat_store_dword v[2:3], v0
732 ; GFX9-NEXT: s_endpgm
772 ; GFX9-LABEL: flat_atomic_dec_noret_i32_offset_addr64:
773 ; GFX9: ; %bb.0:
774 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
775 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
776 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
777 ; GFX9-NEXT: v_mul_lo_u32 v1, 4, v1
778 ; GFX9-NEXT: v_mul_hi_u32 v3, 4, v0
779 ; GFX9-NEXT: v_mul_lo_u32 v0, 4, v0
780 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
781 ; GFX9-NEXT: v_mov_b32_e32 v4, s1
782 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
783 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
784 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
785 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v4, v1, vcc
786 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 20, v0
787 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
788 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
789 ; GFX9-NEXT: flat_atomic_dec v0, v[0:1], v2 glc
790 ; GFX9-NEXT: s_endpgm
828 ; GFX9-LABEL: flat_atomic_dec_ret_i64:
829 ; GFX9: ; %bb.0:
830 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
831 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
832 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
833 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
834 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
835 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
836 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
837 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
838 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
839 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
840 ; GFX9-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
841 ; GFX9-NEXT: s_endpgm
881 ; GFX9-LABEL: flat_atomic_dec_ret_i64_offset:
882 ; GFX9: ; %bb.0:
883 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
884 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
885 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
886 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
887 ; GFX9-NEXT: s_add_u32 s2, s2, 32
888 ; GFX9-NEXT: s_addc_u32 s3, s3, 0
889 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
890 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
891 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
892 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
893 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
894 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
895 ; GFX9-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
896 ; GFX9-NEXT: s_endpgm
925 ; GFX9-LABEL: flat_atomic_dec_noret_i64:
926 ; GFX9: ; %bb.0:
927 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
928 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
929 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
930 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
931 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
932 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
933 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
934 ; GFX9-NEXT: s_endpgm
965 ; GFX9-LABEL: flat_atomic_dec_noret_i64_offset:
966 ; GFX9: ; %bb.0:
967 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
968 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
969 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
970 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
971 ; GFX9-NEXT: s_add_u32 s0, s0, 32
972 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
973 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
974 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
975 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
976 ; GFX9-NEXT: s_endpgm
1026 ; GFX9-LABEL: flat_atomic_dec_ret_i64_offset_addr64:
1027 ; GFX9: ; %bb.0:
1028 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1029 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1030 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
1031 ; GFX9-NEXT: v_mul_lo_u32 v1, 8, v1
1032 ; GFX9-NEXT: v_mul_hi_u32 v3, 8, v0
1033 ; GFX9-NEXT: v_mul_lo_u32 v4, 8, v0
1034 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1035 ; GFX9-NEXT: v_mov_b32_e32 v0, s3
1036 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
1037 ; GFX9-NEXT: v_add_u32_e32 v3, v1, v3
1038 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s2, v4
1039 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, v0, v3, vcc
1040 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 40, v1
1041 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
1042 ; GFX9-NEXT: v_mov_b32_e32 v5, s1
1043 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
1044 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc
1045 ; GFX9-NEXT: v_mov_b32_e32 v4, 42
1046 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
1047 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[4:5] glc
1048 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
1049 ; GFX9-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
1050 ; GFX9-NEXT: s_endpgm
1092 ; GFX9-LABEL: flat_atomic_dec_noret_i64_offset_addr64:
1093 ; GFX9: ; %bb.0:
1094 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1095 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
1096 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
1097 ; GFX9-NEXT: v_mul_lo_u32 v1, 8, v1
1098 ; GFX9-NEXT: v_mul_hi_u32 v3, 8, v0
1099 ; GFX9-NEXT: v_mul_lo_u32 v0, 8, v0
1100 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1101 ; GFX9-NEXT: v_mov_b32_e32 v4, s1
1102 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
1103 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
1104 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
1105 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v4, v1, vcc
1106 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 40, v0
1107 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
1108 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
1109 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
1110 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
1111 ; GFX9-NEXT: s_endpgm
1155 ; GFX9-LABEL: atomic_dec_shl_base_lds_0:
1156 ; GFX9: ; %bb.0:
1157 ; GFX9-NEXT: v_mul_lo_u32 v1, 4, v0
1158 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1159 ; GFX9-NEXT: v_add_u32_e32 v3, 2, v0
1160 ; GFX9-NEXT: v_mov_b32_e32 v2, 9
1161 ; GFX9-NEXT: v_add_u32_e32 v0, 0, v1
1162 ; GFX9-NEXT: v_add_u32_e32 v0, 8, v0
1163 ; GFX9-NEXT: ds_dec_rtn_u32 v2, v0, v2
1164 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1165 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
1166 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
1167 ; GFX9-NEXT: global_store_dword v[0:1], v3, off
1168 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
1169 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
1170 ; GFX9-NEXT: global_store_dword v[0:1], v2, off
1171 ; GFX9-NEXT: s_endpgm
1213 ; GFX9-LABEL: lds_atomic_dec_ret_i64:
1214 ; GFX9: ; %bb.0:
1215 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
1216 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c
1217 ; GFX9-NEXT: v_mov_b32_e32 v0, 42
1218 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
1219 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1220 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
1221 ; GFX9-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1]
1222 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
1223 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
1224 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1225 ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
1226 ; GFX9-NEXT: s_endpgm
1264 ; GFX9-LABEL: lds_atomic_dec_ret_i64_offset:
1265 ; GFX9: ; %bb.0:
1266 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
1267 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c
1268 ; GFX9-NEXT: v_mov_b32_e32 v0, 42
1269 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
1270 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1271 ; GFX9-NEXT: s_add_u32 s0, s0, 32
1272 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
1273 ; GFX9-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1]
1274 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
1275 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
1276 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1277 ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
1278 ; GFX9-NEXT: s_endpgm
1307 ; GFX9-LABEL: lds_atomic_dec_noret_i64:
1308 ; GFX9: ; %bb.0:
1309 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x24
1310 ; GFX9-NEXT: v_mov_b32_e32 v0, 42
1311 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
1312 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1313 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
1314 ; GFX9-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1]
1315 ; GFX9-NEXT: s_endpgm
1342 ; GFX9-LABEL: lds_atomic_dec_noret_i64_offset:
1343 ; GFX9: ; %bb.0:
1344 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x24
1345 ; GFX9-NEXT: v_mov_b32_e32 v0, 42
1346 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
1347 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1348 ; GFX9-NEXT: s_add_u32 s0, s0, 32
1349 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
1350 ; GFX9-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1]
1351 ; GFX9-NEXT: s_endpgm
1387 ; GFX9-LABEL: global_atomic_dec_ret_i64:
1388 ; GFX9: ; %bb.0:
1389 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1390 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
1391 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
1392 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1393 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
1394 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
1395 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
1396 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
1397 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
1398 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
1399 ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
1400 ; GFX9-NEXT: s_endpgm
1440 ; GFX9-LABEL: global_atomic_dec_ret_i64_offset:
1441 ; GFX9: ; %bb.0:
1442 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1443 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
1444 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
1445 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1446 ; GFX9-NEXT: s_add_u32 s2, s2, 32
1447 ; GFX9-NEXT: s_addc_u32 s3, s3, 0
1448 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
1449 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
1450 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
1451 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
1452 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
1453 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
1454 ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
1455 ; GFX9-NEXT: s_endpgm
1484 ; GFX9-LABEL: global_atomic_dec_noret_i64:
1485 ; GFX9: ; %bb.0:
1486 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
1487 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
1488 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
1489 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1490 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
1491 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
1492 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
1493 ; GFX9-NEXT: s_endpgm
1524 ; GFX9-LABEL: global_atomic_dec_noret_i64_offset:
1525 ; GFX9: ; %bb.0:
1526 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
1527 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
1528 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
1529 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1530 ; GFX9-NEXT: s_add_u32 s0, s0, 32
1531 ; GFX9-NEXT: s_addc_u32 s1, s1, 0
1532 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
1533 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
1534 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
1535 ; GFX9-NEXT: s_endpgm
1585 ; GFX9-LABEL: global_atomic_dec_ret_i64_offset_addr64:
1586 ; GFX9: ; %bb.0:
1587 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1588 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1589 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
1590 ; GFX9-NEXT: v_mul_lo_u32 v1, 8, v1
1591 ; GFX9-NEXT: v_mul_hi_u32 v3, 8, v0
1592 ; GFX9-NEXT: v_mul_lo_u32 v4, 8, v0
1593 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1594 ; GFX9-NEXT: v_mov_b32_e32 v0, s3
1595 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
1596 ; GFX9-NEXT: v_add_u32_e32 v3, v1, v3
1597 ; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s2, v4
1598 ; GFX9-NEXT: v_addc_co_u32_e32 v2, vcc, v0, v3, vcc
1599 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 40, v1
1600 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v2, vcc
1601 ; GFX9-NEXT: v_mov_b32_e32 v5, s1
1602 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
1603 ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc
1604 ; GFX9-NEXT: v_mov_b32_e32 v4, 42
1605 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
1606 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[4:5] glc
1607 ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
1608 ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
1609 ; GFX9-NEXT: s_endpgm
1651 ; GFX9-LABEL: global_atomic_dec_noret_i64_offset_addr64:
1652 ; GFX9: ; %bb.0:
1653 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1654 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
1655 ; GFX9-NEXT: v_mul_lo_u32 v2, 0, v0
1656 ; GFX9-NEXT: v_mul_lo_u32 v1, 8, v1
1657 ; GFX9-NEXT: v_mul_hi_u32 v3, 8, v0
1658 ; GFX9-NEXT: v_mul_lo_u32 v0, 8, v0
1659 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1660 ; GFX9-NEXT: v_mov_b32_e32 v4, s1
1661 ; GFX9-NEXT: v_add_u32_e32 v1, v2, v1
1662 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
1663 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0
1664 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v4, v1, vcc
1665 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 40, v0
1666 ; GFX9-NEXT: v_mov_b32_e32 v2, 42
1667 ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
1668 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
1669 ; GFX9-NEXT: flat_atomic_dec_x2 v[0:1], v[0:1], v[2:3] glc
1670 ; GFX9-NEXT: s_endpgm
1716 ; GFX9-LABEL: atomic_dec_shl_base_lds_0_i64:
1717 ; GFX9: ; %bb.0:
1718 ; GFX9-NEXT: v_mul_lo_u32 v3, 8, v0
1719 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1720 ; GFX9-NEXT: v_mov_b32_e32 v1, 9
1721 ; GFX9-NEXT: v_add_u32_e32 v4, 2, v0
1722 ; GFX9-NEXT: v_add_u32_e32 v0, 0, v3
1723 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
1724 ; GFX9-NEXT: v_add_u32_e32 v0, 16, v0
1725 ; GFX9-NEXT: ds_dec_rtn_u64 v[0:1], v0, v[1:2]
1726 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1727 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
1728 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
1729 ; GFX9-NEXT: global_store_dword v[2:3], v4, off
1730 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
1731 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
1732 ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
1733 ; GFX9-NEXT: s_endpgm