603       IsWrite((Packed >> kIsWriteShift) & kIsWriteMask),  in ASanAccessInfo()
606 ASanAccessInfo::ASanAccessInfo(bool IsWrite, bool CompileKernel,  in ASanAccessInfo()  argument
608     : Packed((IsWrite << kIsWriteShift) +  in ASanAccessInfo()
611       AccessSizeIndex(AccessSizeIndex), IsWrite(IsWrite),  in ASanAccessInfo()
683                          Value *Addr, uint32_t TypeSize, bool IsWrite,
687                                        uint32_t TypeSize, bool IsWrite,
691                                         uint32_t TypeSize, bool IsWrite,
697                                  bool IsWrite, size_t AccessSizeIndex,
1300       bool IsWrite = CI->getIntrinsicID() == Intrinsic::masked_store;  in getInterestingMemoryOperands()  local
1302       unsigned OpOffset = IsWrite ? 1 : 0;  in getInterestingMemoryOperands()
1303       if (IsWrite ? !ClInstrumentWrites : !ClInstrumentReads)  in getInterestingMemoryOperands()
1309       Type *Ty = IsWrite ? CI->getArgOperand(0)->getType() : CI->getType();  in getInterestingMemoryOperands()
1315       Interesting.emplace_back(I, OpOffset, IsWrite, Ty, Alignment, Mask);  in getInterestingMemoryOperands()
1388                                 uint32_t TypeSize, bool IsWrite,  in doInstrumentAddress()  argument
1396     return Pass->instrumentAddress(I, InsertBefore, Addr, TypeSize, IsWrite,  in doInstrumentAddress()
1399                                          IsWrite, nullptr, UseCalls, Exp);  in doInstrumentAddress()
1407                                         bool IsWrite, Value *SizeArgument,  in instrumentMaskedLoadOrStore()  argument
1436                         Granularity, ElemTypeSize, IsWrite, SizeArgument,  in instrumentMaskedLoadOrStore()
1479   if (O.IsWrite)  in instrumentMop()
1488                                 O.IsWrite, nullptr, UseCalls, Exp);  in instrumentMop()
1491                         Granularity, O.TypeSize, O.IsWrite, nullptr, UseCalls,  in instrumentMop()
1497                                                  Value *Addr, bool IsWrite,  in generateCrashCode()  argument
1506       Call = IRB.CreateCall(AsanErrorCallbackSized[IsWrite][0],  in generateCrashCode()
1509       Call = IRB.CreateCall(AsanErrorCallbackSized[IsWrite][1],  in generateCrashCode()
1514           IRB.CreateCall(AsanErrorCallback[IsWrite][0][AccessSizeIndex], Addr);  in generateCrashCode()
1516       Call = IRB.CreateCall(AsanErrorCallback[IsWrite][1][AccessSizeIndex],  in generateCrashCode()
1544     uint32_t TypeSize, bool IsWrite, Value *SizeArgument) {  in instrumentAMDGPUAddress()  argument
1567                                          uint32_t TypeSize, bool IsWrite,  in instrumentAddress()  argument
1572                                            TypeSize, IsWrite, SizeArgument);  in instrumentAddress()
1579   const ASanAccessInfo AccessInfo(IsWrite, CompileKernel, AccessSizeIndex);  in instrumentAddress()
1582     const ASanAccessInfo AccessInfo(IsWrite, CompileKernel, AccessSizeIndex);  in instrumentAddress()
1594       IRB.CreateCall(AsanMemoryAccessCallback[IsWrite][0][AccessSizeIndex],  in instrumentAddress()
1597       IRB.CreateCall(AsanMemoryAccessCallback[IsWrite][1][AccessSizeIndex],  in instrumentAddress()
1636   Instruction *Crash = generateCrashCode(CrashTerm, AddrLong, IsWrite,  in instrumentAddress()
1647     bool IsWrite, Value *SizeArgument, bool UseCalls, uint32_t Exp) {  in instrumentUnusualSizeOrAlignment()  argument
1653       IRB.CreateCall(AsanMemoryAccessCallbackSized[IsWrite][0],  in instrumentUnusualSizeOrAlignment()
1656       IRB.CreateCall(AsanMemoryAccessCallbackSized[IsWrite][1],  in instrumentUnusualSizeOrAlignment()
1662     instrumentAddress(I, InsertBefore, Addr, 8, IsWrite, Size, false, Exp);  in instrumentUnusualSizeOrAlignment()
1663     instrumentAddress(I, InsertBefore, LastByte, 8, IsWrite, Size, false, Exp);  in instrumentUnusualSizeOrAlignment()