198   hardenLoadAddr(MachineInstr &MI, MachineOperand &BaseMO,
1336         MachineOperand &BaseMO =  in tracePredStateThroughBlocksAndHarden()  local
1344         if (!BaseMO.isFI() && BaseMO.getReg() != X86::RIP &&  in tracePredStateThroughBlocksAndHarden()
1345             BaseMO.getReg() != X86::NoRegister)  in tracePredStateThroughBlocksAndHarden()
1346           BaseReg = BaseMO.getReg();  in tracePredStateThroughBlocksAndHarden()
1410           MachineOperand &BaseMO =  in tracePredStateThroughBlocksAndHarden()  local
1414           hardenLoadAddr(MI, BaseMO, IndexMO, AddrRegToHardenedReg);  in tracePredStateThroughBlocksAndHarden()
1573     MachineInstr &MI, MachineOperand &BaseMO, MachineOperand &IndexMO,  in hardenLoadAddr()  argument
1584   if (BaseMO.isFI()) {  in hardenLoadAddr()
1590   } else if (BaseMO.getReg() == X86::RSP) {  in hardenLoadAddr()
1598   } else if (BaseMO.getReg() == X86::RIP ||  in hardenLoadAddr()
1599              BaseMO.getReg() == X86::NoRegister) {  in hardenLoadAddr()
1610                << (BaseMO.getReg() == X86::RIP ? "RIP-relative" : "no-base")  in hardenLoadAddr()
1613     assert(BaseMO.isReg() &&  in hardenLoadAddr()
1615     HardenOpRegs.push_back(&BaseMO);  in hardenLoadAddr()
1812         MachineOperand &BaseMO =  in sinkPostLoadHardenedInst()  local
1816         if ((BaseMO.isReg() && BaseMO.getReg() == DefReg) ||  in sinkPostLoadHardenedInst()