49     SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline,  in EmitTargetCodeForMemset()
69   if (Alignment < Align(4) || !ConstantSize ||  in EmitTargetCodeForMemset()
84     if (Alignment > Align(2)) {  in EmitTargetCodeForMemset()
90       if (Subtarget.is64Bit() && Alignment > Align(8)) { // QWORD aligned  in EmitTargetCodeForMemset()
95     } else if (Alignment == Align(2)) {  in EmitTargetCodeForMemset()
186                                  uint64_t Align) {  in getOptimalRepmovsType()  argument
187   assert((Align != 0) && "Align is normalized");  in getOptimalRepmovsType()
188   assert(isPowerOf2_64(Align) && "Align is a power of 2");  in getOptimalRepmovsType()
189   switch (Align) {  in getOptimalRepmovsType()
208     unsigned Align, bool isVolatile, bool AlwaysInline,  in emitConstantSizeRepmov()  argument
223   if (!AlwaysInline && (Align & 3) != 0)  in emitConstantSizeRepmov()
226   const MVT BlockType = getOptimalRepmovsType(Subtarget, Align);  in emitConstantSizeRepmov()
255       DAG.getConstant(BytesLeft, dl, SizeVT), llvm::Align(Align), isVolatile,  in emitConstantSizeRepmov()
263     SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline,  in EmitTargetCodeForMemcpy()