Lines Matching refs:X86
337 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortImmForm()
355 case X86::MOVSX16rr8: // movsbw %al, %ax --> cbtw in SimplifyMOVSX()
356 if (Op0 == X86::AX && Op1 == X86::AL) in SimplifyMOVSX()
357 NewOpcode = X86::CBW; in SimplifyMOVSX()
359 case X86::MOVSX32rr16: // movswl %ax, %eax --> cwtl in SimplifyMOVSX()
360 if (Op0 == X86::EAX && Op1 == X86::AX) in SimplifyMOVSX()
361 NewOpcode = X86::CWDE; in SimplifyMOVSX()
363 case X86::MOVSX64rr32: // movslq %eax, %rax --> cltq in SimplifyMOVSX()
364 if (Op0 == X86::RAX && Op1 == X86::EAX) in SimplifyMOVSX()
365 NewOpcode = X86::CDQE; in SimplifyMOVSX()
389 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
390 Inst.getOperand(AddrBase + X86::AddrScaleAmt).isImm() && in SimplifyShortMoveForm()
391 Inst.getOperand(AddrBase + X86::AddrIndexReg).isReg() && in SimplifyShortMoveForm()
392 Inst.getOperand(AddrBase + X86::AddrSegmentReg).isReg() && in SimplifyShortMoveForm()
398 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortMoveForm()
413 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
414 Inst.getOperand(AddrBase + X86::AddrScaleAmt).getImm() != 1 || in SimplifyShortMoveForm()
415 Inst.getOperand(AddrBase + X86::AddrIndexReg).getReg() != 0)) in SimplifyShortMoveForm()
420 MCOperand Seg = Inst.getOperand(AddrBase + X86::AddrSegmentReg); in SimplifyShortMoveForm()
428 return Subtarget.is64Bit() ? X86::RET64 : X86::RET32; in getRetOpcode()
468 case X86::TAILJMPr: in convertTailJumpOpcode()
469 Opcode = X86::JMP32r; in convertTailJumpOpcode()
471 case X86::TAILJMPm: in convertTailJumpOpcode()
472 Opcode = X86::JMP32m; in convertTailJumpOpcode()
474 case X86::TAILJMPr64: in convertTailJumpOpcode()
475 Opcode = X86::JMP64r; in convertTailJumpOpcode()
477 case X86::TAILJMPm64: in convertTailJumpOpcode()
478 Opcode = X86::JMP64m; in convertTailJumpOpcode()
480 case X86::TAILJMPr64_REX: in convertTailJumpOpcode()
481 Opcode = X86::JMP64r_REX; in convertTailJumpOpcode()
483 case X86::TAILJMPm64_REX: in convertTailJumpOpcode()
484 Opcode = X86::JMP64m_REX; in convertTailJumpOpcode()
486 case X86::TAILJMPd: in convertTailJumpOpcode()
487 case X86::TAILJMPd64: in convertTailJumpOpcode()
488 Opcode = X86::JMP_1; in convertTailJumpOpcode()
490 case X86::TAILJMPd_CC: in convertTailJumpOpcode()
491 case X86::TAILJMPd64_CC: in convertTailJumpOpcode()
492 Opcode = X86::JCC_1; in convertTailJumpOpcode()
508 case X86::LEA64_32r: in Lower()
509 case X86::LEA64r: in Lower()
510 case X86::LEA16r: in Lower()
511 case X86::LEA32r: in Lower()
513 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()
515 assert(OutMI.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in Lower()
519 case X86::MULX32Hrr: in Lower()
520 case X86::MULX32Hrm: in Lower()
521 case X86::MULX64Hrr: in Lower()
522 case X86::MULX64Hrm: { in Lower()
527 case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break; in Lower()
528 case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break; in Lower()
529 case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break; in Lower()
530 case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break; in Lower()
541 case X86::VMOVZPQILo2PQIrr: in Lower()
542 case X86::VMOVAPDrr: in Lower()
543 case X86::VMOVAPDYrr: in Lower()
544 case X86::VMOVAPSrr: in Lower()
545 case X86::VMOVAPSYrr: in Lower()
546 case X86::VMOVDQArr: in Lower()
547 case X86::VMOVDQAYrr: in Lower()
548 case X86::VMOVDQUrr: in Lower()
549 case X86::VMOVDQUYrr: in Lower()
550 case X86::VMOVUPDrr: in Lower()
551 case X86::VMOVUPDYrr: in Lower()
552 case X86::VMOVUPSrr: in Lower()
553 case X86::VMOVUPSYrr: { in Lower()
559 case X86::VMOVZPQILo2PQIrr: NewOpc = X86::VMOVPQI2QIrr; break; in Lower()
560 case X86::VMOVAPDrr: NewOpc = X86::VMOVAPDrr_REV; break; in Lower()
561 case X86::VMOVAPDYrr: NewOpc = X86::VMOVAPDYrr_REV; break; in Lower()
562 case X86::VMOVAPSrr: NewOpc = X86::VMOVAPSrr_REV; break; in Lower()
563 case X86::VMOVAPSYrr: NewOpc = X86::VMOVAPSYrr_REV; break; in Lower()
564 case X86::VMOVDQArr: NewOpc = X86::VMOVDQArr_REV; break; in Lower()
565 case X86::VMOVDQAYrr: NewOpc = X86::VMOVDQAYrr_REV; break; in Lower()
566 case X86::VMOVDQUrr: NewOpc = X86::VMOVDQUrr_REV; break; in Lower()
567 case X86::VMOVDQUYrr: NewOpc = X86::VMOVDQUYrr_REV; break; in Lower()
568 case X86::VMOVUPDrr: NewOpc = X86::VMOVUPDrr_REV; break; in Lower()
569 case X86::VMOVUPDYrr: NewOpc = X86::VMOVUPDYrr_REV; break; in Lower()
570 case X86::VMOVUPSrr: NewOpc = X86::VMOVUPSrr_REV; break; in Lower()
571 case X86::VMOVUPSYrr: NewOpc = X86::VMOVUPSYrr_REV; break; in Lower()
577 case X86::VMOVSDrr: in Lower()
578 case X86::VMOVSSrr: { in Lower()
584 case X86::VMOVSDrr: NewOpc = X86::VMOVSDrr_REV; break; in Lower()
585 case X86::VMOVSSrr: NewOpc = X86::VMOVSSrr_REV; break; in Lower()
592 case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rmik: in Lower()
593 case X86::VPCMPBZ128rri: case X86::VPCMPBZ128rrik: in Lower()
594 case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rmik: in Lower()
595 case X86::VPCMPBZ256rri: case X86::VPCMPBZ256rrik: in Lower()
596 case X86::VPCMPBZrmi: case X86::VPCMPBZrmik: in Lower()
597 case X86::VPCMPBZrri: case X86::VPCMPBZrrik: in Lower()
598 case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rmik: in Lower()
599 case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk: in Lower()
600 case X86::VPCMPDZ128rri: case X86::VPCMPDZ128rrik: in Lower()
601 case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rmik: in Lower()
602 case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk: in Lower()
603 case X86::VPCMPDZ256rri: case X86::VPCMPDZ256rrik: in Lower()
604 case X86::VPCMPDZrmi: case X86::VPCMPDZrmik: in Lower()
605 case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk: in Lower()
606 case X86::VPCMPDZrri: case X86::VPCMPDZrrik: in Lower()
607 case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rmik: in Lower()
608 case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk: in Lower()
609 case X86::VPCMPQZ128rri: case X86::VPCMPQZ128rrik: in Lower()
610 case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rmik: in Lower()
611 case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk: in Lower()
612 case X86::VPCMPQZ256rri: case X86::VPCMPQZ256rrik: in Lower()
613 case X86::VPCMPQZrmi: case X86::VPCMPQZrmik: in Lower()
614 case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk: in Lower()
615 case X86::VPCMPQZrri: case X86::VPCMPQZrrik: in Lower()
616 case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rmik: in Lower()
617 case X86::VPCMPWZ128rri: case X86::VPCMPWZ128rrik: in Lower()
618 case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rmik: in Lower()
619 case X86::VPCMPWZ256rri: case X86::VPCMPWZ256rrik: in Lower()
620 case X86::VPCMPWZrmi: case X86::VPCMPWZrmik: in Lower()
621 case X86::VPCMPWZrri: case X86::VPCMPWZrrik: { in Lower()
627 case X86::VPCMPBZ128rmi: NewOpc = X86::VPCMPEQBZ128rm; break; in Lower()
628 case X86::VPCMPBZ128rmik: NewOpc = X86::VPCMPEQBZ128rmk; break; in Lower()
629 case X86::VPCMPBZ128rri: NewOpc = X86::VPCMPEQBZ128rr; break; in Lower()
630 case X86::VPCMPBZ128rrik: NewOpc = X86::VPCMPEQBZ128rrk; break; in Lower()
631 case X86::VPCMPBZ256rmi: NewOpc = X86::VPCMPEQBZ256rm; break; in Lower()
632 case X86::VPCMPBZ256rmik: NewOpc = X86::VPCMPEQBZ256rmk; break; in Lower()
633 case X86::VPCMPBZ256rri: NewOpc = X86::VPCMPEQBZ256rr; break; in Lower()
634 case X86::VPCMPBZ256rrik: NewOpc = X86::VPCMPEQBZ256rrk; break; in Lower()
635 case X86::VPCMPBZrmi: NewOpc = X86::VPCMPEQBZrm; break; in Lower()
636 case X86::VPCMPBZrmik: NewOpc = X86::VPCMPEQBZrmk; break; in Lower()
637 case X86::VPCMPBZrri: NewOpc = X86::VPCMPEQBZrr; break; in Lower()
638 case X86::VPCMPBZrrik: NewOpc = X86::VPCMPEQBZrrk; break; in Lower()
639 case X86::VPCMPDZ128rmi: NewOpc = X86::VPCMPEQDZ128rm; break; in Lower()
640 case X86::VPCMPDZ128rmib: NewOpc = X86::VPCMPEQDZ128rmb; break; in Lower()
641 case X86::VPCMPDZ128rmibk: NewOpc = X86::VPCMPEQDZ128rmbk; break; in Lower()
642 case X86::VPCMPDZ128rmik: NewOpc = X86::VPCMPEQDZ128rmk; break; in Lower()
643 case X86::VPCMPDZ128rri: NewOpc = X86::VPCMPEQDZ128rr; break; in Lower()
644 case X86::VPCMPDZ128rrik: NewOpc = X86::VPCMPEQDZ128rrk; break; in Lower()
645 case X86::VPCMPDZ256rmi: NewOpc = X86::VPCMPEQDZ256rm; break; in Lower()
646 case X86::VPCMPDZ256rmib: NewOpc = X86::VPCMPEQDZ256rmb; break; in Lower()
647 case X86::VPCMPDZ256rmibk: NewOpc = X86::VPCMPEQDZ256rmbk; break; in Lower()
648 case X86::VPCMPDZ256rmik: NewOpc = X86::VPCMPEQDZ256rmk; break; in Lower()
649 case X86::VPCMPDZ256rri: NewOpc = X86::VPCMPEQDZ256rr; break; in Lower()
650 case X86::VPCMPDZ256rrik: NewOpc = X86::VPCMPEQDZ256rrk; break; in Lower()
651 case X86::VPCMPDZrmi: NewOpc = X86::VPCMPEQDZrm; break; in Lower()
652 case X86::VPCMPDZrmib: NewOpc = X86::VPCMPEQDZrmb; break; in Lower()
653 case X86::VPCMPDZrmibk: NewOpc = X86::VPCMPEQDZrmbk; break; in Lower()
654 case X86::VPCMPDZrmik: NewOpc = X86::VPCMPEQDZrmk; break; in Lower()
655 case X86::VPCMPDZrri: NewOpc = X86::VPCMPEQDZrr; break; in Lower()
656 case X86::VPCMPDZrrik: NewOpc = X86::VPCMPEQDZrrk; break; in Lower()
657 case X86::VPCMPQZ128rmi: NewOpc = X86::VPCMPEQQZ128rm; break; in Lower()
658 case X86::VPCMPQZ128rmib: NewOpc = X86::VPCMPEQQZ128rmb; break; in Lower()
659 case X86::VPCMPQZ128rmibk: NewOpc = X86::VPCMPEQQZ128rmbk; break; in Lower()
660 case X86::VPCMPQZ128rmik: NewOpc = X86::VPCMPEQQZ128rmk; break; in Lower()
661 case X86::VPCMPQZ128rri: NewOpc = X86::VPCMPEQQZ128rr; break; in Lower()
662 case X86::VPCMPQZ128rrik: NewOpc = X86::VPCMPEQQZ128rrk; break; in Lower()
663 case X86::VPCMPQZ256rmi: NewOpc = X86::VPCMPEQQZ256rm; break; in Lower()
664 case X86::VPCMPQZ256rmib: NewOpc = X86::VPCMPEQQZ256rmb; break; in Lower()
665 case X86::VPCMPQZ256rmibk: NewOpc = X86::VPCMPEQQZ256rmbk; break; in Lower()
666 case X86::VPCMPQZ256rmik: NewOpc = X86::VPCMPEQQZ256rmk; break; in Lower()
667 case X86::VPCMPQZ256rri: NewOpc = X86::VPCMPEQQZ256rr; break; in Lower()
668 case X86::VPCMPQZ256rrik: NewOpc = X86::VPCMPEQQZ256rrk; break; in Lower()
669 case X86::VPCMPQZrmi: NewOpc = X86::VPCMPEQQZrm; break; in Lower()
670 case X86::VPCMPQZrmib: NewOpc = X86::VPCMPEQQZrmb; break; in Lower()
671 case X86::VPCMPQZrmibk: NewOpc = X86::VPCMPEQQZrmbk; break; in Lower()
672 case X86::VPCMPQZrmik: NewOpc = X86::VPCMPEQQZrmk; break; in Lower()
673 case X86::VPCMPQZrri: NewOpc = X86::VPCMPEQQZrr; break; in Lower()
674 case X86::VPCMPQZrrik: NewOpc = X86::VPCMPEQQZrrk; break; in Lower()
675 case X86::VPCMPWZ128rmi: NewOpc = X86::VPCMPEQWZ128rm; break; in Lower()
676 case X86::VPCMPWZ128rmik: NewOpc = X86::VPCMPEQWZ128rmk; break; in Lower()
677 case X86::VPCMPWZ128rri: NewOpc = X86::VPCMPEQWZ128rr; break; in Lower()
678 case X86::VPCMPWZ128rrik: NewOpc = X86::VPCMPEQWZ128rrk; break; in Lower()
679 case X86::VPCMPWZ256rmi: NewOpc = X86::VPCMPEQWZ256rm; break; in Lower()
680 case X86::VPCMPWZ256rmik: NewOpc = X86::VPCMPEQWZ256rmk; break; in Lower()
681 case X86::VPCMPWZ256rri: NewOpc = X86::VPCMPEQWZ256rr; break; in Lower()
682 case X86::VPCMPWZ256rrik: NewOpc = X86::VPCMPEQWZ256rrk; break; in Lower()
683 case X86::VPCMPWZrmi: NewOpc = X86::VPCMPEQWZrm; break; in Lower()
684 case X86::VPCMPWZrmik: NewOpc = X86::VPCMPEQWZrmk; break; in Lower()
685 case X86::VPCMPWZrri: NewOpc = X86::VPCMPEQWZrr; break; in Lower()
686 case X86::VPCMPWZrrik: NewOpc = X86::VPCMPEQWZrrk; break; in Lower()
699 case X86::VPCMPBZ128rmi: NewOpc = X86::VPCMPGTBZ128rm; break; in Lower()
700 case X86::VPCMPBZ128rmik: NewOpc = X86::VPCMPGTBZ128rmk; break; in Lower()
701 case X86::VPCMPBZ128rri: NewOpc = X86::VPCMPGTBZ128rr; break; in Lower()
702 case X86::VPCMPBZ128rrik: NewOpc = X86::VPCMPGTBZ128rrk; break; in Lower()
703 case X86::VPCMPBZ256rmi: NewOpc = X86::VPCMPGTBZ256rm; break; in Lower()
704 case X86::VPCMPBZ256rmik: NewOpc = X86::VPCMPGTBZ256rmk; break; in Lower()
705 case X86::VPCMPBZ256rri: NewOpc = X86::VPCMPGTBZ256rr; break; in Lower()
706 case X86::VPCMPBZ256rrik: NewOpc = X86::VPCMPGTBZ256rrk; break; in Lower()
707 case X86::VPCMPBZrmi: NewOpc = X86::VPCMPGTBZrm; break; in Lower()
708 case X86::VPCMPBZrmik: NewOpc = X86::VPCMPGTBZrmk; break; in Lower()
709 case X86::VPCMPBZrri: NewOpc = X86::VPCMPGTBZrr; break; in Lower()
710 case X86::VPCMPBZrrik: NewOpc = X86::VPCMPGTBZrrk; break; in Lower()
711 case X86::VPCMPDZ128rmi: NewOpc = X86::VPCMPGTDZ128rm; break; in Lower()
712 case X86::VPCMPDZ128rmib: NewOpc = X86::VPCMPGTDZ128rmb; break; in Lower()
713 case X86::VPCMPDZ128rmibk: NewOpc = X86::VPCMPGTDZ128rmbk; break; in Lower()
714 case X86::VPCMPDZ128rmik: NewOpc = X86::VPCMPGTDZ128rmk; break; in Lower()
715 case X86::VPCMPDZ128rri: NewOpc = X86::VPCMPGTDZ128rr; break; in Lower()
716 case X86::VPCMPDZ128rrik: NewOpc = X86::VPCMPGTDZ128rrk; break; in Lower()
717 case X86::VPCMPDZ256rmi: NewOpc = X86::VPCMPGTDZ256rm; break; in Lower()
718 case X86::VPCMPDZ256rmib: NewOpc = X86::VPCMPGTDZ256rmb; break; in Lower()
719 case X86::VPCMPDZ256rmibk: NewOpc = X86::VPCMPGTDZ256rmbk; break; in Lower()
720 case X86::VPCMPDZ256rmik: NewOpc = X86::VPCMPGTDZ256rmk; break; in Lower()
721 case X86::VPCMPDZ256rri: NewOpc = X86::VPCMPGTDZ256rr; break; in Lower()
722 case X86::VPCMPDZ256rrik: NewOpc = X86::VPCMPGTDZ256rrk; break; in Lower()
723 case X86::VPCMPDZrmi: NewOpc = X86::VPCMPGTDZrm; break; in Lower()
724 case X86::VPCMPDZrmib: NewOpc = X86::VPCMPGTDZrmb; break; in Lower()
725 case X86::VPCMPDZrmibk: NewOpc = X86::VPCMPGTDZrmbk; break; in Lower()
726 case X86::VPCMPDZrmik: NewOpc = X86::VPCMPGTDZrmk; break; in Lower()
727 case X86::VPCMPDZrri: NewOpc = X86::VPCMPGTDZrr; break; in Lower()
728 case X86::VPCMPDZrrik: NewOpc = X86::VPCMPGTDZrrk; break; in Lower()
729 case X86::VPCMPQZ128rmi: NewOpc = X86::VPCMPGTQZ128rm; break; in Lower()
730 case X86::VPCMPQZ128rmib: NewOpc = X86::VPCMPGTQZ128rmb; break; in Lower()
731 case X86::VPCMPQZ128rmibk: NewOpc = X86::VPCMPGTQZ128rmbk; break; in Lower()
732 case X86::VPCMPQZ128rmik: NewOpc = X86::VPCMPGTQZ128rmk; break; in Lower()
733 case X86::VPCMPQZ128rri: NewOpc = X86::VPCMPGTQZ128rr; break; in Lower()
734 case X86::VPCMPQZ128rrik: NewOpc = X86::VPCMPGTQZ128rrk; break; in Lower()
735 case X86::VPCMPQZ256rmi: NewOpc = X86::VPCMPGTQZ256rm; break; in Lower()
736 case X86::VPCMPQZ256rmib: NewOpc = X86::VPCMPGTQZ256rmb; break; in Lower()
737 case X86::VPCMPQZ256rmibk: NewOpc = X86::VPCMPGTQZ256rmbk; break; in Lower()
738 case X86::VPCMPQZ256rmik: NewOpc = X86::VPCMPGTQZ256rmk; break; in Lower()
739 case X86::VPCMPQZ256rri: NewOpc = X86::VPCMPGTQZ256rr; break; in Lower()
740 case X86::VPCMPQZ256rrik: NewOpc = X86::VPCMPGTQZ256rrk; break; in Lower()
741 case X86::VPCMPQZrmi: NewOpc = X86::VPCMPGTQZrm; break; in Lower()
742 case X86::VPCMPQZrmib: NewOpc = X86::VPCMPGTQZrmb; break; in Lower()
743 case X86::VPCMPQZrmibk: NewOpc = X86::VPCMPGTQZrmbk; break; in Lower()
744 case X86::VPCMPQZrmik: NewOpc = X86::VPCMPGTQZrmk; break; in Lower()
745 case X86::VPCMPQZrri: NewOpc = X86::VPCMPGTQZrr; break; in Lower()
746 case X86::VPCMPQZrrik: NewOpc = X86::VPCMPGTQZrrk; break; in Lower()
747 case X86::VPCMPWZ128rmi: NewOpc = X86::VPCMPGTWZ128rm; break; in Lower()
748 case X86::VPCMPWZ128rmik: NewOpc = X86::VPCMPGTWZ128rmk; break; in Lower()
749 case X86::VPCMPWZ128rri: NewOpc = X86::VPCMPGTWZ128rr; break; in Lower()
750 case X86::VPCMPWZ128rrik: NewOpc = X86::VPCMPGTWZ128rrk; break; in Lower()
751 case X86::VPCMPWZ256rmi: NewOpc = X86::VPCMPGTWZ256rm; break; in Lower()
752 case X86::VPCMPWZ256rmik: NewOpc = X86::VPCMPGTWZ256rmk; break; in Lower()
753 case X86::VPCMPWZ256rri: NewOpc = X86::VPCMPGTWZ256rr; break; in Lower()
754 case X86::VPCMPWZ256rrik: NewOpc = X86::VPCMPGTWZ256rrk; break; in Lower()
755 case X86::VPCMPWZrmi: NewOpc = X86::VPCMPGTWZrm; break; in Lower()
756 case X86::VPCMPWZrmik: NewOpc = X86::VPCMPGTWZrmk; break; in Lower()
757 case X86::VPCMPWZrri: NewOpc = X86::VPCMPGTWZrr; break; in Lower()
758 case X86::VPCMPWZrrik: NewOpc = X86::VPCMPGTWZrrk; break; in Lower()
773 case X86::CALL64r: in Lower()
774 case X86::CALL64pcrel32: in Lower()
778 case X86::EH_RETURN: in Lower()
779 case X86::EH_RETURN64: { in Lower()
785 case X86::CLEANUPRET: { in Lower()
792 case X86::CATCHRET: { in Lower()
795 unsigned ReturnReg = Subtarget.is64Bit() ? X86::RAX : X86::EAX; in Lower()
804 case X86::TAILJMPr: in Lower()
805 case X86::TAILJMPr64: in Lower()
806 case X86::TAILJMPr64_REX: in Lower()
807 case X86::TAILJMPd: in Lower()
808 case X86::TAILJMPd64: in Lower()
813 case X86::TAILJMPd_CC: in Lower()
814 case X86::TAILJMPd64_CC: in Lower()
819 case X86::TAILJMPm: in Lower()
820 case X86::TAILJMPm64: in Lower()
821 case X86::TAILJMPm64_REX: in Lower()
822 assert(OutMI.getNumOperands() == X86::AddrNumOperands && in Lower()
827 case X86::DEC16r: in Lower()
828 case X86::DEC32r: in Lower()
829 case X86::INC16r: in Lower()
830 case X86::INC32r: in Lower()
836 case X86::DEC16r: Opcode = X86::DEC16r_alt; break; in Lower()
837 case X86::DEC32r: Opcode = X86::DEC32r_alt; break; in Lower()
838 case X86::INC16r: Opcode = X86::INC16r_alt; break; in Lower()
839 case X86::INC32r: Opcode = X86::INC32r_alt; break; in Lower()
852 case X86::MOV8mr_NOREX: in Lower()
853 case X86::MOV8mr: in Lower()
854 case X86::MOV8rm_NOREX: in Lower()
855 case X86::MOV8rm: in Lower()
856 case X86::MOV16mr: in Lower()
857 case X86::MOV16rm: in Lower()
858 case X86::MOV32mr: in Lower()
859 case X86::MOV32rm: { in Lower()
863 case X86::MOV8mr_NOREX: in Lower()
864 case X86::MOV8mr: NewOpc = X86::MOV8o32a; break; in Lower()
865 case X86::MOV8rm_NOREX: in Lower()
866 case X86::MOV8rm: NewOpc = X86::MOV8ao32; break; in Lower()
867 case X86::MOV16mr: NewOpc = X86::MOV16o32a; break; in Lower()
868 case X86::MOV16rm: NewOpc = X86::MOV16ao32; break; in Lower()
869 case X86::MOV32mr: NewOpc = X86::MOV32o32a; break; in Lower()
870 case X86::MOV32rm: NewOpc = X86::MOV32ao32; break; in Lower()
876 case X86::ADC8ri: case X86::ADC16ri: case X86::ADC32ri: case X86::ADC64ri32: in Lower()
877 case X86::ADD8ri: case X86::ADD16ri: case X86::ADD32ri: case X86::ADD64ri32: in Lower()
878 case X86::AND8ri: case X86::AND16ri: case X86::AND32ri: case X86::AND64ri32: in Lower()
879 case X86::CMP8ri: case X86::CMP16ri: case X86::CMP32ri: case X86::CMP64ri32: in Lower()
880 case X86::OR8ri: case X86::OR16ri: case X86::OR32ri: case X86::OR64ri32: in Lower()
881 case X86::SBB8ri: case X86::SBB16ri: case X86::SBB32ri: case X86::SBB64ri32: in Lower()
882 case X86::SUB8ri: case X86::SUB16ri: case X86::SUB32ri: case X86::SUB64ri32: in Lower()
883 case X86::TEST8ri:case X86::TEST16ri:case X86::TEST32ri:case X86::TEST64ri32: in Lower()
884 case X86::XOR8ri: case X86::XOR16ri: case X86::XOR32ri: case X86::XOR64ri32: { in Lower()
888 case X86::ADC8ri: NewOpc = X86::ADC8i8; break; in Lower()
889 case X86::ADC16ri: NewOpc = X86::ADC16i16; break; in Lower()
890 case X86::ADC32ri: NewOpc = X86::ADC32i32; break; in Lower()
891 case X86::ADC64ri32: NewOpc = X86::ADC64i32; break; in Lower()
892 case X86::ADD8ri: NewOpc = X86::ADD8i8; break; in Lower()
893 case X86::ADD16ri: NewOpc = X86::ADD16i16; break; in Lower()
894 case X86::ADD32ri: NewOpc = X86::ADD32i32; break; in Lower()
895 case X86::ADD64ri32: NewOpc = X86::ADD64i32; break; in Lower()
896 case X86::AND8ri: NewOpc = X86::AND8i8; break; in Lower()
897 case X86::AND16ri: NewOpc = X86::AND16i16; break; in Lower()
898 case X86::AND32ri: NewOpc = X86::AND32i32; break; in Lower()
899 case X86::AND64ri32: NewOpc = X86::AND64i32; break; in Lower()
900 case X86::CMP8ri: NewOpc = X86::CMP8i8; break; in Lower()
901 case X86::CMP16ri: NewOpc = X86::CMP16i16; break; in Lower()
902 case X86::CMP32ri: NewOpc = X86::CMP32i32; break; in Lower()
903 case X86::CMP64ri32: NewOpc = X86::CMP64i32; break; in Lower()
904 case X86::OR8ri: NewOpc = X86::OR8i8; break; in Lower()
905 case X86::OR16ri: NewOpc = X86::OR16i16; break; in Lower()
906 case X86::OR32ri: NewOpc = X86::OR32i32; break; in Lower()
907 case X86::OR64ri32: NewOpc = X86::OR64i32; break; in Lower()
908 case X86::SBB8ri: NewOpc = X86::SBB8i8; break; in Lower()
909 case X86::SBB16ri: NewOpc = X86::SBB16i16; break; in Lower()
910 case X86::SBB32ri: NewOpc = X86::SBB32i32; break; in Lower()
911 case X86::SBB64ri32: NewOpc = X86::SBB64i32; break; in Lower()
912 case X86::SUB8ri: NewOpc = X86::SUB8i8; break; in Lower()
913 case X86::SUB16ri: NewOpc = X86::SUB16i16; break; in Lower()
914 case X86::SUB32ri: NewOpc = X86::SUB32i32; break; in Lower()
915 case X86::SUB64ri32: NewOpc = X86::SUB64i32; break; in Lower()
916 case X86::TEST8ri: NewOpc = X86::TEST8i8; break; in Lower()
917 case X86::TEST16ri: NewOpc = X86::TEST16i16; break; in Lower()
918 case X86::TEST32ri: NewOpc = X86::TEST32i32; break; in Lower()
919 case X86::TEST64ri32: NewOpc = X86::TEST64i32; break; in Lower()
920 case X86::XOR8ri: NewOpc = X86::XOR8i8; break; in Lower()
921 case X86::XOR16ri: NewOpc = X86::XOR16i16; break; in Lower()
922 case X86::XOR32ri: NewOpc = X86::XOR32i32; break; in Lower()
923 case X86::XOR64ri32: NewOpc = X86::XOR64i32; break; in Lower()
930 case X86::MOVSX16rr8: in Lower()
931 case X86::MOVSX32rr16: in Lower()
932 case X86::MOVSX64rr32: in Lower()
936 case X86::VCMPPDrri: in Lower()
937 case X86::VCMPPDYrri: in Lower()
938 case X86::VCMPPSrri: in Lower()
939 case X86::VCMPPSYrri: in Lower()
940 case X86::VCMPSDrr: in Lower()
941 case X86::VCMPSSrr: { in Lower()
960 case X86::VMOVHLPSrr: in Lower()
961 case X86::VUNPCKHPDrr: in Lower()
965 case X86::MASKMOVDQU: in Lower()
966 case X86::VMASKMOVDQU: in Lower()
968 OutMI.setFlags(X86::IP_HAS_AD_SIZE); in Lower()
993 bool Is64Bits = MI.getOpcode() != X86::TLS_addr32 && in LowerTlsAddr()
994 MI.getOpcode() != X86::TLS_base_addr32; in LowerTlsAddr()
995 bool Is64BitsLP64 = MI.getOpcode() == X86::TLS_addr64 || in LowerTlsAddr()
996 MI.getOpcode() == X86::TLS_base_addr64; in LowerTlsAddr()
1001 case X86::TLS_addr32: in LowerTlsAddr()
1002 case X86::TLS_addr64: in LowerTlsAddr()
1003 case X86::TLS_addrX32: in LowerTlsAddr()
1006 case X86::TLS_base_addr32: in LowerTlsAddr()
1009 case X86::TLS_base_addr64: in LowerTlsAddr()
1010 case X86::TLS_base_addrX32: in LowerTlsAddr()
1031 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
1032 EmitAndCountInstruction(MCInstBuilder(X86::LEA64r) in LowerTlsAddr()
1033 .addReg(X86::RDI) in LowerTlsAddr()
1034 .addReg(X86::RIP) in LowerTlsAddr()
1042 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
1043 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
1044 EmitAndCountInstruction(MCInstBuilder(X86::REX64_PREFIX)); in LowerTlsAddr()
1049 EmitAndCountInstruction(MCInstBuilder(X86::CALL64m) in LowerTlsAddr()
1050 .addReg(X86::RIP) in LowerTlsAddr()
1057 MCInstBuilder(X86::CALL64pcrel32) in LowerTlsAddr()
1063 EmitAndCountInstruction(MCInstBuilder(X86::LEA32r) in LowerTlsAddr()
1064 .addReg(X86::EAX) in LowerTlsAddr()
1067 .addReg(X86::EBX) in LowerTlsAddr()
1071 EmitAndCountInstruction(MCInstBuilder(X86::LEA32r) in LowerTlsAddr()
1072 .addReg(X86::EAX) in LowerTlsAddr()
1073 .addReg(X86::EBX) in LowerTlsAddr()
1084 EmitAndCountInstruction(MCInstBuilder(X86::CALL32m) in LowerTlsAddr()
1085 .addReg(X86::EBX) in LowerTlsAddr()
1092 MCInstBuilder(X86::CALLpcrel32) in LowerTlsAddr()
1110 if (Subtarget->hasFeature(X86::TuningFast7ByteNOP)) in emitNop()
1112 else if (Subtarget->hasFeature(X86::TuningFast15ByteNOP)) in emitNop()
1114 else if (Subtarget->hasFeature(X86::TuningFast11ByteNOP)) in emitNop()
1127 BaseReg = X86::RAX; in emitNop()
1135 Opc = X86::NOOP; in emitNop()
1139 Opc = X86::XCHG16ar; in emitNop()
1143 Opc = X86::NOOPL; in emitNop()
1147 Opc = X86::NOOPL; in emitNop()
1152 Opc = X86::NOOPL; in emitNop()
1154 IndexReg = X86::RAX; in emitNop()
1158 Opc = X86::NOOPW; in emitNop()
1160 IndexReg = X86::RAX; in emitNop()
1164 Opc = X86::NOOPL; in emitNop()
1169 Opc = X86::NOOPL; in emitNop()
1171 IndexReg = X86::RAX; in emitNop()
1175 Opc = X86::NOOPW; in emitNop()
1177 IndexReg = X86::RAX; in emitNop()
1181 Opc = X86::NOOPW; in emitNop()
1183 IndexReg = X86::RAX; in emitNop()
1184 SegmentReg = X86::CS; in emitNop()
1195 case X86::NOOP: in emitNop()
1198 case X86::XCHG16ar: in emitNop()
1199 OS.emitInstruction(MCInstBuilder(Opc).addReg(X86::AX).addReg(X86::AX), in emitNop()
1202 case X86::NOOPL: in emitNop()
1203 case X86::NOOPW: in emitNop()
1247 CallOpcode = X86::CALL64pcrel32; in LowerSTATEPOINT()
1255 CallOpcode = X86::CALL64pcrel32; in LowerSTATEPOINT()
1267 CallOpcode = X86::CALL64r; in LowerSTATEPOINT()
1313 if (DefRegister != X86::NoRegister) in LowerFAULTING_OP()
1335 MCInstBuilder(Is64Bits ? X86::CALL64pcrel32 : X86::CALLpcrel32) in LowerFENTRY_CALL()
1367 MCInstBuilder(X86::CALL64pcrel32) in LowerASAN_CHECK_MEMACCESS()
1401 MCInstBuilder(X86::MOV32rr_REV).addReg(X86::EDI).addReg(X86::EDI), in LowerPATCHABLE_OP()
1403 } else if (MinSize == 2 && Opcode == X86::PUSH64r) { in LowerPATCHABLE_OP()
1409 MCI.setOpcode(X86::PUSH64rmr); in LowerPATCHABLE_OP()
1482 MCInstBuilder(X86::MOV64ri).addReg(ScratchReg).addOperand(CalleeMCOp)); in LowerPATCHPOINT()
1487 EmitAndCountInstruction(MCInstBuilder(X86::CALL64r).addReg(ScratchReg)); in LowerPATCHPOINT()
1536 const Register DestRegs[] = {X86::RDI, X86::RSI}; in LowerPATCHABLE_EVENT_CALL()
1553 MCInstBuilder(X86::PUSH64r).addReg(DestRegs[I])); in LowerPATCHABLE_EVENT_CALL()
1566 MCInstBuilder(X86::MOV64rr).addReg(DestRegs[I]).addReg(SrcRegs[I])); in LowerPATCHABLE_EVENT_CALL()
1576 EmitAndCountInstruction(MCInstBuilder(X86::CALL64pcrel32) in LowerPATCHABLE_EVENT_CALL()
1582 EmitAndCountInstruction(MCInstBuilder(X86::POP64r).addReg(DestRegs[I])); in LowerPATCHABLE_EVENT_CALL()
1633 const Register DestRegs[] = {X86::RDI, X86::RSI, X86::RDX}; in LowerPATCHABLE_TYPED_EVENT_CALL()
1651 MCInstBuilder(X86::PUSH64r).addReg(DestRegs[I])); in LowerPATCHABLE_TYPED_EVENT_CALL()
1669 MCInstBuilder(X86::MOV64rr).addReg(DestRegs[I]).addReg(SrcRegs[I])); in LowerPATCHABLE_TYPED_EVENT_CALL()
1679 EmitAndCountInstruction(MCInstBuilder(X86::CALL64pcrel32) in LowerPATCHABLE_TYPED_EVENT_CALL()
1685 EmitAndCountInstruction(MCInstBuilder(X86::POP64r).addReg(DestRegs[I])); in LowerPATCHABLE_TYPED_EVENT_CALL()
1964 case X86::SEH_PushReg: in EmitSEHInstruction()
1967 case X86::SEH_StackAlloc: in EmitSEHInstruction()
1970 case X86::SEH_StackAlign: in EmitSEHInstruction()
1973 case X86::SEH_SetFrame: in EmitSEHInstruction()
1978 case X86::SEH_EndPrologue: in EmitSEHInstruction()
1981 case X86::SEH_SaveReg: in EmitSEHInstruction()
1982 case X86::SEH_SaveXMM: in EmitSEHInstruction()
1983 case X86::SEH_PushFrame: in EmitSEHInstruction()
1994 case X86::SEH_PushReg: in EmitSEHInstruction()
1998 case X86::SEH_SaveReg: in EmitSEHInstruction()
2003 case X86::SEH_SaveXMM: in EmitSEHInstruction()
2008 case X86::SEH_StackAlloc: in EmitSEHInstruction()
2012 case X86::SEH_SetFrame: in EmitSEHInstruction()
2017 case X86::SEH_PushFrame: in EmitSEHInstruction()
2021 case X86::SEH_EndPrologue: in EmitSEHInstruction()
2031 if (Info.RegClass == X86::VR128RegClassID || in getRegisterWidth()
2032 Info.RegClass == X86::VR128XRegClassID) in getRegisterWidth()
2034 if (Info.RegClass == X86::VR256RegClassID || in getRegisterWidth()
2035 Info.RegClass == X86::VR256XRegClassID) in getRegisterWidth()
2037 if (Info.RegClass == X86::VR512RegClassID) in getRegisterWidth()
2048 case X86::PSHUFBrm: in addConstantComments()
2049 case X86::VPSHUFBrm: in addConstantComments()
2050 case X86::VPSHUFBYrm: in addConstantComments()
2051 case X86::VPSHUFBZ128rm: in addConstantComments()
2052 case X86::VPSHUFBZ128rmk: in addConstantComments()
2053 case X86::VPSHUFBZ128rmkz: in addConstantComments()
2054 case X86::VPSHUFBZ256rm: in addConstantComments()
2055 case X86::VPSHUFBZ256rmk: in addConstantComments()
2056 case X86::VPSHUFBZ256rmkz: in addConstantComments()
2057 case X86::VPSHUFBZrm: in addConstantComments()
2058 case X86::VPSHUFBZrmk: in addConstantComments()
2059 case X86::VPSHUFBZrmkz: { in addConstantComments()
2069 unsigned MaskIdx = SrcIdx + 1 + X86::AddrDisp; in addConstantComments()
2071 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()
2085 case X86::VPERMILPSrm: in addConstantComments()
2086 case X86::VPERMILPSYrm: in addConstantComments()
2087 case X86::VPERMILPSZ128rm: in addConstantComments()
2088 case X86::VPERMILPSZ128rmk: in addConstantComments()
2089 case X86::VPERMILPSZ128rmkz: in addConstantComments()
2090 case X86::VPERMILPSZ256rm: in addConstantComments()
2091 case X86::VPERMILPSZ256rmk: in addConstantComments()
2092 case X86::VPERMILPSZ256rmkz: in addConstantComments()
2093 case X86::VPERMILPSZrm: in addConstantComments()
2094 case X86::VPERMILPSZrmk: in addConstantComments()
2095 case X86::VPERMILPSZrmkz: in addConstantComments()
2096 case X86::VPERMILPDrm: in addConstantComments()
2097 case X86::VPERMILPDYrm: in addConstantComments()
2098 case X86::VPERMILPDZ128rm: in addConstantComments()
2099 case X86::VPERMILPDZ128rmk: in addConstantComments()
2100 case X86::VPERMILPDZ128rmkz: in addConstantComments()
2101 case X86::VPERMILPDZ256rm: in addConstantComments()
2102 case X86::VPERMILPDZ256rmk: in addConstantComments()
2103 case X86::VPERMILPDZ256rmkz: in addConstantComments()
2104 case X86::VPERMILPDZrm: in addConstantComments()
2105 case X86::VPERMILPDZrmk: in addConstantComments()
2106 case X86::VPERMILPDZrmkz: { in addConstantComments()
2110 case X86::VPERMILPSrm: in addConstantComments()
2111 case X86::VPERMILPSYrm: in addConstantComments()
2112 case X86::VPERMILPSZ128rm: in addConstantComments()
2113 case X86::VPERMILPSZ256rm: in addConstantComments()
2114 case X86::VPERMILPSZrm: in addConstantComments()
2115 case X86::VPERMILPSZ128rmkz: in addConstantComments()
2116 case X86::VPERMILPSZ256rmkz: in addConstantComments()
2117 case X86::VPERMILPSZrmkz: in addConstantComments()
2118 case X86::VPERMILPSZ128rmk: in addConstantComments()
2119 case X86::VPERMILPSZ256rmk: in addConstantComments()
2120 case X86::VPERMILPSZrmk: in addConstantComments()
2123 case X86::VPERMILPDrm: in addConstantComments()
2124 case X86::VPERMILPDYrm: in addConstantComments()
2125 case X86::VPERMILPDZ128rm: in addConstantComments()
2126 case X86::VPERMILPDZ256rm: in addConstantComments()
2127 case X86::VPERMILPDZrm: in addConstantComments()
2128 case X86::VPERMILPDZ128rmkz: in addConstantComments()
2129 case X86::VPERMILPDZ256rmkz: in addConstantComments()
2130 case X86::VPERMILPDZrmkz: in addConstantComments()
2131 case X86::VPERMILPDZ128rmk: in addConstantComments()
2132 case X86::VPERMILPDZ256rmk: in addConstantComments()
2133 case X86::VPERMILPDZrmk: in addConstantComments()
2147 unsigned MaskIdx = SrcIdx + 1 + X86::AddrDisp; in addConstantComments()
2149 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()
2163 case X86::VPERMIL2PDrm: in addConstantComments()
2164 case X86::VPERMIL2PSrm: in addConstantComments()
2165 case X86::VPERMIL2PDYrm: in addConstantComments()
2166 case X86::VPERMIL2PSYrm: { in addConstantComments()
2167 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands + 1) && in addConstantComments()
2177 case X86::VPERMIL2PSrm: case X86::VPERMIL2PSYrm: ElSize = 32; break; in addConstantComments()
2178 case X86::VPERMIL2PDrm: case X86::VPERMIL2PDYrm: ElSize = 64; break; in addConstantComments()
2181 const MachineOperand &MaskOp = MI->getOperand(3 + X86::AddrDisp); in addConstantComments()
2192 case X86::VPPERMrrm: { in addConstantComments()
2193 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands) && in addConstantComments()
2196 const MachineOperand &MaskOp = MI->getOperand(3 + X86::AddrDisp); in addConstantComments()
2207 case X86::MMX_MOVQ64rm: { in addConstantComments()
2208 assert(MI->getNumOperands() == (1 + X86::AddrNumOperands) && in addConstantComments()
2210 if (auto *C = getConstantFromPool(*MI, MI->getOperand(1 + X86::AddrDisp))) { in addConstantComments()
2224 case X86::Prefix##MOVAPD##Suffix##rm: \ in addConstantComments()
2225 case X86::Prefix##MOVAPS##Suffix##rm: \ in addConstantComments()
2226 case X86::Prefix##MOVUPD##Suffix##rm: \ in addConstantComments()
2227 case X86::Prefix##MOVUPS##Suffix##rm: \ in addConstantComments()
2228 case X86::Prefix##MOVDQA##Suffix##rm: \ in addConstantComments()
2229 case X86::Prefix##MOVDQU##Suffix##rm: in addConstantComments()
2232 case X86::VMOVDQA64##Suffix##rm: \ in addConstantComments()
2233 case X86::VMOVDQA32##Suffix##rm: \ in addConstantComments()
2234 case X86::VMOVDQU64##Suffix##rm: \ in addConstantComments()
2235 case X86::VMOVDQU32##Suffix##rm: \ in addConstantComments()
2236 case X86::VMOVDQU16##Suffix##rm: \ in addConstantComments()
2237 case X86::VMOVDQU8##Suffix##rm: \ in addConstantComments()
2238 case X86::VMOVAPS##Suffix##rm: \ in addConstantComments()
2239 case X86::VMOVAPD##Suffix##rm: \ in addConstantComments()
2240 case X86::VMOVUPS##Suffix##rm: \ in addConstantComments()
2241 case X86::VMOVUPD##Suffix##rm: in addConstantComments()
2254 case X86::VBROADCASTF128: in addConstantComments()
2255 case X86::VBROADCASTI128: in addConstantComments()
2256 case X86::VBROADCASTF32X4Z256rm: in addConstantComments()
2257 case X86::VBROADCASTF32X4rm: in addConstantComments()
2258 case X86::VBROADCASTF32X8rm: in addConstantComments()
2259 case X86::VBROADCASTF64X2Z128rm: in addConstantComments()
2260 case X86::VBROADCASTF64X2rm: in addConstantComments()
2261 case X86::VBROADCASTF64X4rm: in addConstantComments()
2262 case X86::VBROADCASTI32X4Z256rm: in addConstantComments()
2263 case X86::VBROADCASTI32X4rm: in addConstantComments()
2264 case X86::VBROADCASTI32X8rm: in addConstantComments()
2265 case X86::VBROADCASTI64X2Z128rm: in addConstantComments()
2266 case X86::VBROADCASTI64X2rm: in addConstantComments()
2267 case X86::VBROADCASTI64X4rm: in addConstantComments()
2268 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()
2270 if (auto *C = getConstantFromPool(*MI, MI->getOperand(1 + X86::AddrDisp))) { in addConstantComments()
2274 case X86::VBROADCASTF128: NumLanes = 2; break; in addConstantComments()
2275 case X86::VBROADCASTI128: NumLanes = 2; break; in addConstantComments()
2276 case X86::VBROADCASTF32X4Z256rm: NumLanes = 2; break; in addConstantComments()
2277 case X86::VBROADCASTF32X4rm: NumLanes = 4; break; in addConstantComments()
2278 case X86::VBROADCASTF32X8rm: NumLanes = 2; break; in addConstantComments()
2279 case X86::VBROADCASTF64X2Z128rm: NumLanes = 2; break; in addConstantComments()
2280 case X86::VBROADCASTF64X2rm: NumLanes = 4; break; in addConstantComments()
2281 case X86::VBROADCASTF64X4rm: NumLanes = 2; break; in addConstantComments()
2282 case X86::VBROADCASTI32X4Z256rm: NumLanes = 2; break; in addConstantComments()
2283 case X86::VBROADCASTI32X4rm: NumLanes = 4; break; in addConstantComments()
2284 case X86::VBROADCASTI32X8rm: NumLanes = 2; break; in addConstantComments()
2285 case X86::VBROADCASTI64X2Z128rm: NumLanes = 2; break; in addConstantComments()
2286 case X86::VBROADCASTI64X2rm: NumLanes = 4; break; in addConstantComments()
2287 case X86::VBROADCASTI64X4rm: NumLanes = 2; break; in addConstantComments()
2329 case X86::MOVDDUPrm: in addConstantComments()
2330 case X86::VMOVDDUPrm: in addConstantComments()
2331 case X86::VMOVDDUPZ128rm: in addConstantComments()
2332 case X86::VBROADCASTSSrm: in addConstantComments()
2333 case X86::VBROADCASTSSYrm: in addConstantComments()
2334 case X86::VBROADCASTSSZ128rm: in addConstantComments()
2335 case X86::VBROADCASTSSZ256rm: in addConstantComments()
2336 case X86::VBROADCASTSSZrm: in addConstantComments()
2337 case X86::VBROADCASTSDYrm: in addConstantComments()
2338 case X86::VBROADCASTSDZ256rm: in addConstantComments()
2339 case X86::VBROADCASTSDZrm: in addConstantComments()
2340 case X86::VPBROADCASTBrm: in addConstantComments()
2341 case X86::VPBROADCASTBYrm: in addConstantComments()
2342 case X86::VPBROADCASTBZ128rm: in addConstantComments()
2343 case X86::VPBROADCASTBZ256rm: in addConstantComments()
2344 case X86::VPBROADCASTBZrm: in addConstantComments()
2345 case X86::VPBROADCASTDrm: in addConstantComments()
2346 case X86::VPBROADCASTDYrm: in addConstantComments()
2347 case X86::VPBROADCASTDZ128rm: in addConstantComments()
2348 case X86::VPBROADCASTDZ256rm: in addConstantComments()
2349 case X86::VPBROADCASTDZrm: in addConstantComments()
2350 case X86::VPBROADCASTQrm: in addConstantComments()
2351 case X86::VPBROADCASTQYrm: in addConstantComments()
2352 case X86::VPBROADCASTQZ128rm: in addConstantComments()
2353 case X86::VPBROADCASTQZ256rm: in addConstantComments()
2354 case X86::VPBROADCASTQZrm: in addConstantComments()
2355 case X86::VPBROADCASTWrm: in addConstantComments()
2356 case X86::VPBROADCASTWYrm: in addConstantComments()
2357 case X86::VPBROADCASTWZ128rm: in addConstantComments()
2358 case X86::VPBROADCASTWZ256rm: in addConstantComments()
2359 case X86::VPBROADCASTWZrm: in addConstantComments()
2360 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()
2362 if (auto *C = getConstantFromPool(*MI, MI->getOperand(1 + X86::AddrDisp))) { in addConstantComments()
2366 case X86::MOVDDUPrm: NumElts = 2; break; in addConstantComments()
2367 case X86::VMOVDDUPrm: NumElts = 2; break; in addConstantComments()
2368 case X86::VMOVDDUPZ128rm: NumElts = 2; break; in addConstantComments()
2369 case X86::VBROADCASTSSrm: NumElts = 4; break; in addConstantComments()
2370 case X86::VBROADCASTSSYrm: NumElts = 8; break; in addConstantComments()
2371 case X86::VBROADCASTSSZ128rm: NumElts = 4; break; in addConstantComments()
2372 case X86::VBROADCASTSSZ256rm: NumElts = 8; break; in addConstantComments()
2373 case X86::VBROADCASTSSZrm: NumElts = 16; break; in addConstantComments()
2374 case X86::VBROADCASTSDYrm: NumElts = 4; break; in addConstantComments()
2375 case X86::VBROADCASTSDZ256rm: NumElts = 4; break; in addConstantComments()
2376 case X86::VBROADCASTSDZrm: NumElts = 8; break; in addConstantComments()
2377 case X86::VPBROADCASTBrm: NumElts = 16; break; in addConstantComments()
2378 case X86::VPBROADCASTBYrm: NumElts = 32; break; in addConstantComments()
2379 case X86::VPBROADCASTBZ128rm: NumElts = 16; break; in addConstantComments()
2380 case X86::VPBROADCASTBZ256rm: NumElts = 32; break; in addConstantComments()
2381 case X86::VPBROADCASTBZrm: NumElts = 64; break; in addConstantComments()
2382 case X86::VPBROADCASTDrm: NumElts = 4; break; in addConstantComments()
2383 case X86::VPBROADCASTDYrm: NumElts = 8; break; in addConstantComments()
2384 case X86::VPBROADCASTDZ128rm: NumElts = 4; break; in addConstantComments()
2385 case X86::VPBROADCASTDZ256rm: NumElts = 8; break; in addConstantComments()
2386 case X86::VPBROADCASTDZrm: NumElts = 16; break; in addConstantComments()
2387 case X86::VPBROADCASTQrm: NumElts = 2; break; in addConstantComments()
2388 case X86::VPBROADCASTQYrm: NumElts = 4; break; in addConstantComments()
2389 case X86::VPBROADCASTQZ128rm: NumElts = 2; break; in addConstantComments()
2390 case X86::VPBROADCASTQZ256rm: NumElts = 4; break; in addConstantComments()
2391 case X86::VPBROADCASTQZrm: NumElts = 8; break; in addConstantComments()
2392 case X86::VPBROADCASTWrm: NumElts = 8; break; in addConstantComments()
2393 case X86::VPBROADCASTWYrm: NumElts = 16; break; in addConstantComments()
2394 case X86::VPBROADCASTWZ128rm: NumElts = 8; break; in addConstantComments()
2395 case X86::VPBROADCASTWZ256rm: NumElts = 16; break; in addConstantComments()
2396 case X86::VPBROADCASTWZrm: NumElts = 32; break; in addConstantComments()
2424 if (MI->getOpcode() == X86::OR64rm) { in emitInstruction()
2436 if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_VEX) in emitInstruction()
2449 case X86::Int_MemBarrier: in emitInstruction()
2453 case X86::EH_RETURN: in emitInstruction()
2454 case X86::EH_RETURN64: { in emitInstruction()
2461 case X86::CLEANUPRET: { in emitInstruction()
2467 case X86::CATCHRET: { in emitInstruction()
2473 case X86::ENDBR32: in emitInstruction()
2474 case X86::ENDBR64: { in emitInstruction()
2492 case X86::TAILJMPr: in emitInstruction()
2493 case X86::TAILJMPm: in emitInstruction()
2494 case X86::TAILJMPd: in emitInstruction()
2495 case X86::TAILJMPd_CC: in emitInstruction()
2496 case X86::TAILJMPr64: in emitInstruction()
2497 case X86::TAILJMPm64: in emitInstruction()
2498 case X86::TAILJMPd64: in emitInstruction()
2499 case X86::TAILJMPd64_CC: in emitInstruction()
2500 case X86::TAILJMPr64_REX: in emitInstruction()
2501 case X86::TAILJMPm64_REX: in emitInstruction()
2506 case X86::TLS_addr32: in emitInstruction()
2507 case X86::TLS_addr64: in emitInstruction()
2508 case X86::TLS_addrX32: in emitInstruction()
2509 case X86::TLS_base_addr32: in emitInstruction()
2510 case X86::TLS_base_addr64: in emitInstruction()
2511 case X86::TLS_base_addrX32: in emitInstruction()
2514 case X86::MOVPC32r: { in emitInstruction()
2526 MCInstBuilder(X86::CALLpcrel32) in emitInstruction()
2548 MCInstBuilder(X86::POP32r).addReg(MI->getOperand(0).getReg())); in emitInstruction()
2556 case X86::ADD32ri: { in emitInstruction()
2582 EmitAndCountInstruction(MCInstBuilder(X86::ADD32ri) in emitInstruction()
2621 case X86::MORESTACK_RET: in emitInstruction()
2625 case X86::ASAN_CHECK_MEMACCESS: in emitInstruction()
2628 case X86::MORESTACK_RET_RESTORE_R10: in emitInstruction()
2632 MCInstBuilder(X86::MOV64rr).addReg(X86::R10).addReg(X86::RAX)); in emitInstruction()
2635 case X86::SEH_PushReg: in emitInstruction()
2636 case X86::SEH_SaveReg: in emitInstruction()
2637 case X86::SEH_SaveXMM: in emitInstruction()
2638 case X86::SEH_StackAlloc: in emitInstruction()
2639 case X86::SEH_StackAlign: in emitInstruction()
2640 case X86::SEH_SetFrame: in emitInstruction()
2641 case X86::SEH_PushFrame: in emitInstruction()
2642 case X86::SEH_EndPrologue: in emitInstruction()
2646 case X86::SEH_Epilogue: { in emitInstruction()
2657 EmitAndCountInstruction(MCInstBuilder(X86::NOOP)); in emitInstruction()
2663 case X86::UBSAN_UD1: in emitInstruction()
2664 EmitAndCountInstruction(MCInstBuilder(X86::UD1Lm) in emitInstruction()
2665 .addReg(X86::EAX) in emitInstruction()
2666 .addReg(X86::EAX) in emitInstruction()
2668 .addReg(X86::NoRegister) in emitInstruction()
2670 .addReg(X86::NoRegister)); in emitInstruction()