70   void Lower(const MachineInstr *MI, MCInst &OutMI) const;
499 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {  in Lower()
500   OutMI.setOpcode(MI->getOpcode());  in Lower()
504       OutMI.addOperand(*MaybeMCOp);  in Lower()
507   switch (OutMI.getOpcode()) {  in Lower()
513     assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands &&  in Lower()
515     assert(OutMI.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 &&  in Lower()
525     switch (OutMI.getOpcode()) {  in Lower()
532     OutMI.setOpcode(NewOpc);  in Lower()
534     unsigned DestReg = OutMI.getOperand(0).getReg();  in Lower()
535     OutMI.insert(OutMI.begin(), MCOperand::createReg(DestReg));  in Lower()
554     if (!X86II::isX86_64ExtendedReg(OutMI.getOperand(0).getReg()) &&  in Lower()
555         X86II::isX86_64ExtendedReg(OutMI.getOperand(1).getReg())) {  in Lower()
557       switch (OutMI.getOpcode()) {  in Lower()
573       OutMI.setOpcode(NewOpc);  in Lower()
579     if (!X86II::isX86_64ExtendedReg(OutMI.getOperand(0).getReg()) &&  in Lower()
580         X86II::isX86_64ExtendedReg(OutMI.getOperand(2).getReg())) {  in Lower()
582       switch (OutMI.getOpcode()) {  in Lower()
587       OutMI.setOpcode(NewOpc);  in Lower()
623     if (OutMI.getOperand(OutMI.getNumOperands() - 1).getImm() == 0) {  in Lower()
625       switch (OutMI.getOpcode()) {  in Lower()
689       OutMI.setOpcode(NewOpc);  in Lower()
690       OutMI.erase(&OutMI.getOperand(OutMI.getNumOperands() - 1));  in Lower()
695     if (OutMI.getOperand(OutMI.getNumOperands() - 1).getImm() == 6) {  in Lower()
697       switch (OutMI.getOpcode()) {  in Lower()
761       OutMI.setOpcode(NewOpc);  in Lower()
762       OutMI.erase(&OutMI.getOperand(OutMI.getNumOperands() - 1));  in Lower()
775     assert(OutMI.getNumOperands() == 1 && "Unexpected number of operands!");  in Lower()
780     OutMI = MCInst();  in Lower()
781     OutMI.setOpcode(getRetOpcode(AsmPrinter.getSubtarget()));  in Lower()
787     OutMI = MCInst();  in Lower()
788     OutMI.setOpcode(getRetOpcode(AsmPrinter.getSubtarget()));  in Lower()
796     OutMI = MCInst();  in Lower()
797     OutMI.setOpcode(getRetOpcode(Subtarget));  in Lower()
798     OutMI.addOperand(MCOperand::createReg(ReturnReg));  in Lower()
809     assert(OutMI.getNumOperands() == 1 && "Unexpected number of operands!");  in Lower()
810     OutMI.setOpcode(convertTailJumpOpcode(OutMI.getOpcode()));  in Lower()
815     assert(OutMI.getNumOperands() == 2 && "Unexpected number of operands!");  in Lower()
816     OutMI.setOpcode(convertTailJumpOpcode(OutMI.getOpcode()));  in Lower()
822     assert(OutMI.getNumOperands() == X86::AddrNumOperands &&  in Lower()
824     OutMI.setOpcode(convertTailJumpOpcode(OutMI.getOpcode()));  in Lower()
834       switch (OutMI.getOpcode()) {  in Lower()
841       OutMI.setOpcode(Opcode);  in Lower()
861     switch (OutMI.getOpcode()) {  in Lower()
872     SimplifyShortMoveForm(AsmPrinter, OutMI, NewOpc);  in Lower()
886     switch (OutMI.getOpcode()) {  in Lower()
925     SimplifyShortImmForm(OutMI, NewOpc);  in Lower()
933     SimplifyMOVSX(OutMI);  in Lower()
944     if (!X86II::isX86_64ExtendedReg(OutMI.getOperand(1).getReg()) &&  in Lower()
945         X86II::isX86_64ExtendedReg(OutMI.getOperand(2).getReg())) {  in Lower()
953         std::swap(OutMI.getOperand(1), OutMI.getOperand(2));  in Lower()
968       OutMI.setFlags(X86::IP_HAS_AD_SIZE);  in Lower()
980         OutMI.getNumOperands() == 3) {  in Lower()
981       if (!X86II::isX86_64ExtendedReg(OutMI.getOperand(1).getReg()) &&  in Lower()
982           X86II::isX86_64ExtendedReg(OutMI.getOperand(2).getReg()))  in Lower()
983         std::swap(OutMI.getOperand(1), OutMI.getOperand(2));  in Lower()