258                 TII.get(TargetOpcode::SUBREG_TO_REG))  in selectCopy()
323     if (Opcode == TargetOpcode::LOAD_STACK_GUARD)  in select()
344   case TargetOpcode::G_STORE:  in select()
345   case TargetOpcode::G_LOAD:  in select()
347   case TargetOpcode::G_PTR_ADD:  in select()
348   case TargetOpcode::G_FRAME_INDEX:  in select()
350   case TargetOpcode::G_GLOBAL_VALUE:  in select()
352   case TargetOpcode::G_CONSTANT:  in select()
354   case TargetOpcode::G_FCONSTANT:  in select()
356   case TargetOpcode::G_PTRTOINT:  in select()
357   case TargetOpcode::G_TRUNC:  in select()
359   case TargetOpcode::G_INTTOPTR:  in select()
361   case TargetOpcode::G_ZEXT:  in select()
363   case TargetOpcode::G_ANYEXT:  in select()
365   case TargetOpcode::G_ICMP:  in select()
367   case TargetOpcode::G_FCMP:  in select()
369   case TargetOpcode::G_UADDE:  in select()
371   case TargetOpcode::G_UNMERGE_VALUES:  in select()
373   case TargetOpcode::G_MERGE_VALUES:  in select()
374   case TargetOpcode::G_CONCAT_VECTORS:  in select()
376   case TargetOpcode::G_EXTRACT:  in select()
378   case TargetOpcode::G_INSERT:  in select()
380   case TargetOpcode::G_BRCOND:  in select()
382   case TargetOpcode::G_IMPLICIT_DEF:  in select()
383   case TargetOpcode::G_PHI:  in select()
385   case TargetOpcode::G_SDIV:  in select()
386   case TargetOpcode::G_UDIV:  in select()
387   case TargetOpcode::G_SREM:  in select()
388   case TargetOpcode::G_UREM:  in select()
390   case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:  in select()
401   bool Isload = (Opc == TargetOpcode::G_LOAD);  in getLoadStoreOp()
483   if (I.getOpcode() == TargetOpcode::G_PTR_ADD) {  in X86SelectAddress()
492   } else if (I.getOpcode() == TargetOpcode::G_FRAME_INDEX) {  in X86SelectAddress()
507   assert((Opc == TargetOpcode::G_STORE || Opc == TargetOpcode::G_LOAD) &&  in selectLoadStoreOp()
541   if (Opc == TargetOpcode::G_LOAD) {  in selectLoadStoreOp()
567   assert((Opc == TargetOpcode::G_FRAME_INDEX || Opc == TargetOpcode::G_PTR_ADD) &&  in selectFrameIndexOrGep()
578   if (Opc == TargetOpcode::G_FRAME_INDEX) {  in selectFrameIndexOrGep()
593   assert((I.getOpcode() == TargetOpcode::G_GLOBAL_VALUE) &&  in selectGlobalValue()
639   assert((I.getOpcode() == TargetOpcode::G_CONSTANT) &&  in selectConstant()
711   assert((I.getOpcode() == TargetOpcode::G_TRUNC ||  in selectTruncOrPtrToInt()
712           I.getOpcode() == TargetOpcode::G_PTRTOINT) &&  in selectTruncOrPtrToInt()
777   assert((I.getOpcode() == TargetOpcode::G_ZEXT) && "unexpected instruction");  in selectZext()
818             TII.get(TargetOpcode::IMPLICIT_DEF), ImpDefReg);  in selectZext()
822             TII.get(TargetOpcode::INSERT_SUBREG), DefReg)  in selectZext()
842   assert((I.getOpcode() == TargetOpcode::G_ANYEXT) && "unexpected instruction");  in selectAnyext()
884           TII.get(TargetOpcode::SUBREG_TO_REG))  in selectAnyext()
897   assert((I.getOpcode() == TargetOpcode::G_ICMP) && "unexpected instruction");  in selectCmp()
948   assert((I.getOpcode() == TargetOpcode::G_FCMP) && "unexpected instruction");  in selectFCmp()
1039   assert((I.getOpcode() == TargetOpcode::G_UADDE) && "unexpected instruction");  in selectUadde()
1054   while (Def->getOpcode() == TargetOpcode::G_TRUNC) {  in selectUadde()
1060   if (Def->getOpcode() == TargetOpcode::G_UADDE) {  in selectUadde()
1098   assert((I.getOpcode() == TargetOpcode::G_EXTRACT) &&  in selectExtract()
1231   assert((I.getOpcode() == TargetOpcode::G_INSERT) && "unexpected instruction");  in selectInsert()
1288   assert((I.getOpcode() == TargetOpcode::G_UNMERGE_VALUES) &&  in selectUnmergeValues()
1299                  TII.get(TargetOpcode::G_EXTRACT), I.getOperand(Idx).getReg())  in selectUnmergeValues()
1313   assert((I.getOpcode() == TargetOpcode::G_MERGE_VALUES ||  in selectMergeValues()
1314           I.getOpcode() == TargetOpcode::G_CONCAT_VECTORS) &&  in selectMergeValues()
1338                                         TII.get(TargetOpcode::G_INSERT), Tmp)  in selectMergeValues()
1350                                     TII.get(TargetOpcode::COPY), DstReg)  in selectMergeValues()
1363   assert((I.getOpcode() == TargetOpcode::G_BRCOND) && "unexpected instruction");  in selectCondBranch()
1384   assert((I.getOpcode() == TargetOpcode::G_FCONSTANT) &&  in materializeFP()
1399       getLoadStoreOp(DstTy, RegBank, TargetOpcode::G_LOAD, Alignment);  in materializeFP()
1450   assert((I.getOpcode() == TargetOpcode::G_IMPLICIT_DEF ||  in selectImplicitDefOrPHI()
1451           I.getOpcode() == TargetOpcode::G_PHI) &&  in selectImplicitDefOrPHI()
1467   if (I.getOpcode() == TargetOpcode::G_IMPLICIT_DEF)  in selectImplicitDefOrPHI()
1479   assert((I.getOpcode() == TargetOpcode::G_SDIV ||  in selectDivRem()
1480           I.getOpcode() == TargetOpcode::G_SREM ||  in selectDivRem()
1481           I.getOpcode() == TargetOpcode::G_UDIV ||  in selectDivRem()
1482           I.getOpcode() == TargetOpcode::G_UREM) &&  in selectDivRem()
1501   const static unsigned Copy = TargetOpcode::COPY;  in selectDivRem()
1574   case TargetOpcode::G_SDIV:  in selectDivRem()
1577   case TargetOpcode::G_SREM:  in selectDivRem()
1580   case TargetOpcode::G_UDIV:  in selectDivRem()
1583   case TargetOpcode::G_UREM:  in selectDivRem()
1627                 TII.get(TargetOpcode::SUBREG_TO_REG), TypeEntry.HighInReg)  in selectDivRem()
1661             TII.get(TargetOpcode::SUBREG_TO_REG))  in selectDivRem()
1667     BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(TargetOpcode::COPY),  in selectDivRem()
1678   assert(I.getOpcode() == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS &&  in selectIntrinsicWSideEffects()