111                           const unsigned SrcReg,
122   bool emitInsertSubreg(unsigned DstReg, unsigned SrcReg, MachineInstr &I,
125   bool emitExtractSubreg(unsigned DstReg, unsigned SrcReg, MachineInstr &I,
240   Register SrcReg = I.getOperand(1).getReg();  in selectCopy()  local
241   const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI);  in selectCopy()
242   const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI);  in selectCopy()
251           getRegClass(MRI.getType(SrcReg), SrcRegBank);  in selectCopy()
261             .addReg(SrcReg)  in selectCopy()
271   assert((!SrcReg.isPhysical() || I.isCopy()) &&  in selectCopy()
276           (SrcReg.isPhysical() &&  in selectCopy()
277            DstSize <= RBI.getSizeInBits(SrcReg, MRI, TRI))) &&  in selectCopy()
285       SrcReg.isPhysical()) {  in selectCopy()
288     const TargetRegisterClass *SrcRC = getRegClassFromGRPhysReg(SrcReg);  in selectCopy()
292       I.getOperand(1).substPhysReg(SrcReg, TRI);  in selectCopy()
695     const TargetRegisterClass *DstRC, const unsigned SrcReg,  in selectTurnIntoCOPY()  argument
698   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||  in selectTurnIntoCOPY()
716   const Register SrcReg = I.getOperand(1).getReg();  in selectTruncOrPtrToInt()  local
719   const LLT SrcTy = MRI.getType(SrcReg);  in selectTruncOrPtrToInt()
722   const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI);  in selectTruncOrPtrToInt()
740     return selectTurnIntoCOPY(I, MRI, DstReg, DstRC, SrcReg, SrcRC);  in selectTruncOrPtrToInt()
761   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||  in selectTruncOrPtrToInt()
780   const Register SrcReg = I.getOperand(1).getReg();  in selectZext()  local
783   const LLT SrcTy = MRI.getType(SrcReg);  in selectZext()
813   Register DefReg = SrcReg;  in selectZext()
824         .addReg(SrcReg)  in selectZext()
845   const Register SrcReg = I.getOperand(1).getReg();  in selectAnyext()  local
848   const LLT SrcTy = MRI.getType(SrcReg);  in selectAnyext()
851   const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI);  in selectAnyext()
866     return selectTurnIntoCOPY(I, MRI, SrcReg, SrcRC, DstReg, DstRC);  in selectAnyext()
871   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||  in selectAnyext()
887       .addReg(SrcReg)  in selectAnyext()
1102   const Register SrcReg = I.getOperand(1).getReg();  in selectExtract()  local
1106   const LLT SrcTy = MRI.getType(SrcReg);  in selectExtract()
1117     if (!emitExtractSubreg(DstReg, SrcReg, I, MRI, MF))  in selectExtract()
1152 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg,  in emitExtractSubreg()  argument
1157   const LLT SrcTy = MRI.getType(SrcReg);  in emitExtractSubreg()
1174   const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI);  in emitExtractSubreg()
1178   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||  in emitExtractSubreg()
1185       .addReg(SrcReg, 0, SubIdx);  in emitExtractSubreg()
1190 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg,  in emitInsertSubreg()  argument
1195   const LLT SrcTy = MRI.getType(SrcReg);  in emitInsertSubreg()
1212   const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI);  in emitInsertSubreg()
1215   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||  in emitInsertSubreg()
1223       .addReg(SrcReg);  in emitInsertSubreg()
1234   const Register SrcReg = I.getOperand(1).getReg();  in selectInsert()  local
1248   if (Index == 0 && MRI.getVRegDef(SrcReg)->isImplicitDef()) {  in selectInsert()
1293   Register SrcReg = I.getOperand(NumDefs).getReg();  in selectUnmergeValues()  local
1300              .addReg(SrcReg)  in selectUnmergeValues()