109                           const unsigned DstReg,
122   bool emitInsertSubreg(unsigned DstReg, unsigned SrcReg, MachineInstr &I,
125   bool emitExtractSubreg(unsigned DstReg, unsigned SrcReg, MachineInstr &I,
236   Register DstReg = I.getOperand(0).getReg();  in selectCopy()  local
237   const unsigned DstSize = RBI.getSizeInBits(DstReg, MRI, TRI);  in selectCopy()
238   const RegisterBank &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI);  in selectCopy()
244   if (DstReg.isPhysical()) {  in selectCopy()
252       const TargetRegisterClass *DstRC = getRegClassFromGRPhysReg(DstReg);  in selectCopy()
281       getRegClass(MRI.getType(DstReg), DstRegBank);  in selectCopy()
299   const TargetRegisterClass *OldRC = MRI.getRegClassOrNull(DstReg);  in selectCopy()
301     if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {  in selectCopy()
694     MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg,  in selectTurnIntoCOPY()  argument
699       !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {  in selectTurnIntoCOPY()
715   const Register DstReg = I.getOperand(0).getReg();  in selectTruncOrPtrToInt()  local
718   const LLT DstTy = MRI.getType(DstReg);  in selectTruncOrPtrToInt()
721   const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);  in selectTruncOrPtrToInt()
740     return selectTurnIntoCOPY(I, MRI, DstReg, DstRC, SrcReg, SrcRC);  in selectTruncOrPtrToInt()
762       !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {  in selectTruncOrPtrToInt()
779   const Register DstReg = I.getOperand(0).getReg();  in selectZext()  local
782   const LLT DstTy = MRI.getType(DstReg);  in selectZext()
816         MRI.createVirtualRegister(getRegClass(DstTy, DstReg, MRI));  in selectZext()
820     DefReg = MRI.createVirtualRegister(getRegClass(DstTy, DstReg, MRI));  in selectZext()
829       *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AndOpc), DstReg)  in selectZext()
844   const Register DstReg = I.getOperand(0).getReg();  in selectAnyext()  local
847   const LLT DstTy = MRI.getType(DstReg);  in selectAnyext()
850   const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);  in selectAnyext()
866     return selectTurnIntoCOPY(I, MRI, SrcReg, SrcRC, DstReg, DstRC);  in selectAnyext()
872       !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {  in selectAnyext()
885       .addDef(DstReg)  in selectAnyext()
1041   const Register DstReg = I.getOperand(0).getReg();  in selectUadde()  local
1047   const LLT DstTy = MRI.getType(DstReg);  in selectUadde()
1080       *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcode), DstReg)  in selectUadde()
1101   const Register DstReg = I.getOperand(0).getReg();  in selectExtract()  local
1105   const LLT DstTy = MRI.getType(DstReg);  in selectExtract()
1117     if (!emitExtractSubreg(DstReg, SrcReg, I, MRI, MF))  in selectExtract()
1152 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg,  in emitExtractSubreg()  argument
1156   const LLT DstTy = MRI.getType(DstReg);  in emitExtractSubreg()
1173   const TargetRegisterClass *DstRC = getRegClass(DstTy, DstReg, MRI);  in emitExtractSubreg()
1179       !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {  in emitExtractSubreg()
1184   BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::COPY), DstReg)  in emitExtractSubreg()
1190 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg,  in emitInsertSubreg()  argument
1194   const LLT DstTy = MRI.getType(DstReg);  in emitInsertSubreg()
1213   const TargetRegisterClass *DstRC = getRegClass(DstTy, DstReg, MRI);  in emitInsertSubreg()
1216       !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {  in emitInsertSubreg()
1222       .addReg(DstReg, RegState::DefineNoRead, SubIdx)  in emitInsertSubreg()
1233   const Register DstReg = I.getOperand(0).getReg();  in selectInsert()  local
1238   const LLT DstTy = MRI.getType(DstReg);  in selectInsert()
1250     if (!emitInsertSubreg(DstReg, InsertReg, I, MRI, MF))  in selectInsert()
1318   Register DstReg = I.getOperand(0).getReg();  in selectMergeValues()  local
1321   const LLT DstTy = MRI.getType(DstReg);  in selectMergeValues()
1325   const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI);  in selectMergeValues()
1350                                     TII.get(TargetOpcode::COPY), DstReg)  in selectMergeValues()
1392   const Register DstReg = I.getOperand(0).getReg();  in materializeFP()  local
1393   const LLT DstTy = MRI.getType(DstReg);  in materializeFP()
1394   const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI);  in materializeFP()
1420         addDirectMem(BuildMI(*I.getParent(), I, DbgLoc, TII.get(Opc), DstReg),  in materializeFP()
1438         BuildMI(*I.getParent(), I, DbgLoc, TII.get(Opc), DstReg), CPI, PICBase,  in materializeFP()
1454   Register DstReg = I.getOperand(0).getReg();  in selectImplicitDefOrPHI()  local
1456   if (!MRI.getRegClassOrNull(DstReg)) {  in selectImplicitDefOrPHI()
1457     const LLT DstTy = MRI.getType(DstReg);  in selectImplicitDefOrPHI()
1458     const TargetRegisterClass *RC = getRegClass(DstTy, DstReg, MRI);  in selectImplicitDefOrPHI()
1460     if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) {  in selectImplicitDefOrPHI()
1485   const Register DstReg = I.getOperand(0).getReg();  in selectDivRem()  local
1489   const LLT RegTy = MRI.getType(DstReg);  in selectDivRem()
1493   const RegisterBank *RegRB = RBI.getRegBank(DstReg, MRI, TRI);  in selectDivRem()
1594       !RBI.constrainGenericRegister(DstReg, *RegRC, MRI)) {  in selectDivRem()
1662         .addDef(DstReg)  in selectDivRem()
1668             DstReg)  in selectDivRem()