Lines Matching refs:EFLAGS
59 let Defs = [AL,EFLAGS,AX], Uses = [AL] in
65 (implicit EFLAGS)]>, Sched<[WriteIMul8]>;
67 let Defs = [AX,DX,EFLAGS], Uses = [AX], hasSideEffects = 0 in
72 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX], hasSideEffects = 0 in
75 [/*(set EAX, EDX, EFLAGS, (X86umul_flag EAX, GR32:$src))*/]>,
78 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], hasSideEffects = 0 in
81 [/*(set RAX, RDX, EFLAGS, (X86umul_flag RAX, GR64:$src))*/]>,
84 let Defs = [AL,EFLAGS,AX], Uses = [AL] in
91 (implicit EFLAGS)]>, SchedLoadReg<WriteIMul8>;
94 let Defs = [AX,DX,EFLAGS], Uses = [AX] in
98 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
102 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
110 let Defs = [AL,EFLAGS,AX], Uses = [AL] in
114 let Defs = [AX,DX,EFLAGS], Uses = [AX] in
118 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
122 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
128 let Defs = [AL,EFLAGS,AX], Uses = [AL] in
132 let Defs = [AX,DX,EFLAGS], Uses = [AX] in
136 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
140 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
148 let Defs = [EFLAGS] in {
156 [(set GR16:$dst, EFLAGS,
161 [(set GR32:$dst, EFLAGS,
167 [(set GR64:$dst, EFLAGS,
176 [(set GR16:$dst, EFLAGS,
182 [(set GR32:$dst, EFLAGS,
188 [(set GR64:$dst, EFLAGS,
193 } // Defs = [EFLAGS]
196 let Defs = [EFLAGS] in {
204 [(set GR16:$dst, EFLAGS,
210 [(set GR16:$dst, EFLAGS,
216 [(set GR32:$dst, EFLAGS,
222 [(set GR32:$dst, EFLAGS,
228 [(set GR64:$dst, EFLAGS,
234 [(set GR64:$dst, EFLAGS,
242 [(set GR16:$dst, EFLAGS,
249 [(set GR16:$dst, EFLAGS,
255 [(set GR32:$dst, EFLAGS,
262 [(set GR32:$dst, EFLAGS,
268 [(set GR64:$dst, EFLAGS,
275 [(set GR64:$dst, EFLAGS,
279 } // Defs = [EFLAGS]
283 let Defs = [AL,AH,EFLAGS], Uses = [AX] in
286 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
289 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in
293 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in
298 let Defs = [AL,AH,EFLAGS], Uses = [AX] in
301 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
304 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in // EDX:EAX/[mem32] = EAX,EDX
308 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in
315 let Defs = [AL,AH,EFLAGS], Uses = [AX] in
318 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
321 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in
325 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in
330 let Defs = [AL,AH,EFLAGS], Uses = [AX] in
333 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
336 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in // EDX:EAX/[mem32] = EAX,EDX
339 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in // RDX:RAX/[mem64] = RAX,RDX
352 let Defs = [EFLAGS] in {
357 (implicit EFLAGS)]>;
361 (implicit EFLAGS)]>, OpSize16;
365 (implicit EFLAGS)]>, OpSize32;
368 (implicit EFLAGS)]>;
376 (implicit EFLAGS)]>;
380 (implicit EFLAGS)]>, OpSize16;
384 (implicit EFLAGS)]>, OpSize32;
387 (implicit EFLAGS)]>,
390 } // Defs = [EFLAGS]
393 // Note: NOT does not set EFLAGS!
439 let Defs = [EFLAGS] in {
444 [(set GR8:$dst, EFLAGS, (X86add_flag_nocf GR8:$src1, 1))]>;
447 [(set GR16:$dst, EFLAGS, (X86add_flag_nocf GR16:$src1, 1))]>,
451 [(set GR32:$dst, EFLAGS, (X86add_flag_nocf GR32:$src1, 1))]>,
454 [(set GR64:$dst, EFLAGS, (X86add_flag_nocf GR64:$src1, 1))]>;
472 (implicit EFLAGS)]>;
475 (implicit EFLAGS)]>, OpSize16;
478 (implicit EFLAGS)]>, OpSize32;
483 (implicit EFLAGS)]>;
491 [(set GR8:$dst, EFLAGS, (X86sub_flag_nocf GR8:$src1, 1))]>;
494 [(set GR16:$dst, EFLAGS, (X86sub_flag_nocf GR16:$src1, 1))]>,
498 [(set GR32:$dst, EFLAGS, (X86sub_flag_nocf GR32:$src1, 1))]>,
501 [(set GR64:$dst, EFLAGS, (X86sub_flag_nocf GR64:$src1, 1))]>;
520 (implicit EFLAGS)]>;
523 (implicit EFLAGS)]>, OpSize16;
526 (implicit EFLAGS)]>, OpSize32;
531 (implicit EFLAGS)]>;
534 } // Defs = [EFLAGS]
649 // just a EFLAGS as a result.
653 [(set EFLAGS,
657 // both a regclass and EFLAGS as a result.
661 [(set typeinfo.RegClass:$dst, EFLAGS,
665 // both a regclass and EFLAGS as a result, and has EFLAGS as input.
669 [(set typeinfo.RegClass:$dst, EFLAGS,
671 EFLAGS))]>;
728 [(set EFLAGS,
735 [(set typeinfo.RegClass:$dst, EFLAGS,
742 [(set typeinfo.RegClass:$dst, EFLAGS,
744 EFLAGS))]>;
760 [(set EFLAGS,
767 [(set typeinfo.RegClass:$dst, EFLAGS,
773 [(set typeinfo.RegClass:$dst, EFLAGS,
775 EFLAGS))]>;
791 [(set EFLAGS,
798 [(set typeinfo.RegClass:$dst, EFLAGS,
805 [(set typeinfo.RegClass:$dst, EFLAGS,
807 EFLAGS))]>;
821 (implicit EFLAGS)]>, Sched<[WriteALURMW,
831 [(store (opnode (load addr:$dst), typeinfo.RegClass:$src, EFLAGS),
833 (implicit EFLAGS)]>, Sched<[WriteADCRMW,
838 WriteALU.ReadAfterFold]>; // EFLAGS
844 [(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
864 (implicit EFLAGS)]>, Sched<[WriteALURMW]>;
870 typeinfo.ImmOperator:$src, EFLAGS), addr:$dst),
871 (implicit EFLAGS)]>, Sched<[WriteADCRMW]>;
877 [(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
896 (implicit EFLAGS)]>, Sched<[WriteALURMW]>;
903 typeinfo.Imm8Operator:$src, EFLAGS), addr:$dst),
904 (implicit EFLAGS)]>, Sched<[WriteADCRMW]>;
910 [(set EFLAGS, (opnode (typeinfo.LoadNode addr:$dst),
914 // BinOpAI - Instructions like "add %eax, %eax, imm", that imp-def EFLAGS.
922 let Defs = [areg, EFLAGS];
927 // and use EFLAGS.
931 let Uses = [areg, EFLAGS];
934 // BinOpAI_F - Instructions like "cmp %eax, %eax, imm", that imp-def EFLAGS.
938 let Defs = [EFLAGS];
942 /// defined with "(set GPR:$dst, EFLAGS, (...".
951 let Defs = [EFLAGS] in {
1016 } // Defs = [EFLAGS]
1029 /// defined with "(set GPR:$dst, EFLAGS, (node LHS, RHS, EFLAGS))" like ADC and
1038 let Uses = [EFLAGS], Defs = [EFLAGS] in {
1101 } // Uses = [EFLAGS], Defs = [EFLAGS]
1114 /// defined with "(set EFLAGS, (...". It would be really nice to find a way
1121 let Defs = [EFLAGS] in {
1181 } // Defs = [EFLAGS]
1210 Defs = [EFLAGS], isCommutable = 1 in
1228 def : Pat<(X86adc_flag (loadi8 addr:$src2), GR8:$src1, EFLAGS),
1230 def : Pat<(X86adc_flag (loadi16 addr:$src2), GR16:$src1, EFLAGS),
1232 def : Pat<(X86adc_flag (loadi32 addr:$src2), GR32:$src1, EFLAGS),
1234 def : Pat<(X86adc_flag (loadi64 addr:$src2), GR64:$src1, EFLAGS),
1238 def : Pat<(store (X86adc_flag GR8:$src, (loadi8 addr:$dst), EFLAGS),
1241 def : Pat<(store (X86adc_flag GR16:$src, (loadi16 addr:$dst), EFLAGS),
1244 def : Pat<(store (X86adc_flag GR32:$src, (loadi32 addr:$dst), EFLAGS),
1247 def : Pat<(store (X86adc_flag GR64:$src, (loadi64 addr:$dst), EFLAGS),
1285 def : Pat<(OpNodeFlag GR8:$src1, relocImm8_su:$src2, EFLAGS),
1287 def : Pat<(OpNodeFlag GR16:$src1, i16relocImmSExt8_su:$src2, EFLAGS),
1289 def : Pat<(OpNodeFlag GR16:$src1, relocImm16_su:$src2, EFLAGS),
1291 def : Pat<(OpNodeFlag GR32:$src1, i32relocImmSExt8_su:$src2, EFLAGS),
1293 def : Pat<(OpNodeFlag GR32:$src1, relocImm32_su:$src2, EFLAGS),
1295 def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt8_su:$src2, EFLAGS),
1297 def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt32_su:$src2, EFLAGS),
1300 def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm8_su:$src, EFLAGS), addr:$dst),
1302 def : Pat<(store (OpNodeFlag (load addr:$dst), i16relocImmSExt8_su:$src, EFLAGS), addr:$dst),
1304 def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm16_su:$src, EFLAGS), addr:$dst),
1306 def : Pat<(store (OpNodeFlag (load addr:$dst), i32relocImmSExt8_su:$src, EFLAGS), addr:$dst),
1308 def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm32_su:$src, EFLAGS), addr:$dst),
1310 def : Pat<(store (OpNodeFlag (load addr:$dst), i64relocImmSExt8_su:$src, EFLAGS), addr:$dst),
1312 def : Pat<(store (OpNodeFlag (load addr:$dst), i64relocImmSExt32_su:$src, EFLAGS), addr:$dst),
1361 def : Pat<(X86adc_flag GR8:$src1, relocImm8_su:$src2, EFLAGS),
1363 def : Pat<(X86adc_flag i16relocImmSExt8_su:$src2, GR16:$src1, EFLAGS),
1365 def : Pat<(X86adc_flag relocImm16_su:$src2, GR16:$src1, EFLAGS),
1367 def : Pat<(X86adc_flag i32relocImmSExt8_su:$src2, GR32:$src1, EFLAGS),
1369 def : Pat<(X86adc_flag relocImm32_su:$src2, GR32:$src1, EFLAGS),
1371 def : Pat<(X86adc_flag i64relocImmSExt8_su:$src2, GR64:$src1, EFLAGS),
1373 def : Pat<(X86adc_flag i64relocImmSExt32_su:$src2, GR64:$src1, EFLAGS),
1376 def : Pat<(store (X86adc_flag relocImm8_su:$src, (load addr:$dst), EFLAGS), addr:$dst),
1378 def : Pat<(store (X86adc_flag i16relocImmSExt8_su:$src, (load addr:$dst), EFLAGS), addr:$dst),
1380 def : Pat<(store (X86adc_flag relocImm16_su:$src, (load addr:$dst), EFLAGS), addr:$dst),
1382 def : Pat<(store (X86adc_flag i32relocImmSExt8_su:$src, (load addr:$dst), EFLAGS), addr:$dst),
1384 def : Pat<(store (X86adc_flag relocImm32_su:$src, (load addr:$dst), EFLAGS), addr:$dst),
1386 def : Pat<(store (X86adc_flag i64relocImmSExt8_su:$src, (load addr:$dst), EFLAGS), addr:$dst),
1388 def : Pat<(store (X86adc_flag i64relocImmSExt32_su:$src, (load addr:$dst), EFLAGS), addr:$dst),
1400 let Defs = [EFLAGS] in {
1428 } // Defs = [EFLAGS]
1466 [(set RC:$dst, EFLAGS, (X86and_flag (not RC:$src1), RC:$src2))]>,
1470 [(set RC:$dst, EFLAGS,
1476 let Predicates = [HasBMI], Defs = [EFLAGS], AddedComplexity = -6 in {
1535 let Predicates = [HasADX], Defs = [EFLAGS], Uses = [EFLAGS],
1558 // Implicit read of EFLAGS