440   Value *Arg1 = II.getArgOperand(1);  in simplifyX86pack()  local
444   if (isa<UndefValue>(Arg0) && isa<UndefValue>(Arg1))  in simplifyX86pack()
460   if (!isa<Constant>(Arg0) || !isa<Constant>(Arg1))  in simplifyX86pack()
485   Arg1 = Builder.CreateSelect(Builder.CreateICmpSLT(Arg1, MinC), MinC, Arg1);  in simplifyX86pack()
487   Arg1 = Builder.CreateSelect(Builder.CreateICmpSGT(Arg1, MaxC), MaxC, Arg1);  in simplifyX86pack()
497   auto *Shuffle = Builder.CreateShuffleVector(Arg0, Arg1, PackMask);  in simplifyX86pack()
1155     Value *Arg1 = II.getArgOperand(1);  in instCombineIntrinsic()  local
1161     if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, 1)) {  in instCombineIntrinsic()
1184         Value *Arg1 = II.getArgOperand(1);  in instCombineIntrinsic()  local
1192           V = IC.Builder.CreateFAdd(Arg0, Arg1);  in instCombineIntrinsic()
1196           V = IC.Builder.CreateFSub(Arg0, Arg1);  in instCombineIntrinsic()
1200           V = IC.Builder.CreateFMul(Arg0, Arg1);  in instCombineIntrinsic()
1204           V = IC.Builder.CreateFDiv(Arg0, Arg1);  in instCombineIntrinsic()
1227         Value *Arg1 = II.getArgOperand(1);  in instCombineIntrinsic()  local
1229         Value *RHS = IC.Builder.CreateExtractElement(Arg1, (uint64_t)0);  in instCombineIntrinsic()
1346     Value *Arg1 = II.getArgOperand(1);  in instCombineIntrinsic()  local
1347     assert(Arg1->getType()->getPrimitiveSizeInBits() == 128 &&  in instCombineIntrinsic()
1349     unsigned VWidth = cast<FixedVectorType>(Arg1->getType())->getNumElements();  in instCombineIntrinsic()
1351     if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, VWidth / 2)) {  in instCombineIntrinsic()
1419       Value *Arg1 = II.getArgOperand(1);  in instCombineIntrinsic()  local
1436               IC.SimplifyDemandedVectorElts(Arg1, DemandedElts2, UndefElts2)) {  in instCombineIntrinsic()
1922       Value *Arg0 = II.getArgOperand(0), *Arg1 = II.getArgOperand(1);  in simplifyDemandedVectorEltsIntrinsic()  local
1924           IsSubOnly ? Instruction::FSub : Instruction::FAdd, Arg0, Arg1);  in simplifyDemandedVectorEltsIntrinsic()