439   Value *Arg0 = II.getArgOperand(0);  in simplifyX86pack()  local
444   if (isa<UndefValue>(Arg0) && isa<UndefValue>(Arg1))  in simplifyX86pack()
447   auto *ArgTy = cast<FixedVectorType>(Arg0->getType());  in simplifyX86pack()
460   if (!isa<Constant>(Arg0) || !isa<Constant>(Arg1))  in simplifyX86pack()
484   Arg0 = Builder.CreateSelect(Builder.CreateICmpSLT(Arg0, MinC), MinC, Arg0);  in simplifyX86pack()
486   Arg0 = Builder.CreateSelect(Builder.CreateICmpSGT(Arg0, MaxC), MaxC, Arg0);  in simplifyX86pack()
497   auto *Shuffle = Builder.CreateShuffleVector(Arg0, Arg1, PackMask);  in simplifyX86pack()
1154     Value *Arg0 = II.getArgOperand(0);  in instCombineIntrinsic()  local
1156     unsigned VWidth = cast<FixedVectorType>(Arg0->getType())->getNumElements();  in instCombineIntrinsic()
1157     if (Value *V = SimplifyDemandedVectorEltsLow(Arg0, VWidth, 1)) {  in instCombineIntrinsic()
1183         Value *Arg0 = II.getArgOperand(0);  in instCombineIntrinsic()  local
1192           V = IC.Builder.CreateFAdd(Arg0, Arg1);  in instCombineIntrinsic()
1196           V = IC.Builder.CreateFSub(Arg0, Arg1);  in instCombineIntrinsic()
1200           V = IC.Builder.CreateFMul(Arg0, Arg1);  in instCombineIntrinsic()
1204           V = IC.Builder.CreateFDiv(Arg0, Arg1);  in instCombineIntrinsic()
1226         Value *Arg0 = II.getArgOperand(0);  in instCombineIntrinsic()  local
1228         Value *LHS = IC.Builder.CreateExtractElement(Arg0, (uint64_t)0);  in instCombineIntrinsic()
1271         V = IC.Builder.CreateInsertElement(Arg0, V, (uint64_t)0);  in instCombineIntrinsic()
1418       Value *Arg0 = II.getArgOperand(0);  in instCombineIntrinsic()  local
1421           cast<FixedVectorType>(Arg0->getType())->getNumElements();  in instCombineIntrinsic()
1427               IC.SimplifyDemandedVectorElts(Arg0, DemandedElts1, UndefElts1)) {  in instCombineIntrinsic()
1922       Value *Arg0 = II.getArgOperand(0), *Arg1 = II.getArgOperand(1);  in simplifyDemandedVectorEltsIntrinsic()  local
1924           IsSubOnly ? Instruction::FSub : Instruction::FAdd, Arg0, Arg1);  in simplifyDemandedVectorEltsIntrinsic()