6753   if (IdxVal == 0 && ISD::isBuildVectorAllZeros(Vec.getNode())) {  in insert1BitVector()
6794   if (ISD::isBuildVectorAllZeros(Vec.getNode())) {  in insert1BitVector()
7950   bool V1IsZero = ISD::isBuildVectorAllZeros(V1.getNode());  in computeZeroableShuffleElements()
7951   bool V2IsZero = ISD::isBuildVectorAllZeros(V2.getNode());  in computeZeroableShuffleElements()
8337     if (ISD::isBuildVectorAllZeros(Src.getNode()))  in getFauxShuffleMask()
9224     if (X86::isZeroNode(Elt) || ISD::isBuildVectorAllZeros(Elt.getNode())) {  in EltsFromConsecutiveLoads()
9909   if (ISD::isBuildVectorAllZeros(Op.getNode()) ||  in LowerBUILD_VECTORvXi1()
10710   if (ISD::isBuildVectorAllZeros(Op.getNode()))  in materializeVectorConstant()
11453     if (ISD::isBuildVectorAllZeros(SubVec.getNode()))  in LowerAVXCONCAT_VECTORS()
11512     if (ISD::isBuildVectorAllZeros(SubVec.getNode()))  in LowerCONCAT_VECTORSvXi1()
12748       V1.isUndef() || ISD::isBuildVectorAllZeros(V1.getNode());  in matchShuffleAsBlend()
12750       V2.isUndef() || ISD::isBuildVectorAllZeros(V2.getNode());  in matchShuffleAsBlend()
14828   if (ISD::isBuildVectorAllZeros(V1.getNode()) ||  in lowerShuffleAsPermuteAndUnpack()
14829       ISD::isBuildVectorAllZeros(V2.getNode()))  in lowerShuffleAsPermuteAndUnpack()
16958   bool V2IsZero = !V2.isUndef() && ISD::isBuildVectorAllZeros(V2.getNode());  in lowerV2X128Shuffle()
19420   bool V2IsZero = !V2IsUndef && ISD::isBuildVectorAllZeros(V2.getNode());  in lowerVECTOR_SHUFFLE()
20025   if (IdxVal == 0 && ISD::isBuildVectorAllZeros(N0.getNode())) {  in LowerINSERT_VECTOR_ELT()
24470   if (Cond == ISD::SETNE && ISD::isBuildVectorAllZeros(Op1.getNode())) {  in LowerVSETCC()
24603       if (!FlipSigns && !Invert && ISD::isBuildVectorAllZeros(Op0.getNode())) {  in LowerVSETCC()
31907     if ((ISD::isBuildVectorAllZeros(N1.getNode()) && FillWithZeroes) ||  in ExtendToType()
32011     if (PassThru.isUndef() || ISD::isBuildVectorAllZeros(PassThru.getNode()))  in LowerMLOAD()
39672            ISD::isBuildVectorAllZeros(Op.getNode()) ||  in canonicalizeShuffleWithBinOps()
41939         ISD::isBuildVectorAllZeros(Op.getOperand(0).getNode()))  in SimplifyDemandedBitsForTargetNode()
42112         ISD::isBuildVectorAllZeros(Op.getOperand(0).getNode()))  in SimplifyMultipleUseDemandedBitsForTargetNode()
42222         ISD::isBuildVectorAllZeros(Src.getOperand(1).getNode()) &&  in adjustBitcastSrcVectorSSE1()
42300       ISD::isBuildVectorAllZeros(Src.getOperand(1).getNode())) {  in combineBitcastvxi1()
42663         if (ISD::isBuildVectorAllZeros(LastOp.getNode())) {  in combineBitcast()
44181   bool TValIsAllZeros = ISD::isBuildVectorAllZeros(LHS.getNode());  in combineVSelectWithAllOnesOrZeros()
44182   bool FValIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode());  in combineVSelectWithAllOnesOrZeros()
44496            ISD::isBuildVectorAllZeros(N->getOperand(0).getNode());  in combineLogicBlendIntoConditionalNegate()
44801     bool ZeroLHS = ISD::isBuildVectorAllZeros(LHS.getNode());  in combineSelect()
44802     bool ZeroRHS = ISD::isBuildVectorAllZeros(RHS.getNode());  in combineSelect()
44899       ISD::isBuildVectorAllZeros(LHS.getNode()) &&  in combineSelect()
44900       !ISD::isBuildVectorAllZeros(RHS.getNode())) {  in combineSelect()
47067   if (ISD::isBuildVectorAllZeros(N0.getNode()))  in combineVectorShiftVar()
47121   if (ISD::isBuildVectorAllZeros(N0.getNode()))  in combineVectorShiftImm()
49204   if (ISD::isBuildVectorAllZeros(ML->getPassThru().getNode()))  in combineMaskedLoadConstantMask()
50027           ((ISD::isBuildVectorAllZeros(Op0->getOperand(2).getNode()) &&  in combineFaddCFmul()
50988   return isNullFPConstant(V) || ISD::isBuildVectorAllZeros(V.getNode());  in isNullFPScalarOrVectorConst()
51263   if (ISD::isBuildVectorAllZeros(N0.getNode()))  in combineAndnp()
51267   if (ISD::isBuildVectorAllZeros(N1.getNode()))  in combineAndnp()
52168     bool IsVZero1 = ISD::isBuildVectorAllZeros(Op1.getNode());  in combineSetCC()
52273       ISD::isBuildVectorAllZeros(Src.getOperand(1).getNode())) {  in combineMOVMSK()
53822         return ISD::isBuildVectorAllZeros(Op.getNode());  in combineConcatVectorOps()
54204   if ((Vec.isUndef() || ISD::isBuildVectorAllZeros(Vec.getNode())) &&  in combineINSERT_SUBVECTOR()
54205       (SubVec.isUndef() || ISD::isBuildVectorAllZeros(SubVec.getNode())))  in combineINSERT_SUBVECTOR()
54208   if (ISD::isBuildVectorAllZeros(Vec.getNode())) {  in combineINSERT_SUBVECTOR()
54212         ISD::isBuildVectorAllZeros(SubVec.getOperand(0).getNode())) {  in combineINSERT_SUBVECTOR()
54229           ISD::isBuildVectorAllZeros(Ins.getOperand(0).getNode()) &&  in combineINSERT_SUBVECTOR()
54247        !(Vec.isUndef() || ISD::isBuildVectorAllZeros(Vec.getNode())))) {  in combineINSERT_SUBVECTOR()
54277         ISD::isBuildVectorAllZeros(SubVectorOps[1].getNode()))  in combineINSERT_SUBVECTOR()
54427   if (ISD::isBuildVectorAllZeros(InVec.getNode()))  in combineEXTRACT_SUBVECTOR()
54656   if (ISD::isBuildVectorAllZeros(RHS.getNode()))  in combinePMULDQ()
54704   if (ISD::isBuildVectorAllZeros(LHS.getNode()) ||  in combineVPMADD()
54705       ISD::isBuildVectorAllZeros(RHS.getNode()))  in combineVPMADD()
54790   if (ISD::isBuildVectorAllZeros(N->getOperand(0).getNode()))  in combineKSHIFT()