1314   if (!Subtarget.useSoftFloat() && Subtarget.hasAVX()) {  in X86TargetLowering()
2658       if (Op.size() >= 32 && Subtarget.hasAVX() &&  in getOptimalMemOpType()
3971   else if (Subtarget.hasAVX())  in forwardMustTailParameters()
5261   if (!Subtarget.hasAVX() && !Subtarget.hasSSEUnalignedMem() &&  in mayFoldLoad()
5274   assert(Subtarget.hasAVX() && "Expected AVX for broadcast from memory");  in mayFoldLoadIntoBroadcastFromMem()
5739   return !IsFPSetCC || !Subtarget.isTarget64BitLP64() || !Subtarget.hasAVX();  in reduceSelectOfFPConstantLoads()
9409   if (ZeroMask.isZero() && isPowerOf2_32(NumElems) && Subtarget.hasAVX() &&  in EltsFromConsecutiveLoads()
9557   if (!Subtarget.hasAVX())  in lowerBuildVectorAsBroadcast()
9632       if (Subtarget.hasAVX()) {  in lowerBuildVectorAsBroadcast()
10517       ((VT == MVT::v8f32 || VT == MVT::v4f64) && Subtarget.hasAVX()) ||  in LowerToHorizontalOp()
10526   if (!Subtarget.hasAVX() || !VT.is256BitVector())  in LowerToHorizontalOp()
10818     if (Subtarget.hasAVX()) {  in createVariablePermute()
10828     if (Subtarget.hasAVX()) {  in createVariablePermute()
10855     } else if (Subtarget.hasAVX()) {  in createVariablePermute()
10880     else if (Subtarget.hasAVX()) {  in createVariablePermute()
10893     else if (Subtarget.hasAVX()) {  in createVariablePermute()
10927     } else if (Subtarget.hasAVX()) {  in createVariablePermute()
11172     assert(Subtarget.hasAVX() && "Must have AVX with >16-byte vector");  in LowerBUILD_VECTOR()
12833     assert(Subtarget.hasAVX() && "256-bit float blends require AVX!");  in lowerShuffleAsBlend()
13201     if (!Subtarget.hasAVX2() && (!Subtarget.hasAVX() || EltSizeInBits < 32 ||  in lowerShuffleAsDecomposedShuffleMerge()
14454         (Subtarget.hasAVX() && VT.isFloatingPoint()) ||  in lowerShuffleAsBroadcast()
14607     if (Subtarget.hasAVX()) {  in lowerShuffleAsBroadcast()
14888     if (Subtarget.hasAVX()) {  in lowerV2F64Shuffle()
15169     if (Subtarget.hasAVX()) {  in lowerV4F32Shuffle()
19983       if ((Subtarget.hasAVX() && (EltVT == MVT::f64 || EltVT == MVT::f32)) ||  in LowerINSERT_VECTOR_ELT()
20000          (Subtarget.hasAVX() && (EltSizeInBits >= 32) &&  in LowerINSERT_VECTOR_ELT()
20754       return ToVT == MVT::v4f32 || (Subtarget.hasAVX() && ToVT == MVT::v4f64);  in useVectorCast()
20972   if (VT == MVT::v8i32 && Subtarget.hasAVX() && IsSigned)  in isLegalConversion()
21354   if (Subtarget.hasAVX() && VecIntVT == MVT::v4i32 &&  in lowerUINT_TO_FP_vXi32()
21934   assert(Subtarget.hasAVX() && "Expected AVX support");  in LowerZERO_EXTEND()
23492   unsigned TestSize = Subtarget.hasAVX() ? 256 : 128;  in LowerVectorAllZero()
23850       (VT == MVT::v8f32 && Subtarget.hasAVX()) ||  in getSqrtEstimate()
23900       (VT == MVT::v8f32 && Subtarget.hasAVX()) ||  in getRecipEstimate()
24238     if (Subtarget.hasAVX())  in LowerVSETCCWithSUBUS()
24316     if (!Subtarget.hasAVX()) {  in LowerVSETCC()
25068     if (SSECC < 8 || Subtarget.hasAVX()) {  in LowerSELECT()
25084       if (Subtarget.hasAVX() && !isNullFPConstant(Op1) &&  in LowerSELECT()
25410   assert(Subtarget.hasAVX() && "Expected AVX support");  in LowerANY_EXTEND()
25434       !(VT.is256BitVector() && Subtarget.hasAVX()) &&  in LowerEXTEND_VECTOR_INREG()
25470   if (Subtarget.hasAVX()) {  in LowerEXTEND_VECTOR_INREG()
30081       if (Subtarget.hasAVX()) {  in LowerShift()
37345     assert(Subtarget.hasAVX() && "AVX required for 256-bit vector shuffles");  in matchUnaryShuffle()
37429     } else if (AllowFloatDomain && Subtarget.hasAVX()) {  in matchUnaryPermuteShuffle()
37449       !ContainsZeros && (AllowIntDomain || Subtarget.hasAVX())) {  in matchUnaryPermuteShuffle()
37595       (MaskVT.is256BitVector() && 32 <= EltSizeInBits && Subtarget.hasAVX()) ||  in matchBinaryShuffle()
37741                             (Subtarget.hasAVX() && MaskVT.is256BitVector()))) ||  in matchBinaryPermuteShuffle()
37789        (MaskVT.is256BitVector() && Subtarget.hasAVX()) ||  in matchBinaryPermuteShuffle()
37805        (MaskVT.is256BitVector() && Subtarget.hasAVX()) ||  in matchBinaryPermuteShuffle()
38161          (Subtarget.hasAVX() && 32 <= MaskEltSizeInBits)) &&  in combineX86ShuffleChain()
38471       ((MaskVT == MVT::v8f32 && Subtarget.hasAVX()) ||  in combineX86ShuffleChain()
42335     if (Subtarget.hasAVX() &&  in combineBitcastvxi1()
42348     if (Subtarget.hasAVX() && (checkBitcastSrcVectorSize(Src, 256, true) ||  in combineBitcastvxi1()
43182           (MatchSizeInBits == 256 && Subtarget.hasAVX())))  in combinePredicateReduction()
45005         TLI.isTypeLegal(VT) && ((Subtarget.hasAVX() && EltBitWidth == 32) ||  in combineSelect()
45511     if (CC == X86::COND_E && OpVT.is128BitVector() && Subtarget.hasAVX()) {  in combinePTESTCC()
47513   if (!Subtarget.hasAVX() &&  in convertIntLogicToFPLogic()
49024   if (Ext == ISD::NON_EXTLOAD && Subtarget.hasAVX() && Ld->isSimple() &&  in combineLoad()
49859         (Subtarget.hasAVX() && (VT == MVT::v8f32 || VT == MVT::v4f64))) {  in combineToHorizontalAddSub()
51969        (OpSize == 256 && Subtarget.hasAVX()) ||  in combineVectorSizedSetCCEquality()
53815   assert(Subtarget.hasAVX() && "AVX assumed for concat_vectors");  in combineConcatVectorOps()
54173   if (Subtarget.hasAVX() && TLI.isTypeLegal(VT) && TLI.isTypeLegal(SrcVT)) {  in combineCONCAT_VECTORS()
54402   if (Subtarget.hasAVX() && !Subtarget.hasAVX2() &&  in combineEXTRACT_SUBVECTOR()
55615             ((type->getPrimitiveSizeInBits() == 256) && Subtarget.hasAVX()) ||  in getSingleConstraintMatchWeight()
55644         ((type->getPrimitiveSizeInBits() == 256) && Subtarget.hasAVX()))  in getSingleConstraintMatchWeight()
56085         if (Subtarget.hasAVX())  in getRegForInlineAsmConstraint()
56154         if (Subtarget.hasAVX())  in getRegForInlineAsmConstraint()