Lines Matching refs:VecVT
3965 MVT VecVT = MVT::Other; in forwardMustTailParameters() local
3970 VecVT = MVT::v16f32; in forwardMustTailParameters()
3972 VecVT = MVT::v8f32; in forwardMustTailParameters()
3974 VecVT = MVT::v4f32; in forwardMustTailParameters()
3980 if (VecVT != MVT::Other) in forwardMustTailParameters()
3981 RegParmTypes.push_back(VecVT); in forwardMustTailParameters()
5806 EVT VecVT = VecOp.getValueType(); in shouldScalarizeBinop() local
5807 if (!isOperationLegalOrCustomOrPromote(Opc, VecVT)) in shouldScalarizeBinop()
5812 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop()
9389 MVT VecVT = MVT::getVectorVT(VecSVT, VT.getSizeInBits() / LoadSizeInBits); in EltsFromConsecutiveLoads() local
9393 VecVT = MVT::v4f32; in EltsFromConsecutiveLoads()
9394 if (TLI.isTypeLegal(VecVT)) { in EltsFromConsecutiveLoads()
9395 SDVTList Tys = DAG.getVTList(VecVT, MVT::Other); in EltsFromConsecutiveLoads()
9958 MVT VecVT = VT.getSizeInBits() >= 8 ? VT : MVT::v8i1; in LowerBUILD_VECTORvXi1() local
9959 Select = DAG.getBitcast(VecVT, Select); in LowerBUILD_VECTORvXi1()
9977 MVT VecVT = VT.getSizeInBits() >= 8 ? VT : MVT::v8i1; in LowerBUILD_VECTORvXi1() local
9978 DstVec = DAG.getBitcast(VecVT, Imm); in LowerBUILD_VECTORvXi1()
19677 MVT VecVT = Vec.getSimpleValueType(); in ExtractBitFromMaskVector() local
19682 assert((VecVT.getVectorNumElements() <= 16 || Subtarget.hasBWI()) && in ExtractBitFromMaskVector()
19688 unsigned NumElts = VecVT.getVectorNumElements(); in ExtractBitFromMaskVector()
19703 unsigned NumElems = VecVT.getVectorNumElements(); in ExtractBitFromMaskVector()
19704 MVT WideVecVT = VecVT; in ExtractBitFromMaskVector()
19725 MVT VecVT = Vec.getSimpleValueType(); in LowerEXTRACT_VECTOR_ELT() local
19729 if (VecVT.getVectorElementType() == MVT::i1) in LowerEXTRACT_VECTOR_ELT()
19770 if (VecVT.is256BitVector() || VecVT.is512BitVector()) { in LowerEXTRACT_VECTOR_ELT()
19773 MVT EltVT = VecVT.getVectorElementType(); in LowerEXTRACT_VECTOR_ELT()
19785 assert(VecVT.is128BitVector() && "Unexpected vector length"); in LowerEXTRACT_VECTOR_ELT()
19844 SmallVector<int, 8> Mask(VecVT.getVectorNumElements(), -1); in LowerEXTRACT_VECTOR_ELT()
19846 Vec = DAG.getVectorShuffle(VecVT, dl, Vec, DAG.getUNDEF(VecVT), Mask); in LowerEXTRACT_VECTOR_ELT()
19862 Vec = DAG.getVectorShuffle(VecVT, dl, Vec, DAG.getUNDEF(VecVT), Mask); in LowerEXTRACT_VECTOR_ELT()
19878 MVT VecVT = Vec.getSimpleValueType(); in InsertBitToMaskVector() local
19883 unsigned NumElts = VecVT.getVectorNumElements(); in InsertBitToMaskVector()
19889 return DAG.getNode(ISD::TRUNCATE, dl, VecVT, ExtOp); in InsertBitToMaskVector()
19894 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, VecVT, Vec, EltInVec, Idx); in InsertBitToMaskVector()
20158 MVT VecVT = Vec.getSimpleValueType(); in LowerEXTRACT_SUBVECTOR() local
20159 unsigned NumElems = VecVT.getVectorNumElements(); in LowerEXTRACT_SUBVECTOR()
20162 MVT WideVecVT = VecVT; in LowerEXTRACT_SUBVECTOR()
20690 MVT VecVT = MVT::getVectorVT(VT, NumElts); in LowerI64IntToFP_AVX512DQ() local
20695 SDValue CvtVec = DAG.getNode(Op.getOpcode(), dl, {VecVT, MVT::Other}, in LowerI64IntToFP_AVX512DQ()
20703 SDValue CvtVec = DAG.getNode(Op.getOpcode(), dl, VecVT, InVec); in LowerI64IntToFP_AVX512DQ()
20838 MVT VecVT = MVT::getVectorVT(VT, 128 / VTSize); in lowerFPToIntToFP() local
20856 SDValue VCastToFP = DAG.getNode(ToFPOpcode, DL, VecVT, VCastToInt); in lowerFPToIntToFP()
23127 EVT VecVT = X.getValueType(); in lowerAddSubToHorizontalOp() local
23128 unsigned BitWidth = VecVT.getSizeInBits(); in lowerAddSubToHorizontalOp()
23130 unsigned NumEltsPerLane = VecVT.getVectorNumElements() / NumLanes; in lowerAddSubToHorizontalOp()
23326 MVT VecVT = (OpVT == MVT::f32 ? MVT::v4f32 : MVT::v2f64); in LowerFGETSIGN() local
23327 SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, N0); in LowerFGETSIGN()
25088 MVT VecVT = VT == MVT::f32 ? MVT::v4f32 : MVT::v2f64; in LowerSELECT() local
25089 SDValue VOp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Op1); in LowerSELECT()
25090 SDValue VOp2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Op2); in LowerSELECT()
25091 SDValue VCmp = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Cmp); in LowerSELECT()
25096 SDValue VSel = DAG.getSelect(DL, VecVT, VCmp, VOp1, VOp2); in LowerSELECT()
31465 MVT VecVT = MVT::getVectorVT(VT, 128 / VT.getSizeInBits()); in LowerBITREVERSE_XOP() local
31466 SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, In); in LowerBITREVERSE_XOP()
31467 Res = DAG.getNode(ISD::BITREVERSE, DL, VecVT, Res); in LowerBITREVERSE_XOP()
32898 MVT VecVT = MVT::getVectorVT(MVT::i64, NumElts); in ReplaceNodeResults() local
32914 SDVTList Tys = DAG.getVTList(VecVT, MVT::Other); in ReplaceNodeResults()
32918 Res = DAG.getNode(Opc, SDLoc(N), VecVT, Res); in ReplaceNodeResults()
33408 MVT VecVT = MVT::getVectorVT(LdVT, 2); in ReplaceNodeResults() local
33409 Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, Res); in ReplaceNodeResults()
40119 MVT VecVT = MVT::getVectorVT(MVT::i32, VT.getVectorNumElements() * 2); in combineTargetShuffle() local
40120 SDValue SclVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Trunc); in combineTargetShuffle()
40121 SDValue Movl = DAG.getNode(X86ISD::VZEXT_MOVL, DL, VecVT, SclVec); in combineTargetShuffle()
41816 MVT VecVT = Vec.getSimpleValueType(); in SimplifyDemandedBitsForTargetNode() local
41817 unsigned NumVecElts = VecVT.getVectorNumElements(); in SimplifyDemandedBitsForTargetNode()
41821 unsigned VecBitWidth = VecVT.getScalarSizeInBits(); in SimplifyDemandedBitsForTargetNode()
41855 MVT VecVT = Vec.getSimpleValueType(); in SimplifyDemandedBitsForTargetNode() local
41857 if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements())) { in SimplifyDemandedBitsForTargetNode()
41875 KnownScl = KnownScl.trunc(VecVT.getScalarSizeInBits()); in SimplifyDemandedBitsForTargetNode()
42084 MVT VecVT = Vec.getSimpleValueType(); in SimplifyMultipleUseDemandedBitsForTargetNode() local
42085 if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements()) && in SimplifyMultipleUseDemandedBitsForTargetNode()
43491 auto GetLegalExtract = [&Subtarget, &DAG, &dl](SDValue Vec, EVT VecVT, in combineExtractWithShuffle()
43493 EVT VecSVT = VecVT.getScalarType(); in combineExtractWithShuffle()
43494 if ((VecVT.is256BitVector() || VecVT.is512BitVector()) && in combineExtractWithShuffle()
43501 VecVT = EVT::getVectorVT(*DAG.getContext(), VecSVT, NumEltsPerLane); in combineExtractWithShuffle()
43505 if ((VecVT == MVT::v4i32 || VecVT == MVT::v2i64) && in combineExtractWithShuffle()
43507 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VecVT.getScalarType(), in combineExtractWithShuffle()
43508 DAG.getBitcast(VecVT, Vec), in combineExtractWithShuffle()
43511 if ((VecVT == MVT::v8i16 && Subtarget.hasSSE2()) || in combineExtractWithShuffle()
43512 (VecVT == MVT::v16i8 && Subtarget.hasSSE41())) { in combineExtractWithShuffle()
43513 unsigned OpCode = (VecVT == MVT::v8i16 ? X86ISD::PEXTRW : X86ISD::PEXTRB); in combineExtractWithShuffle()
43514 return DAG.getNode(OpCode, dl, MVT::i32, DAG.getBitcast(VecVT, Vec), in combineExtractWithShuffle()
43600 EVT VecVT = Vec.getValueType(); in scalarizeExtEltFP() local
43604 if (!Vec.hasOneUse() || !isNullConstant(Index) || VecVT.getScalarType() != VT) in scalarizeExtEltFP()
43636 Vec.getOperand(0).getOperand(0).getValueType() == VecVT) { in scalarizeExtEltFP()
43713 EVT VecVT = Rdx.getValueType(); in combineArithReduction() local
43714 if (VecVT.getScalarType() != VT) in combineArithReduction()
43718 unsigned NumElts = VecVT.getVectorNumElements(); in combineArithReduction()
43719 unsigned EltSizeInBits = VecVT.getScalarSizeInBits(); in combineArithReduction()
43743 if (VecVT.getSizeInBits() >= 128) { in combineArithReduction()
43745 SDValue Lo = getUnpackl(DAG, DL, VecVT, Rdx, DAG.getUNDEF(VecVT)); in combineArithReduction()
43746 SDValue Hi = getUnpackh(DAG, DL, VecVT, Rdx, DAG.getUNDEF(VecVT)); in combineArithReduction()
43774 if (VecVT == MVT::v4i8 || VecVT == MVT::v8i8) { in combineArithReduction()
43783 if ((VecVT.getSizeInBits() % 128) != 0 || !isPowerOf2_32(NumElts)) in combineArithReduction()
43791 VecVT = Lo.getValueType(); in combineArithReduction()
43792 Rdx = DAG.getNode(ISD::ADD, DL, VecVT, Lo, Hi); in combineArithReduction()
43794 assert(VecVT == MVT::v16i8 && "v16i8 reduction expected"); in combineArithReduction()
43814 EVT ByteVT = VecVT.changeVectorElementType(MVT::i8); in combineArithReduction()
43833 VecVT = Lo.getValueType(); in combineArithReduction()
43834 Rdx = DAG.getNode(ISD::ADD, DL, VecVT, Lo, Hi); in combineArithReduction()
43843 VecVT = MVT::getVectorVT(VT.getSimpleVT(), 128 / VT.getSizeInBits()); in combineArithReduction()
43844 Rdx = DAG.getBitcast(VecVT, Rdx); in combineArithReduction()
43858 if (((VecVT == MVT::v16i16 || VecVT == MVT::v8i32) && Subtarget.hasSSSE3()) || in combineArithReduction()
43859 ((VecVT == MVT::v8f32 || VecVT == MVT::v4f64) && Subtarget.hasSSE3())) { in combineArithReduction()
43860 unsigned NumElts = VecVT.getVectorNumElements(); in combineArithReduction()
43864 VecVT = Rdx.getValueType(); in combineArithReduction()
43866 if (!((VecVT == MVT::v8i16 || VecVT == MVT::v4i32) && Subtarget.hasSSSE3()) && in combineArithReduction()
43867 !((VecVT == MVT::v4f32 || VecVT == MVT::v2f64) && Subtarget.hasSSE3())) in combineArithReduction()
43871 unsigned ReductionSteps = Log2_32(VecVT.getVectorNumElements()); in combineArithReduction()
43873 Rdx = DAG.getNode(HorizOpcode, DL, VecVT, Rdx, Rdx); in combineArithReduction()
45561 MVT VecVT = Vec.getSimpleValueType(); in combineSetCCMOVMSK() local
45562 assert((VecVT.is128BitVector() || VecVT.is256BitVector()) && in combineSetCCMOVMSK()
45564 unsigned NumElts = VecVT.getVectorNumElements(); in combineSetCCMOVMSK()
45565 unsigned NumEltBits = VecVT.getScalarSizeInBits(); in combineSetCCMOVMSK()
45607 if (VecVT.is256BitVector() && NumElts <= CmpBits && IsOneUse) { in combineSetCCMOVMSK()
45617 V = DAG.getBitcast(VecVT.getHalfNumVectorElementsVT(), V); in combineSetCCMOVMSK()
45629 MVT TestVT = VecVT.is128BitVector() ? MVT::v2i64 : MVT::v4i64; in combineSetCCMOVMSK()
45662 if (Vec.getOpcode() == X86ISD::PACKSS && VecVT == MVT::v16i8) { in combineSetCCMOVMSK()
45716 ShuffleInputs[0].getValueSizeInBits() == VecVT.getSizeInBits()) { in combineSetCCMOVMSK()
45725 SDValue Result = DAG.getBitcast(VecVT, ShuffleInputs[0]); in combineSetCCMOVMSK()
47522 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), N00Type, NumElts); in convertIntLogicToFPLogic() local
47527 SDValue Vec00 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N00); in convertIntLogicToFPLogic()
47528 SDValue Vec01 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N01); in convertIntLogicToFPLogic()
47529 SDValue Vec10 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N10); in convertIntLogicToFPLogic()
47530 SDValue Vec11 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N11); in convertIntLogicToFPLogic()
49612 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, VecSize / 64); in combineStore() local
49613 SDValue BitCast = DAG.getBitcast(VecVT, ExtOp0); in combineStore()
51900 EVT VecVT, EVT CmpVT, bool HasPT, F SToV) { in emitOrXorXorTree() argument
51904 SDValue A = emitOrXorXorTree(Op0, DL, DAG, VecVT, CmpVT, HasPT, SToV); in emitOrXorXorTree()
51905 SDValue B = emitOrXorXorTree(Op1, DL, DAG, VecVT, CmpVT, HasPT, SToV); in emitOrXorXorTree()
51906 if (VecVT != CmpVT) in emitOrXorXorTree()
51909 return DAG.getNode(ISD::OR, DL, VecVT, A, B); in emitOrXorXorTree()
51915 if (VecVT != CmpVT) in emitOrXorXorTree()
51918 return DAG.getNode(ISD::XOR, DL, VecVT, A, B); in emitOrXorXorTree()
51979 EVT VecVT = MVT::v16i8; in combineVectorSizedSetCCEquality() local
51980 EVT CmpVT = PreferKOT ? MVT::v16i1 : VecVT; in combineVectorSizedSetCCEquality()
51982 VecVT = MVT::v32i8; in combineVectorSizedSetCCEquality()
51983 CmpVT = PreferKOT ? MVT::v32i1 : VecVT; in combineVectorSizedSetCCEquality()
51985 EVT CastVT = VecVT; in combineVectorSizedSetCCEquality()
51989 VecVT = MVT::v64i8; in combineVectorSizedSetCCEquality()
51992 CastVT = VecVT; in combineVectorSizedSetCCEquality()
51994 VecVT = MVT::v16i32; in combineVectorSizedSetCCEquality()
51996 CastVT = OpSize == 512 ? VecVT : in combineVectorSizedSetCCEquality()
52023 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VecVT, in combineVectorSizedSetCCEquality()
52024 DAG.getConstant(0, DL, VecVT), X, in combineVectorSizedSetCCEquality()
52034 Cmp = emitOrXorXorTree(X, DL, DAG, VecVT, CmpVT, HasPT, ScalarToVector); in combineVectorSizedSetCCEquality()
52038 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality()
52041 Cmp = DAG.getNode(ISD::XOR, DL, VecVT, VecX, VecY); in combineVectorSizedSetCCEquality()
52047 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality()