Lines Matching refs:SelVT
30192 auto SignBitSelect = [&](MVT SelVT, SDValue Sel, SDValue V0, SDValue V1) { in LowerShift() argument
30203 return DAG.getBitcast(SelVT, DAG.getSelect(dl, VT, Sel, V0, V1)); in LowerShift()
30210 return DAG.getBitcast(SelVT, in LowerShift()
30216 SDValue Z = DAG.getConstant(0, dl, SelVT); in LowerShift()
30217 SDValue C = DAG.getNode(X86ISD::PCMPGT, dl, SelVT, Z, Sel); in LowerShift()
30218 return DAG.getSelect(dl, SelVT, C, V0, V1); in LowerShift()
30718 auto SignBitSelect = [&](MVT SelVT, SDValue Sel, SDValue V0, SDValue V1) { in LowerRotate() argument
30725 return DAG.getBitcast(SelVT, in LowerRotate()
30731 SDValue Z = DAG.getConstant(0, DL, SelVT); in LowerRotate()
30732 SDValue C = DAG.getNode(X86ISD::PCMPGT, DL, SelVT, Z, Sel); in LowerRotate()
30733 return DAG.getSelect(DL, SelVT, C, V0, V1); in LowerRotate()
54117 EVT SelVT = Ops[0].getOperand(0).getValueType(); in combineConcatVectorOps() local
54118 SelVT = SelVT.getDoubleNumVectorElementsVT(*DAG.getContext()); in combineConcatVectorOps()
54120 ConcatSubOperand(SelVT.getSimpleVT(), Ops, 0), in combineConcatVectorOps()
54343 MVT SelVT = Sel.getSimpleValueType(); in narrowExtractedVectorSelect() local
54344 assert((SelVT.is256BitVector() || SelVT.is512BitVector()) && in narrowExtractedVectorSelect()
54347 unsigned SelElts = SelVT.getVectorNumElements(); in narrowExtractedVectorSelect()
54367 MVT NarrowSelVT = MVT::getVectorVT(SelVT.getVectorElementType(), NarrowElts); in narrowExtractedVectorSelect()